PQI StandardII ICF Card 128MB~8GB WideTemp - Unitronix
PQI StandardII ICF Card 128MB~8GB WideTemp - Unitronix
PQI StandardII ICF Card 128MB~8GB WideTemp - Unitronix
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Datasheet<br />
Notes: 1) The device may negate DMARQ to request termination of the Ultra DMA burst no sooner than tRP after -DDMARDY is negated.<br />
2) After negating -DDMARDY, the device may receive zero, one, two, or three more data words from the host.<br />
Figure 21: Ultra DMA Data-Out Burst Device Pause Timing<br />
4.11.10 Device Terminating an Ultra DMA Data-Out Burst<br />
The device terminates an Ultra DMA Data-Out burst by following the steps lettered below. The timing diagram for the<br />
operation is shown in Figure 22: Ultra DMA Data-Out Burst Device Termination Timing. The timing parameters are<br />
specified in Table 15: Ultra DMA Data Burst Timing Requirements and are described in Table 16: Ultra DMA Data<br />
Burst Timing Descriptions.<br />
The following steps shall occur in the order they are listed unless otherwise specifically allowed:<br />
a) The device shall not initiate Ultra DMA burst termination until at least one data word of an Ultra DMA burst has been<br />
transferred.<br />
b) The device shall initiate Ultra DMA burst termination by negating -DDMARDY.<br />
c) The host shall stop generating an HSTROBE edges within t RFS of the device negating -DDMARDY.<br />
d) If the device negates -DDMARDY within t SR after the host has generated an HSTROBE edge, then the device shall<br />
be prepared to receive zero or one additional data words. If the device negates -DDMARDY greater than t SR after the<br />
host has generated an HSTROBE edge, then the device shall be prepared to receive zero, one or two additional<br />
data words. The additional data words are a result of cable round trip delay and t RFS timing for the host.<br />
e) The device shall negate DMARQ no sooner than t RP after negating -DDMARDY. The device shall<br />
again until after the Ultra DMA burst is terminated.<br />
not assert DMARQ<br />
f) The host shall assert STOP within t LI after the device has negated DMARQ. The host shall not negate STOP again<br />
until after the Ultra DMA burst is terminated.<br />
g)<br />
If HSTROBE is negated, the host shall assert HSTROBE within t LI after the device has negated DMARQ. No data<br />
shall be transferred during this assertion. The device shall ignore this transition of HSTROBE. HSTROBE shall<br />
remain asserted until the Ultra DMA burst is terminated.<br />
h) The host shall place the result of its CRC calculation on D[15:00]<br />
Rev. A.5 37/45 Mar. 2009