Reliable Circuit Techniques for Low-Voltage Analog Design in Deep ...

30 Fayomi, Sawan and Roberts
2.2. Analog CMOS Switches
Fig. 9.
Low-voltage opamp based on DTMOS.
in standard digital CMOS technology. The operation
of the DTMOS is similar to weak-inversion pMOS
operation and has similarities with bipolar operation
in, for example, lateral pnp’s. The spread and matching
of the DTMOS is caused by the same mechanism
that leads to V th variations in MOS transistors such
as well-doped fluctuations and oxide thickness variations
[31]. However, it appears from both device simulations
[29] and device measurements that the V GS
variations in DTMOS are only about half the value of
the V th variations in an equally large pMOS transistor
(with interconnected well-source) operated at the
same current. Hence the matching of two DTMOS
is about twice as good as the matching between the
same devices operated as (source-well-interconnected)
pMOS transistors at the same current. Also the batchto-batch
variations (the spread in V GS and in V th )of
DTMOS is about half of the value of their pMOS
counterparts.
The design of the folded cascode rail-to-rail input
stage is not different from a classical folded cascode
input stage with respect to gain, noise and frequency
behavior. The problem of CMOS opamp circuit sizing
is covered by Mandal [32]. Given a circuit and its performance
specifications, the described approach, automatically
determines the device sizes in order to meet
the given performance specifications while minimizing
a cost function, such as weighted sum of the active
area and power dissipation. The approach is based
on the observation that the first order behavior of a
MOS transistor in the saturation region is such that the
cost and the constraint functions for the optimization
problem can be modeled as polynomial in the design
variables.
Analog switches are used in various circuits such as:
multiplexers, sample-and-hold (S/H) circuits, analogto-digital
converters (ADCs), digital-to-analog converters
(DACs), and in particular in discrete-time
analog systems such as switched-capacitor (SC) and
switched-current (SI) building blocks.
One of the main characteristics of the MOS transistors
is the switching feature. Drain and source terminals
are the two switch terminals and the gate (and
sometimes the bulk) is used to control the conductivity.
Ideally, the switch in the on state acts as a fixed
linear conductance g ds .Inpractice, the conductance
is strongly signal-dependent. The switch conductivity
depends not on the absolute potential of the control
terminals, but on their potential relative to the others.
Also the conductance through the whole range of input
is not constant, and depends on the supply voltage,
which becomes extremely low and therefore leading
to a dead band conduction region. To ensure rail-torail
switching operations control, signals exceeding the
supply voltage range are required. This is known as
bootstrapped switching technique [33].
A general block diagram of the bootstrapped switch
is shown in Fig. 10. It consists of three main elements:
the pass-transistor (nMOS, pMOS or both types), a control
signal generator and, finally, a clock booster. The
control circuit generates a signal linearly related to the
input signal. The purpose of the clock booster is to generate
a clock signal over and above the supply voltage.
For the purpose of sampling a continuous-time signal,
Brooks proposed a bootstrapping technique [33], where
the gate-to-channel voltage is almost constant in sampling
phase. The input dependent control signal part is
shown in Fig. 11 with the n-type pass transistor N 0 . Neglecting
the body-effect, the switch’s conductance will
be signal independent and the main switch element gate
oxide will not be subject to unacceptable large electric
Fig. 10.
Block diagram of bootstrapping switch.