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Reliable Circuit Techniques for Low-Voltage Analog Design in Deep ...

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28 Fayomi, Sawan and Roberts<br />

Fig. 6. <strong>Low</strong>-voltage rail-to-rail CMOS opamp us<strong>in</strong>g cont<strong>in</strong>uous-time dynamic level shifter: (a) conceptual schematic, (b) common-mode<br />

components versus <strong>in</strong>put CM V i,cm , (c) 1-V rail-to-rail complementary <strong>in</strong>put stage.

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