Tutorial: Introduction to CUDA Fortran | GTC 2013

More documents

Recommendations

Info

Simple Multi-GPU Example module kernel contains attributes(global) subroutine assign(a, v) implicit none real :: a(*) real, value :: v a(threadIdx%x) = v end subroutine assign end module kernel program minimal use cudafor use kernel implicit none integer, parameter :: n=32 real :: a(n) real, device, allocatable :: a0_d(:), a1_d(:) integer :: nDevices, istat istat = cudaGetDeviceCount(nDevices) if (nDevices < 2) then write(*,*) 'Requires >= 2 GPUs' stop end if istat = cudaSetDevice(0) allocate(a0_d(n)) call assign(a0_d, 3.0) a = a0_d deallocate(a0_d) write(*,*) 'Device 0: ', a(1) istat = cudaSetDevice(1) allocate(a1_d(n)) call assign(a1_d, 4.0) a = a1_d deallocate(a1_d) write(*,*) 'Device 1: ', a(1) end program minimal
Unified Virtual Addressing • CPU and GPUs use a unified virtual address space – Device can be determined from address of data – Requires: CUDA Toolkit >= 4.0, compute capability >= 2.0, 64-bit OS • Enables peer-to-peer computing GPU GPU GPU GPU – Direct Transfers: copy between GPUs not staged through host Memory Memory Memory Memory – Direct Access: a kernel on one GPU can access memory on another PCI PCI CPU CPU Memory Memory
Page 1 and 2:
Introduction to CUDA Fortran
Page 3 and 4:
Introduction • CUDA is a scalable
Page 5 and 6:
Heterogeneous Programming • Host
Page 7 and 8:
Data Transfers program copyData use
Page 9 and 10:
Data Transfers program copyData use
Page 11 and 12:
F90 Array Increment module simpleOp
Page 13 and 14:
CUDA Fortran - Device Code F90 modu
Page 15 and 16:
Execution Model Software Thread Thr
Page 17 and 18:
Mapping Arrays to Thread Blocks •
Page 19 and 20:
Built-in Variables for Device Code
Page 21 and 22:
Multidimensional Example - Host •
Page 23 and 24:
2D Example - Device Code module sim
Page 25 and 26:
Kernel Loop Directives (CUF Kernels
Page 27 and 28:
Reduction using CUF Kernels • Com
Page 29 and 30:
Compilation • pgfortran - PGI’s
Page 31 and 32:
Separate Compilation module kernel_
Page 33 and 34:
Host-Device Transfers • Host-devi
Page 35 and 36: Page-Locked Data Transfers • Page
Page 37 and 38: Asynchronous Data Transfers • Asy
Page 39 and 40: GPU/CPU Synchronization • cudaDev
Page 41 and 42: Outline • Introduction • Perfor
Page 43 and 44: Misaligned Data Access • Use arra
Page 45 and 46: Strided Data Access • Use array i
Page 47 and 48: Shared Memory • On-chip • All t
Page 49 and 50: Matrix Transpose - Shared Memory at
Page 51 and 52: Textures • Different pathway for
Page 53 and 54: Textures - Host Code program tex us
Page 55 and 56: Execution Configuration • GPUs ar
Page 57 and 58: Thread-Level Parallelism attributes
Page 59 and 60: Thread-Level Parallelism • Mimic
Page 61 and 62: Instruction-Level Parallelism No Sh
Page 63 and 64: Calling CUBLAS from CUDA Fortran
Page 65 and 66: Calling Thrust from CUDA Fortran C
Page 67 and 68: CUDA Fortran Sorting with Thrust pr
Page 69 and 70: Convolution Example A B Perform con
Page 71 and 72: program driver use cudafor use cuff
Page 73 and 74: CUDA Libraries from CUDA Fortran
Page 75 and 76: Computing π pgf90 -O3 -Mpreprocess
Page 77 and 78: Reductions on GPU 3 1 7 0 4 1 6 3
Page 79 and 80: Computing π with CUDA Fortran Kern
Page 81 and 82: Computing π with an Atomic Lock In
Page 83 and 84: Multi-GPU Programming • Multi-GPU
Page 85: Multi-GPU Memory Allocation • All
Page 89 and 90: Direct Transfers • Once direct ac
Page 91 and 92: Direct Transfer Example - Device Co
Page 93 and 94: Direct Transfer Example - Host Code
show all

Tutorial: Introduction to CUDA Fortran | GTC 2013

Create successful ePaper yourself

Delete template?

Save as template?