12-Bit Quad Voltage Output Digital-to-Analog Converter

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TYPICAL PERFORMANCE CURVES: V SS = –5V (CONT) At T A = +25°C, V DD = +5V, V SS = –5V, V REFH = +2.5V, V REFL = –2.5V, representative unit, unless otherwise specified. LE (LSB) LE (LSB) 0.50 0.25 0.00 –0.25 +85°C –0.50 0.50 0.25 0.00 –0.25 –40°C –0.50 000 H 200 H LINEARITY ERROR vs CODE (DAC C, –40°C and +85°C) 400 H 600 H 800 H A00 H C00 FFF H 0.50 0.25 0.00 –0.25 +85°C –0.50 0.50 0.25 0.00 –0.25 –40°C –0.50 000 H 200 H LINEARITY ERROR vs CODE (DAC D, –40°C and +85°C) 400 H 600 H 800 H A00 H C00 H E00 H FFF H Digital Input Code Digital Input Code LE (LSB) LE (LSB) 3.0 ZERO-SCALE ERROR vs TEMPERATURE (Code 000 H ) 3.0 FULL-SCALE ERROR vs TEMPERATURE (Code FFF H ) 2.5 2.5 Zero-Scale Error (LSB) 2.0 1.5 1.0 0.5 0.0 DAC D DAC A DAC C DAC B Full-Scale Error (LSB) 2.0 1.5 1.0 0.5 0.0 DAC D DAC A DAC C DAC B –0.5 –0.5 –1.0 –40 –20 0 20 40 60 80 100 Temperature (°C) –1.0 –40 –20 0 20 40 60 80 100 Temperature (°C) ® DAC7624/7625 8
THEORY OF OPERATION The DAC7624 and DAC7625 are quad, voltage output, 12-bit digital-to-analog converters (DACs). The architecture is a classic R-2R ladder configuration followed by an operational amplifier that serves as a buffer. Each DAC has its own R-2R ladder network and output op-amp, but all share the reference voltage inputs. The minimum voltage output (“zero-scale”) and maximum voltage output (“full-scale”) are set by the external voltage references (V REFL and V REFH , respectively). The digital input is a 12-bit parallel word and the DAC input registers offer a readback capability. The converters can be powered from a single +5V supply or a dual ±5V supply. Each device offers a reset function which immediately sets all DAC output voltages and DAC registers to mid-scale (DAC7624, code 800 H ) or to zero-scale (DAC7625, code 000 H ). See Figures 1 and 2 for the basic operation of the DAC7624/25. +2.500V 0V to +2.5V 0V to +2.5V 0.1µF 1 2 3 4 V REFH V OUTB V OUTA V SS 5 GND DAC7624 DAC7625 28 V REFL V DD 25 V OUTC 27 V OUTD 26 NIC 24 0V to +2.5V 0V to +2.5V +5V 0.1µF 1µF to 10µF + Reset DACs (1) 6 RESET CS 23 Chip Select Load DAC Registers 7 8 LDAC DB0 A0 A1 22 21 Address Bus or Decoder 9 DB1 R/W 20 Read/Write 10 DB2 DB11 19 Data Bus 11 DB3 DB10 18 12 DB4 DB9 17 Data Bus 13 DB5 DB8 16 14 DB6 DB7 15 NOTE: (1) Reset LOW sets all DACs to code 800 H on the DAC7624 and to code 000 H on the DAC7625. FIGURE 1. Basic Single-Supply Operation of the DAC7624/25. +2.500V 0.1µF –2.5V to +2.5V –5V –2.5V to +2.5V + 1µF to 10µF 0.1µF 1 2 3 4 V REFH V OUTB V OUTA V SS 5 GND DAC7624 DAC7625 28 V REFL V DD 25 V OUTC 27 V OUTD 26 NIC 24 –2.500V 0.1µF –2.5V to +2.5V –2.5V to +2.5V +5V 0.1µF 1µF to 10µF + Reset DACs (1) 6 RESET CS 23 Chip Select Load DAC Registers 7 8 LDAC DB0 A0 A1 22 21 Address Bus or Decoder 9 DB1 R/W 20 Read/Write 10 DB2 DB11 19 Data Bus 11 DB3 DB10 18 12 DB4 DB9 17 Data Bus 13 DB5 DB8 16 14 DB6 DB7 15 NOTE: (1) Reset LOW sets all DACs to code 800 H on the DAC7624 and to code 000 H on the DAC7625. FIGURE 2. Basic Dual-Supply Operation of the DAC7624/25. 9 DAC7624/7625 ®
Page 1 and 2: DAC7625 ® DAC7624 DAC7625 DAC7624
Page 3 and 4: ABSOLUTE MAXIMUM RATINGS (1) V DD t
Page 5 and 6: TYPICAL PERFORMANCE CURVES: V SS =
Page 7: TYPICAL PERFORMANCE CURVES: V SS =
Page 11 and 12: DIGITAL TIMING Figure 3 and Table I
Page 13: IMPORTANT NOTICE Texas Instruments

12-Bit Quad Voltage Output Digital-to-Analog Converter

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