PCI Express 3.0 Characterization, Compliance ... - Teledyne LeCroy

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PLL Loopback BW Testing Graph the generated SJ amplitude against measured SJ amplitude and the result is the jitter transfer functions of the DUT PLL Oscilloscope takes SJ measurement for each frequency of SJ generated on the Phoenix Frequency (MHz): 3.9 Magnitude (dB): -3.03 Peaking (dB): 0.5 Phoenix will generate 100Mhz clock as the reference CLK and generate a sweep of SJ frequencies Teledyne LeCroy 2013 34
Live Demo – Link EQ Compliance Trigger Out Terminator Phase matched SMA-SMA cable pair AUX IN LeCroy PeRT 3 Phoenix Error Detector Generator Data Rx+ Data Rx- Data Tx+ Data Tx- Power Dividers Ch1 Ch2 Ch3 LeCroy SDA830Zi-A DC Blocks Clock Out SMA-SMP cable pair Rx+ Rx- Phase matched SMA-SMP cable pair Add-In Card Tx- Tx+ Clk In Ch4 Power Supply Riser Card CBB Teledyne LeCroy 2013 35
Page 1 and 2: PCI Express 3.0 Characterization, C
Page 3 and 4: PCI Express 3.0 Compared to PCIE 2&
Page 5 and 6: How does PCI Express 3.0 Work TxEQ
Page 7 and 8: PCI-SIG and LeCroy 1. PCI Express C
Page 9 and 10: PCI-SIG Logo Test Gold Suites Teled
Page 11 and 12: SEG Compliance Testing for PCI-SIG
Page 13 and 14: Transmitter Testing for PCI Express
Page 15 and 16: Preset test Capture PCIe Gen3 compl
Page 17 and 18: SEG Compliance Testing for PCI-SIG
Page 19 and 20: Step 1: Preset Calibration - 11 pre
Page 21 and 22: Step 3: DM calibration - DM will be
Page 23 and 24: Rx Jitter Tolerance Signal with All
Page 25 and 26: Preset test (Section 2.3) Repeat?
Page 27 and 28: Test: Section 2.4 (or 2.7) • Add-
Page 29 and 30: Rx Link Equalization Training Signa
Page 31 and 32: Example: Section 2.10 (or 2.11) •
Page 33: PLL Loopback Bandwidth Testing Freq
Page 37 and 38: PeRT 3 Phoenix LeCroy PeRT 3 is cap

PCI Express 3.0 Characterization, Compliance ... - Teledyne LeCroy

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