Running Foundation from a Makefile - Xess

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Introduction In this document, I will describe how I use a makefile to compile VHDL code into bitstreams for XILINX FPGAs and CPLDs. The makefile sets up the options and runs the individual software tools in Foundation. This gives me the following benefits: Automation: I can start a makefile script running and leave. I no longer have to guide Foundation through the phases of compilation using the GUI. Fewer Errors: It’s always possible to make an error or forget to set an option when I point and click with the Foundation GUI. The makefile encapsulates the options for my design and they are consistently applied whenever I recompile. Simpler Archiving: I can use a revision control system to archive my design just by checking-in the makefile, VHDL files, constraint files, and a few files containing the design options. I don’t have to store any strange binary files which are incompatible between different versions of the software tools, and I don’t need to store the entire project directory hierarchy. That said, there are disadvantages to using a makefile when I am developing the first version of a design. The non-interactive nature of makefiles makes error reporting and correction of my VHDL files more difficult. And it is difficult to remember the correct settings for all the compilation options. So I like to use the Foundation GUI when I develop a design. Once the design is working, I move all the settings for the options into the appropriate places in my scripts. XESS CORP. WWW.XESS.COM 1
Caveats I am assuming you have the following UNIX-like utilities on your PC: make, rm, cat, echo, and mv. These are necessary to run the makefile. You can get these utilities from several sites on the Web. You will also need the fe_shell utility that lets you run the FPGA Express synthesizer from a command script. This utility is not included in the Student Edition of the XILINX Foundation tools. XESS CORP. WWW.XESS.COM 2
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Page 5 and 6: 16 rm -rf DPM_NET 17 rm -f *.bit 18
Page 7 and 8: 100 mv $(TOP).SVF $(SVF_FILE) 101 r
Page 9 and 10: ily that the FPGA Express synthesiz
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Page 15 and 16: In general, I usually copy the bitg
Page 17 and 18: C:> make xs95-108 After the makefil
Page 19 and 20: LIB: Set it to the name of the mast
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Running Foundation from a Makefile - Xess

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