Solutions to Chapter 4 - Communication Networks
Solutions to Chapter 4 - Communication Networks
Solutions to Chapter 4 - Communication Networks
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<strong>Communication</strong> <strong>Networks</strong> (2 nd Edition)<br />
<strong>Chapter</strong> 4 <strong>Solutions</strong><br />
Each input line carries T-1 traffic. The input frame size is n = 24 slots. Each frame that is output<br />
is of length 4n = 96 slots. After a full set of 96 slots is written in<strong>to</strong> the 4 registers, the slots are<br />
read out in the outgoing line.<br />
1.544 Mbps AA<br />
24<br />
slots<br />
1.544 Mbps B A<br />
24<br />
slots<br />
AA<br />
BA<br />
C A<br />
AD<br />
1.544 Mbps C A<br />
1.544 Mbps AD<br />
24<br />
slots<br />
24<br />
slots<br />
6.176 Mbps<br />
34. Suppose that the TDM frame structure is changed so that each frame carries two PCM samples.<br />
Does this affect the maximum number of channels that can be supported using TSI switching<br />
Note: The solution <strong>to</strong> this problem is currently being reviewed and may be revised.<br />
Solution:<br />
Yes. Now each slot requires two memory reads and two memory writes. Thus, the maximum<br />
number of channels that can be supported is:<br />
Max =<br />
125µ s<br />
4 × mem<br />
In other words, one half as many slots per frame can be supported as compared <strong>to</strong> when each<br />
slot requires one PCM sample.<br />
35. Examine the time-space-time circuit-switch architecture and explain the elements that lead <strong>to</strong><br />
greater compactness, that is, smaller physical size in the resulting switching system.<br />
Solution:<br />
In a space switch, n inputs are switched simultaneously in a switching time of T seconds. The<br />
space-time circuit switch switches each of the n inputs in succession with a switching time of T/n<br />
each, for a <strong>to</strong>tal switching time of T.<br />
By switching the inputs one at a time instead of simultaneously, the switching matrix needed at<br />
any given time is reduced in size accordingly and greater hardware compactness is achieved.<br />
The implicit tradeoff, however, is that higher line and switch speeds are needed.<br />
36. Consider the three-stage switch in problem 4.26c. Explain why a space-time-space<br />
implementation of this switch makes sense. Identify the fac<strong>to</strong>rs that limit the size of the switches that<br />
can be built using this approach.<br />
Solution:<br />
A space-time-space implementation would have the middle stage replaced by a TSI switch stage,<br />
and thus reduce hardware costs. The maximum number of slots in a TSI switch, say M, is limited<br />
Leon-Garcia/Widjaja 17