Backend Process Exposure Tool Backend Process ... - Sokudo

More documents

Recommendations

Info

“Vertical Lithography” process portfolio 80µm Vertical Lithography Applicable to processes ranging from Bump to TSV “FPA-5510iV” Bump Photo-Resist Thickness (DOF) 50µm Micro Bump 10µm TSV FPA-5510iZ RDL 1µm FEOL 0.35µm 1µm 2µm Resolution 10µm 100µm 20 th SOKUDO Breakfast Forum, July 10,2013 Slide Slide 4/23 4
3D & 2.5D Lithography Requirements Micro-Bump (20~40 μm) • Profile stability • Overlay Accuracy Thinned Semiconductor Chip <strong>Process</strong>or Memory Memory TSV (1-4 μm) • High Resolution • Profile Stability • Overlay Accuracy Silicon Interposer TSV (2.0~5.0 μm) • Thick Resist • Focus Margin Management • Overlay Accuracy • Warped Wafer Printed substrate Interposer RDL (0.40~1.0 μm) • High Resolution • Profile Stability • Overlay Accuracy Bump (60~100 μm) • Profile Stability Photo-lithography is required for TSV, RDL, Micro-Bump processes to form resist mask for deep etching or plating 20 th SOKUDO Breakfast Forum, July 10,2013 Slide Slide 5/23 5
Page 1 and 2: 450mm patterning out of darkness Ba
Page 3: Canon 450 mm backend exposure tool
Page 7 and 8: 300 mm Performance 20 th SOKUDO Bre
Page 9 and 10: High-Density hole pattern profile f
Page 11 and 12: Overlay accuracy of Through-Si Alig
Page 13 and 14: Advanced Distortion Compensation (E
Page 15 and 16: Wafer Warpage Correction Result Waf
Page 17 and 18: Study of bonded wafer distortion co
Page 19 and 20: EAGA correction for 450mm Bonded wa
Page 21 and 22: Summary Advanced packaging litho-so

Backend Process Exposure Tool Backend Process ... - Sokudo

Create successful ePaper yourself

Delete template?

Save as template?