Visual System Simulator™

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Visual System Simulator (additional positioning line AXIEM here ???) White Paper There are two options for interfacing with LabVIEW in VSS. 1. Use the LabVIEW Run-Time Engine for executing a VI -- provides for fast simulation times but disables the creation, modification or debugging of VIs. 2. Connect to the LabVIEW Development System -- provides full flexibility for creation, modification and debugging of VIs as necessary. This interface further allows for the use of LabVIEW add-ons and toolkits, which provide standard signal sources and measurements, signal processing, analysis and connectivity, integration with development hardware, and many other capabilities. Taking a closer look as to how designers may utilize this new co-simulation environment, the following scenarios are presented. SCENARIO 1: SIGNAL PROCESSING BLOCKS VSS can generate signals required for the design and simulation of modern communication systems. Real, complex, and digital signal sources can be combined to provide real-world emulation of signals for a wide range of applications. Figure 2 shows a VSS system diagram with several of these signals feeding a LabVIEW block (red circle in Figure 2) and outputs being measured with test points (blue box inset into Figure 2). The LabVIEW block ties directly to a VI in LabVIEW. The link between VSS and LabVIEW is managed exclusively by this block. During VSS simulation, the time-domain data is fed into the LabVIEW data flow and the resulting VI ouput is resynchronized in time with the VSS simulation. Referring to Figure 2, the integer data in VSS goes to LabVIEW and its amplitude is calculated with a summing function and returned to VSS. The resulting output (Figure 3) - relative to the input - is scaled in amplitude according to the LabVIEW processing block. The real and complex signals have a similar operation. Additionally, LabVIEW VIs can also be used from within the VSS environment. Consider a simple VI that takes two input signals, adds them together, and scales the result by a variable gain that is set by a user-controlled slider (Figure 4). Here, this VI is converted to a “subVI” by assigning Input 1 and Input 2 numeric controls as input terminals and Output as an output terminal in the connector pane. This VI can then be used in a VSS system diagram with a LabVIEW block configured to the desired VI, and the input and output nodes that will interface with the VI are added. In essence, the controls and indicators in LabVIEW become inputs and outputs, respectively, in VSS. This is accomplished by clicking “Add” under the Input Ports section, selecting the nodes from available input ports defined in the VI, and if desired defining a name for each port. The output port is also added and the property propagation is defined. This simulation also uses the LabVIEW Run-Time Engine and shows the VI front panel. The input to the VI consists of two tones: 1 and 1.1 GHz. The results are displayed on a graph in the LabVIEW front panel window, as defi ned in the VI (Figure 5). This window is automatically opened during the simulation. The results will display immediately on a VSS graph as well. Figure 2: The view shows how the LabVIEW block ties directly to a VI in LabVIEW. Figure 3: The resulting output relative to the input is scaled in amplitude according to the LabVIEW processing block. Figure 4: User-controlled slider within LabVIEW VI. Figure 5: LabVIEW front panel window displayed within VSS.
Visual System Simulator (additional positioning line AXIEM here ???) White Paper SCENARIO 2: A DIGITAL PREDISTORTION (DPD) EXAMPLE Digital predistortion techniques, employed to overcome the nonlinear operation of base station amplifiers, have become a mandatory component to support today’s wider bandwidth signals, high power efficiency and output linearity requirements. VSS provides an environment for generating input signals, modeling the circuit-level amplifier, as well as performing the required measurements. It also offers the ability to design a DPD proof-of-concept and then convert it from floating-point to a realistic fixed-point implementation. LabVIEW includes many of these signal processing capabilities as well but also offers the option of implementing the resulting design in an FPGA. In this way, users are greatly aided by the joint VSS/LabVIEW environment in that it allows for faster design thru to prototype and test of final DPD implementations. In this scenario, the predistortion circuit uses digitally-controlled attenuators and phase shifters and its implementation is moved very early in the design process to LabVIEW given the new VSS/LabVIEW unified framework. Based on a circuit-level amplifier, a VI is created that takes a sample of the signal passing through the amplifier and creates a predistorted signal. This signal is passed back to VSS where it enters the amplifier so the resulting signal is more linear. This process benefits designers in that it provides a seamless methodology that allows for successively adding more complexity to the circuit while concurrently evaluating its performance. Figure 6 shows a 1900 MHz power amplifier from AWR’s library. The AM/AM and AM/PM curves are shown in Figure 7 along with the resulting spectrum with QPSK modulation at a power level with notable distortion (visible as spectral regrowth “side lobes”) simulated in VSS as a reference. There are two foundational aspects of digital predistortion that need to be addressed for the technique to work. A sample of the amplifier’s input-output characteristics must be available in order to determine what must be corrected. This can be done by periodically running the digital predistortion circuit in a calibration mode to characterize the amplifier, or by sampling the amplifier’s output and building a characterization table dynamically over time. In this case, the discussion concerns an early stage of the design process when only the amplifier is being simulated. A copy of the amplifier can be used to create the characterization dynamically before the signal reaches the actual amplifier simulation. This is shown in Figure 8, which is a VSS system diagram in which a copy of the 1900 MHz amplifier (element S1, circled in Figure 8) is placed early in the signal path where the signal is predistorted. The second issue that must be addressed is the amount of correction required to predistort the signal. While this can be achieved algorithmically by understanding the AM/AM and AM/PM behavior, it is being done manually within the VI to illustrate the functionality. Figure 6: Circuit-level schematic of the1900 MHz power amplifier. Figure 7: AM/AM and AM/PM curves from the amplifier along with the resulting spectrum with QPSK modulation at a nominal power level simulated in VSS as a reference. Figure 8: A VSS system diagram of the 1900 MHz amplifier when placed early in the signal path where the signal is predistorted.
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Visual System Simulator™

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