High Performance Reconfigurable Computing

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What is Reconfigurable Computing (RC)? • Utilize reconfigurable hardware devices: (spatially-programmed connections of hardware processing elements) tailored to application: • Customizing hardware to match computations needed/present in a particular application by changing hardware functionality on the fly (at runtime). • Reconfigurable Computing Goal: Using reconfigurable hardware devices to build systems with advantages over conventional computing solutions in terms of: - Flexibility - Performance - Power - Time-to-market - Life cycle cost (vs. ASICS) Computational Efficiency (vs. ASICS) (vs. ASICS) (vs. processors) “Hardware” customized to specifics of problem. Direct map of problem specific dataflow, control. Circuits “adapted” as problem requirements change. Still spatial computing but both functionality and connectivity of hardware elements are not fixed #4 lec # 9 Fall 2010 10-20-2010
Intro: von Neumann Architecture Single in-order execution Implementations have faster clock speeds than reconfigurable computers Much less parallelism due to the limitations of the architecture
Page 1 and 2: Anthony Agresta & Jeremy Coon
Page 3: Computing System Element Choices Pr
Page 7 and 8: Spatial vs. Temporal Computing Spat
Page 9 and 10: Approaches for HPRC • “Hybrid-c
Page 11 and 12: Fine-grain Reconfigurable Hardware
Page 13 and 14: Applications of FPGAs and HPRC Pro
Page 15 and 16: Sample Configurable Computing Appli
Page 17: Conclusions Modern processors have

High Performance Reconfigurable Computing

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