Week 10: MOS Logic Circuits

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• CMOS Inverter – Static characteristics – Dynamic characteristics – Power dissipation • Other CMOS logic gates Topics to cover … Reading Assignment: Chap 6.1-6.3, 7.1-7.4 of Jaeger and Blalock or Chap 7.1 - 7.3, 7.7 of Sedra and Smith ELE2110A © 2008 Lecture 10 - 2
Digital IC Technologies and Logic-Circuit Family Digital IC technologies & logic circuit family CMOS Bipolar BiCMOS GaAs CMOS This course Pseudo -NMOS Pass Transistor Logic Dynamic Logic Transistor- Transistor Logic (TTL) Emitter Coupled Logic (ECL) ELE2110A © 2008 Lecture 10 - 3
Page 1: ELE 2110A Electronic Circuits Week
Page 5 and 6: CMOS Inverter pmos nmos PU: pull up
Page 7 and 8: Case 2: V I = 0V “pull-up” Q N
Page 9 and 10: Dynamic Characteristic: Rise and Fa
Page 11 and 12: Propagation Delay • C represents
Page 13 and 14: Example Given that: For C=1pF, τ p
Page 15 and 16: • CMOS Inverter - Static characte
Page 17 and 18: Dynamic Power Dissipation • When
Page 19 and 20: Dynamic Power Dissipation • The t
Page 21 and 22: CMOS NOR Gate Pull-up Network: Y =
Page 23: CMOS NAND Gate Pull-up Network: Y =

Week 10: MOS Logic Circuits

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