Week 10: MOS Logic Circuits
Week 10: MOS Logic Circuits
Week 10: MOS Logic Circuits
Create successful ePaper yourself
Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.
Case 1: V I =V DD<br />
)<br />
“pull-down”<br />
Q P<br />
OFF<br />
Q N<br />
ON: output pulled down<br />
V O<br />
=0V<br />
The output resistance of Q N<br />
(linear mode):<br />
r<br />
DSN<br />
=<br />
⎛<br />
k ′<br />
n ⎜<br />
⎝<br />
W<br />
L<br />
1<br />
⎞<br />
⎟(<br />
V<br />
⎠<br />
DD<br />
− V<br />
tn<br />
ELE21<strong>10</strong>A © 2008<br />
Lecture <strong>10</strong> - 6