SLV-SE85/SF90/SF99

5-1. SYSTEM CONTROL — VIDEO BLOCK INTERFACE (MA-359 BOARD IC160)5-1RF SWPQVDSignalV SYNCHA SWPPin No.14*(*1 Synchronized with drum rotation. 30Hz 50% duty cycle.*2 Normally “L“. “H“ when CTL signal is not generated.*3 V period “H“ pulse.*4 Selected by REC mode. “H“ in LP mode.“*5 Composite sync signal (positive).I/OOOIOSTOPFF/REW*1L*4*1TAPETHREADING UNTHREADING*1L*5*1TAPE*1L*5*1PB*1*2*5*1PB PAUSE5-2. SYSTEM CONTROL — SERVO PERIPHERAL CIRCUIT INTERFACE (MA-359 BOARD IC160)SignalCAP STOPSTEP PLSDRM PGDRM FGCAP FGCAP DADRM DAPin No.*1. 30Hz pulse (NTSC), 25Hz pulse (PAL).*2. Pulse at tape running.*3. Reverse logic pulse of STEP PLS.*4. “L” when drum rotation stops.*5. Unstable period pulse.*6. Pulse in period in proportional to tape speed.*7. 360Hz pulse (NTSC), 300Hz pulse (PAL).*8. Pulse at tape running.*9. Approx. 2 msec period “H” or “L” pulse.*10. Approx. 1.5 msec period “H” or “L” pulse.#£(ª$∞$§$&•&ªI/OO (O.D)OIIIOOSTOPLL*4*4H/L*8*10FFHi-Z (O.D)L*1*7*6*8*10REWHi-Z (O.D)L*1*7*6*8*10TAPE*1*3*5*1THREADING UNTHREADINGHi-Z (O.D)L*5*5*5*8*10TAPEHi-Z (O.D)L*5*5*5*8*10SLOW*1*3*5*1PBHi-Z (O.D)L*1*7*6*9*10x 2*1*2*5*1PB PAUSELL*1*7H/L*8*10CUE*1*3*5*1SLOW*3*2*1*7*2*8*10REVIEW*1*3*5*1CUEHi-Z (O.D)L*1*7*6*9*10REC*1L*5*1x 2Hi-Z (O.D)L*1*7*6*8*10REC PAUSE*1L*5*1REVIEWHi-Z (O.D)L*1*7*6*9*10RECHi-Z (O.D)L*1*7*6*9*10REC PAUSEHi-Z (O.D)L*1*7H/L*8*10SLV-SE85/SF90/SF99SECTION 5INTERFACE, IC PIN FUNCTION DESCRIPTION