Design for Reliability: PCBs - DfR Solutions

Design for Reliability: PCBsNorth Texas IPC Designers CouncilCheryl Tulkoff, ctulkoff@dfrsolutions.comApril 10, 2013© 2004 -– 20072010

PCB DfR AbstractooDesigning printed boards today is more difficult than everbefore because of the increased lead free process temperaturerequirements and associated changes required in manufacturing.Not only has the density of the electronic assembly increased,but many changes are taking place throughout the entire supplychain regarding the use of hazardous materials and therequirements for recycling.Much of the change is due to the European Union (EU) Directivesregarding these issues. The RoHS and REACH directives havecaused many suppliers to the industry to rethink their materialsand processes. Thus, everyone designing or producingelectronics has been or will be affected.© 2004 - 2007 2010

Course OutlineINTRODUCTIONSooIntro to Design for Reliability (DfR)DfR & Physics of Failure (PoF)PRINTED CIRCUIT BOARD ISSUES• Laminate Selection• Plated Through Vias (PTVs)• PTH Barrel Cracking• CAF• Strain/Flexure Issues & Pad Cratering• Cleanliness• Electrochemical Migration• Surface Finishes© 2004 - 2007 2010

Design for Reliability (DfR) DefinedoDfR: A process for ensuring the reliability of aproduct or system during the design stage beforephysical prototypeoReliability: The measure of a product’s ability toooo…perform the specified function…at the customer (with their use environment)…over the desired lifetime© 2004 - 2007 2010

Why Design for Reliability (DfR)?o The foundation of a reliableproduct is a robust designo Provides margino Mitigates riskfrom defectso Satisfies thecustomer© 2004 - 2007 2010

Physics of Failure (PoF)oooPoF Definition: The use of science (physics, chemistry, etc.)to capture an understanding of failure mechanisms andevaluate useful life under actual operating conditionsUsing PoF, design, perform, and interpret the results ofaccelerated life testsooStarting at design stageContinuing throughout the lifecycle of the productStart with standard industry specificationsooModify or exceed themTailor test strategies specifically for the individual product designand materials, the use environment, and reliability needs© 2004 - 2007 2010

Physics of Failure DefinitionsoFailure of a physical device or structure (i.e. hardware)can be attributed to the gradual or rapid degradationof the material(s) in the device in response to the stressor combination of stresses the device is exposed to,such as:oThermal, Electrical, Chemical, Moisture, Vibration, Shock,Mechanical Loads . . .oFailures May Occur:oooPrematurelyGraduallyErratically© 2004 - 2007 2010

Design for Reliability At Concept: SpecificationsooooCan DfR mistakes occur at this stage?oNo………..and YesFailure to capture and understand product specificationsat this stage lays the groundwork for mistakes atschematic and layoutImportant specifications to capture at concept stageoooReliability expectationsUse environmentDimensional constraintsA perfectly designed & constructed PCB can still beunreliable if materials are chosen poorly – even if madeto IPC Class 3!© 2004 - 2007 2010

A Word on Quality, Reliability & Class 2 versus Class 3ooGood quality is necessary but not SUFFICIENT to guaranteehigh reliability.Class 3 by itself does not guarantee high reliabilityooA PCB or PCBA can be perfectly built to IPC Class 3 standards and stillbe totally unreliable in its final application.Consider two different PCB laminates both built to IPC Class 3 standards.o Both laminates are identical in all properties EXCEPT one laminatehas a CTEz of 40 and the other has a CTEz of 60.o The vias in the laminate with the lower CTEz will be MORE reliable ina long term, aggressive thermal cycling environment than the CTEz60 laminate.o A CTEz 40 laminate built to IPC class 2 could be MORE reliable thanthe CTEz 60 laminate built to Class 3.o Appropriate materials selection for the environment is key!© 2004 - 2007 2010

© 2004 - 2007 2010Laminate SelectionPlated Through Vias (PTVs)PTHBarrel CrackingConductive Anodic Filaments (CAF)

PCB Materials / Laminate SelectionooLaminate selection is frequently under specified! Somecommon occurrences:ooooooPCB supplier frequently allowed to select laminate materialNo restrictions on laminate changesGeneric IPC slash sheet requirements usedLaminates called out by Tg only and with no measurementmethod specified (there is more than one)No cleanliness requirements specifiedFailure to specify stackupNot all laminates are created equaloFailure to put some controls in places opens the door to failure© 2004 - 2007 2010

PCB Materials and Plated Through Via ReliabilityoHistorically, two material properties of concerno Out-of-plane coefficient of thermal expansion (CTE z )o Out-of-plane elastic modulus (‘stiffness’)(E z )oKey Assumption: No exposure to temperatures above theglass transition temperature (Tg)oThe two material properties(CTE and E) are driven bychoices in resin, glass style,and filler© 2004 - 2007 2010

Laminate DatasheetsooOut-of-plane CTE (CTEz) is almost always provided onthe laminate datasheetoSometimes in ppm/C above and below the Tgo Sometimes in % between 50-260C1/E laminate = V epoxy /E epoxy + V fiber /E fiberOut-of-plane modulus (Ez) is almost never provided onthe laminate datasheetoRequires calculation based on in-plane laminate properties,glass fiber properties, glass fiber volume fraction, andRule-of-Mixtures / Halpin-Tsai models© 2004 - 2007 2010

Survey of 300 Different FR-4 DatasheetsoOut-of-planeexpansionranged from1.4% to 4.8%© 2004 - 2007 2010

Glass StyleoooPCB laminates (and prepregs) arefabricated with a variety of glass stylesProblem: All datasheet properties are forlaminate with 7628 glass styleMost laminate (and all prepreg) incomplex PCBs have a low volume fractionof glass(i.e., 1080 or 106)GlassStyleResinVolumeContentFiberVolumeContent1027 0.86 0.141037 0.86 0.14106 0.84 0.161067 0.84 0.161035 0.83 0.171078 0.82 0.181080 0.79 0.211086 0.78 0.222313 0.74 0.262113 0.72 0.282116 0.71 0.293313 0.71 0.293070 0.68 0.321647 0.66 0.341651 0.66 0.342165 0.66 0.342157 0.66 0.347628 0.64 0.36© 2004 - 2007 2010

Glass Style and CTEGlass Style Modulus of Elasticity Ez (MPa) CTEz (ppm)1027 4380.4 73.91037 4380.4 73.9106 4478.2 72.31067 4478.2 72.31035 4528.7 71.51078 4580.3 70.71080 4742.7 68.41086 4799.3 67.62313 5040.4 64.42113 5170.2 62.82116 5237.6 62.03313 5237.6 62.03070 5450.9 59.71647 5603.1 58.11651 5603.1 58.12165 5603.1 58.12157 5603.1 58.17628 5764.0 56.5© 2004 - 2007 2010

Laminate Properties (cont.)oMore recently, additional laminate properties of concerndue to Pb-free assemblyoGlass transition temperature (Tg)o Time to delamination (T260, T280, T288, T300)oTemperature of decomposition (Td)oEach parameter ‘supposedly’ captures a differentmaterial behavioroHigher number slash sheets (> 100) within IPC-4101 define theseparameters to specific material categories© 2004 - 2007 2010

Thermal Parameters of LaminateoooGlass transition temperature (Tg)(IPC-TM-650, 2.4.24/2.4.25c)oCharacterizes complex material transformation (increase in CTE,decrease in modulus)Time to delamination (T-260/280/288/300)(IPC-TM-650, 2.4.24.1)oCharacterizes interfacial adhesionTemperature of decomposition (Td)(IPC-TM-650, 2.3.40)oCharacterizes breakdown of epoxy material© 2004 - 2007 2010

Thermal Parameters and IPC Slash SheetsHDI Printed Circuit Boards, NCAB Group© 2004 - 2007 2010

PCB Material SelectionBoard thickness IR-240~250℃ Board thickness IR-260℃≤60milTg140 DicyAll HF materials OK≤ 60milTg150 DicyHF- middle and high Tg materials OK60~73milTg150 DicyNP150, TU622-5All HF materials OK60~73milTg170 DicyHF –middle and high Tg materials OK73~93milTg170 Dicy, NP150G-HFHF –middle and high Tg materials OK73~93milTg150 Phenolic + FillerIS400, IT150M, TU722-5, GA150HF –middle and high Tg materials OK93~120milTg150 Phenolic + FillerIS400, IT150M, TU722-5Tg 150HF –middle and high Tg materials OK93~130milPhenolic Tg170IS410, IT180, PLC-FR-370 Turbo, TU722-7HF –middle and high Tg materials OK121~160milPhenolic Tg170IS410, IT180, PLC-FR-370 TurboTU722-7HF –high Tg materials OK≧131milPhenolic Tg170 + FillerIS415, 370 HR, 370 MOD, N4000-11HF –high Tg materials OK≧161milPhenolicTg170 + FillerIS415, 370 HR, 370 MOD, N4000-11HF material - TBD≧161milTBD – Consult Engineering for specificdesign review1.Copper thickness = 2OZ use material listed on column 260 ℃2.Copper thickness >= 3OZ use Phenolic base material or High Tg Halogen free materials only3.Twice lamination product use Phenolic material or High Tg Halogen free materials only (includes HDI)4.Follow customer requirement if customer has his own material requirement5.DE people have to confirm the IR reflow Temperature profileJ. Beers, Gold Circuits© 2004 - 2007 2010

PTV Degradation due to Assembly© 2004 - 2007 2010

What is a Plated Through Via?ooA plated through via (PTV) is aninterconnect within a printed circuitboard(PCB) that electrically and/or thermallyconnects two or more layersPTV is part of a larger family ofinterconnects within PCBs© 2004 - 2007 2010

PCB Materials: StackupoMaximum stress in the PTVduring thermal cycling tends tobe in the middle of the barreloThere is some concern that areasof high resin content in themiddle of the barrel can bedetrimentaloNon-functional pads (NFP)oSome debate as to their influenceon barrel fatigue on higher aspectratio PTVF. Su, et. al., Microelectronics Reliability, June 2012© 2004 - 2007 2010

PCB ViasBlind Microvias(Filled or Unfilled)Buried Microvias(Filled or Unfilled)© 2004 - 2007 2010

PCB ViasPlated Through Holes© 2004 - 2007 2010

How do PTV’s Fail?oThe dominant failure mode inPTV tends to be barrel fatigueoBarrel fatigue is thecircumferential cracking of thecopper plating that forms thePTV walloDriven by differentialexpansion between thecopper plating(~17 ppm) and the out-ofplaneCTE of the printedboard(~70 ppm)© 2004 - 2007 2010

How to Design a Reliable PTV?PTH Architecture(height / diameter)+PCB Material(modulus / CTE)+Plating(thickness / material)© 2004 - 2007 2010

PTV ArchitectureoooPTV HeightooDriven by the PCB thickness30 mil (0.75 mm) to 250 mil (6.25 mm)PTV DiameterooDriven by component pitch/spacing6 mil (150 micron) to 20 mil (500 micron)Key IssuesooBe aware that PCB manufacturing has cliffsQuantify effect of design parameters usingIPC TR-579© 2004 - 2007 2010

PCB Industry PTV Capability95% of Industry95% of Industry5% of Industry5% of Industry1.2 – 1.6mm PCB Thickness2.3 – 3.2mm PCB ThicknessDDI TechRoadmap 2011Via Diameter(mil / um)PCB Thickness (mil / mm)Standard Advanced Engineering6 / 150 N/A 39 / 1.0 60 / 1.58 / 200 64 / 1.6 80 / 2 96 / 2.410 / 250 100 / 2.5 120 / 3 160 / 4IBM PCB-OS Symposium 2007, Roadmap Technology Verification,Conductor Analysis Technologies (CAT)oMinimal technologicalprogress over past 10years© 2004 - 2007 2010

The PTV CliffoooData from 26 PCB manufacturersWide range of PCB designsoo6 to 24 layer62 to 125 mil thicknessResults after six lead-free reflowsoInitial defects segregatedCourtesy of CAT© 2004 - 2007 2010

IPC TR-579oRound Robin Reliability Evaluationof Small Diameter (

IPC TR-579 (cont.)oDetermine stress applied (σ)o Assumes perfectly elastic deformation when below yieldstrength (Sy)o Linear stress-strain relationship above SyhdtEaTPTV HeightPTV DiameterPlating ThicknessElastic ModululsCoefficient of Thermal ExpansionTemperature (oC)© 2004 - 2007 2010

IPC TR-579 (cont.)oDetermine strain range (∆ε)© 2004 - 2007 2010

IPC-TR-579 (Calibration Constants)o Strain distribution factor, Kd (2.5 –5.0)o2.5 recommendedo Quality index, K Q (0 –10)o Extraordinary (K Q = 10)o Superior (K Q = 8.7)o Good (K Q = 6.7)o Marginal (K Q = 4.8)o Poor (K Q = 3.5)o Some companies assume K Q = 5© 2004 - 2007 2010

IPC TR-579 (cont.)o Iteratively calculate cycles-to-failure (Nf)Two key plating propertiesDf Elongation (assumed ~30%)Su Tensile Strength (assumed ~40,000 psi)© 2004 - 2007 2010

Assessment of IPC-TR-579ooAdvantagesoooAnalytical (calculation straightforward)Validated through testingProvides guidance on relative influence of design/material parametersDisadvantagesooooooooNo ownershipValidation data is ~18 years oldUnable to assess complex geometries (PTH spacing, PTH pads)o Complex geometries tend to extend lifetimeDifficult to assess effect of multiple temperature cycleso Can be performed using Miner’s RuleSimplified assumptions (linear stress-strain above yield point)How does one determine the quality index in the design phase?Does not account for the effect of fillDoes not consider other failure modes (knee cracking, wall-pad separation, etc.)© 2004 - 2007 2010

The Effect of Design Parameters (Height / Diameter)oReduce the PTV Height (PCB Thickness)oooReduce laminate/prepreg thickness (2.7 to 4 mil is current limitation)Results in minimal cost changes and minimal effect on designHas the least effect on PTH reliabilityoIncrease PTV DiameteroooTypically not an option due to spacing issuesAn important, but significant effect (dependent on a number of othervariables)Example: Moving from 10 mil to 12 mil diameter on a 120 milboard, 50C temp cycle, will result in approximately 20%improvement© 2004 - 2007 2010

Effect of Design Parameters (cont.)W. Engelmaier, Reliability Issues for Printed Circuit Boards in Lead-Free Soldering© 2004 - 2007 2010

Effect of Design Parameters (cont.)Simulation(PTV Height = 1.6mm)Testing(PTV Height = 1.6mm?)oS. Neumann, Theoretical and Practical Aspects of Thermo Mechanical Reliability in Printed Circuit Boards with CopperPlated Through Holes© 2004 - 2007 2010

Effect of Design Parameters (cont.)F. Su, et. al., Microelectronics Reliability, June 2012© 2004 - 2007 2010

Plating (Thickness and Material Properties)oConsidered to be the numberone driver for PTV barrel fatigueoClassic engineering conflictooBetter properties (greater thickness, higher plating strength, greaterelongation) typically require longer time in the plating bathLonger time in the plating bath reduces throughput, makes PCBsmore expensive to fabricateoPCB fabricators, low margin business, try to balance theseconflicting requirementsoKey parameters are thickness, strength, and elongation (ductility)© 2004 - 2007 2010

Plating ThicknessoSpecifications tend to range from 0.8 mil (20 microns) to1.0 mil (25 microns) to 1.2 mil (30 microns)oPlating thickness can be less of an issue than seen in thepastoNew formulations to fill microvias can drive anaccelerated plating processoSome PCB manufacturers, depending on the design andproduction volume, will plate the PTV almost closed© 2004 - 2007 2010

Case Study: Microvia Fill and PTV ReliabilityoOEM moved to microvias for firsttimeoPCB manufacturer recommended via filloHigh plating rate process was notoptimized, resulting in porous finalplating layeroOnce a crack is initiated, rapid failure© 2004 - 2007 2010

Case Study (cont.)500x200xCrack propagating acrossthe entire PTH barrel500x© 2004 - 2007 2010

Plating Mechanical PropertiesoIndustry Requirements (IPC-6012C)o Ultimate Tensile Strength 36,000 psi (250 MPa)o Elongation 12%Controlled measurements from 26different plating baths(Top 25 PCB manufacturer)© 2004 - 2007 2010

The Reality of PTV Performance (cont.)oPCB Manufacturers tend to be very aware of testrequirements specified by larger/higher rel customersoPlating conditions are adjusted to meet the test requirementsof those industries / customers© 2004 - 2007 2010

Cycles to FailureThe Reality of PTV Performance30002500NoneNoneNone230C*6cyc230C*6cyc230C*6cyc245C*6cyc245C*6cycNoneNoneNone230C*6cyc230C*6cyc230C*6cyc245C*6cyc245C*6cyc786 Test CouponsPTV Height: 62 – 275 milPTV Diameter: 12 milIS-410 & IT-18020001500100050005 6 7 8 9 10 11 12 13Aspect Ratio© 2004 - 2007 2010

Post-Plating Measurements of Plating PropertiesMean Hardness = 96 KnoopMean Hardness = 262 KnoopooOne of the challenges of root-cause analysis of PTV cracking isthe inability to directly measure strength/ductility of the platingHardness and grain size measurements are potential substitutes© 2004 - 2007 2010

Post-Plating MeasurementsoHardness data indicated good separation between two populationsooo100% correlation with cross section resultsBoards with cracks had high hardnessBoards without cracks had low hardness109876543210Mean “good”Mean “bad”60 70 80 90 100 110 120 130 140 150 160 170 180 220 260 300 340 380Visual GoodHardness (Knoop)Visual Bad© 2004 - 2007 2010

Other PlatingsoThick nickel plating down the barrel can also extendlifetimeoCaveat: Poor nickel plating can result in much shorter times tofailureProof is in the PTH -- Assuring Via Reliability from Chip Carriers to Thick Printed Wiring Boards, K. Knadle© 2004 - 2007 2010

Other Platings (cont.)oS. Neumann, Theoretical and Practical Aspects of Thermo Mechanical Reliability in Printed Circuit Boards with CopperPlated Through Holes© 2004 - 2007 2010

How to Test/Qualify a Reliable PTV?oThere are currently six procedures for testing/qualifying aPTVooooooModeling and simulationCross-sectioning + solder float/shockThermal shock testing (also thermal cycling)Interconnect stress testing (IST)Printed Board Process Capability, Quality, and Relative Reliability(PCQR2)Highly Accelerated Thermal Shock (HATS)oWhat does DfR recommend?© 2004 - 2007 2010

Test / Qualify PTVoQualifying PTV is a two-step processoThe first step is to qualify the design and the PCBmanufactureroInitial qualificationoThe second step is to initiate ongoing testing to monitoroutgoing qualityoLot qualification© 2004 - 2007 2010

Initial QualificationooQualify the design through simulation / modelingDfR has implemented IPC TR-579 into our AutomatedDesign Analysis software, Sherlock, to allow for rapidassessment of PTV robustnessoFirst step: Definethe environment(test or field or both)© 2004 - 2007 2010

Simulation and ModelingoSecond step: Uploaddesign informationoInclude thermal maps,if appropriateoThird step: Select thelaminate and prepregmaterialoStackup and copperpercentageautomatically identified© 2004 - 2007 2010

© 2004 - 2007 2010Results: Five Different Outputs

Initial Qualification (PCQR2)oQualify the design and manufacturer through PCQR2oConsists of a coupon design, a test standard, and a databaseo 18″ x 24″ layout with 1″ x 1″ test modules (352)ooo2 – 24 layers (rigid, rigid-flex)Three panels / three non-consecutive lotsSimulated assembly (6X) and thermal cycling (HATS)© 2004 - 2007 2010

PCQR 2 (cont.)oAdvantagesoooIndustry standard (IPC-9151)Plug and playProvides real data for understanding of PCB suppliercapabilities and comparison to the rest of the industry throughthe use of an anonymous databaseoDisadvantagesooIndustry-certified monopoly$2K - $5K, not including panel costs© 2004 - 2007 2010

Lot QualificationoInterconnect stress testing (IST) is the overwhelmingfavorite of high reliability organizationsooooSmall (1 x 4) coupon can fit along the edge of the panelTesting is automatedWidely usedAbility to drive barrel fatigue and post separationoLarge number of holes (up to 300) and continuousresistance monitoring makes it far superior to crosssectioningoAnd it should be cheaper!© 2004 - 2007 2010

IST – Issues / AwarenessoooooCoupon design is critical (IST can be prone to problems)Need to specify preconditioning (IST or real reflow oven?)Need to specify frequency (every lot, every month, everyquarter)Need to specify maximum temperature (some debate onthe validity of results when above the Tg)o130, 150, and 175C are the most commonNeed to specify requirementsoDifferent markets/organizations specify different times to failure(300, 500, and 1000 cycles are most common)© 2004 - 2007 2010

ConclusionoThe base knowledge and understanding of PTV Fatigue isrobustooDecades of testing and simulationUse of reliability physics is best practiceoDetailed understanding is still missingooKey expertise (process parameters, material properties, simulation,testing) is rarely in the same organizationNot a pure science activity (significant amount of human influence)oImprovements in out-of-plane CTE and plating properties havegreatly improved PTV performanceoAvoiding defects continues to be the biggest risk© 2004 - 2007 2010

PCB Conductive Anodic Filaments (CAF)oooCAF also referred to as metallic electro-migrationElectro-chemical process which involves the transport (usually ionic) of ametal across a nonmetallic medium under the influence of an appliedelectric fieldCAF can cause current leakage, intermittent electrical shorts, and dielectricbreakdown between conductors in printed wiring boards© 2004 - 2007 2010

CAF: ExamplesInfluenced by electric field strength, temperature, humidity,laminate material, soldering temperatures, and the presence ofPCB manufacturing defects.AARequest a CAF-resistant laminate and monitor PCBsupplier plating & drilling processes!A:A Cross-Section© 2004 - 2007 2010 63

© 2004 - 2007 2010CAF: Examples

Strain Flexure Issues & Pad CrateringCleanlinessElectro-Chemical Migration (ECM)© 2004 -– 20072010

Tensile force onpad and LaminateSAC Solder is More Vulnerable to StrainSources of strain can be ICT, stuffingthrough-hole components,shipping/handling, mounting to a chassis,or shock events.NEMI study showed SAC is moreSensitive to bend stress.Laminate LoadBearingCapabilityLFPbSnLF limitPbSn limitPCB deflectionOnew ay Analysis of Load (kN) By Solder Alloy0.50.450.4Load (kN)0.350.30.250.20.150.1SACSolder AlloySn-PbEach PairStudent's t0.05Means and Std Dev iations© 2004 - 2007 2010LevelSACSn-PbNumber1818Mean0.2308590.416101Std Dev0.0565910.040408Std Err Mean0.013340.00952Lower 95%0.202720.39601Upper 95%0.259000.43620

Strain & Flexure: Pad CrateringoCracking initiating within the laminate during adynamic mechanical eventoIn circuit testing (ICT), board depanelization, connectorinsertion, shock and vibration, etc.G. Shade, Intel (2006)© 2004 - 2007 2010

Pad CrateringIntel (2006)oDriversooooFiner pitch componentsMore brittle laminatesStiffer solders (SAC vs. SnPb)Presence of a large heat sinkoDifficult to detect usingstandard proceduresoX-ray, dye-n-pry, ball shear, andball pull© 2004 - 2007 2010

Potential Mitigations to Pad Cratering• Design• Non-critical pads• Solder mask defined vs. non-solder mask defined• Pad Geometry• Layout & PCB thickness• Limitations on board flexure• 750 to 500 microstrain, component and layout dependent• Process Control & Validation• Corner Glue• More compliant solder• SAC305 is relatively rigid, SAC105 and SNC are possible alternatives• New laminate acceptance criteria and materials© 2004 - 2007 2010

Component Supplier Practices Intel Example© 2004 - 2007 2010

Pad Geometry• Pad design influences failure• Smaller pads result in higher stress under a givenload• Solder mask defined pads can provideadditional strength• Increases tolerable strain• But, moves failure location from pad crater tointermetallic fracture© 2004 - 2007 2010

Contamination and CleanlinessooooBelieved to be one of theprimary drivers of fieldissues in electronics todayo Induces corrosion and metal migration(electrochemical migration – ECM)Intermittent behavior lends itself tono-fault-found (NFF) returnso Driven by self-healing behavioro Difficult to diagnosisPervasiveo Failure modes observed on batteries, LCDs, PCBAs, wiring, switches,etc.Will continue to get worse© 2004 - 2007 2010

Future of Contamination / CleanlinessooooContinued reductions in pitch between conductors will make futurepackaging more susceptibleIncreased use of leadless packages (QFN, land grid array, etc.) resultsin reduction in standoffo Will reduce efficiency of cleaning, which may lead to increasedconcentration of contaminantsIncreased product sales into countries with polluted and tropicalenvironments (East Asia, South Asia, etc.)o ECM occurrence very sensitive to ambient humidity conditionsPb-Free and smaller bond padso Require more aggressive flux formulations© 2004 - 2007 2010

The Future: Reduced SpacingsoCritical distance effect?o Two studies by DfR staffooooNaCl seedingConformal coating over no-clean flux residuesOver 300 coupons tested (IPC-B-25)o6.25, 12.5, and 25 mil spacings; 40C/93%RH, 65C/88%RH, 85C/85%RHNo ECM at 25 mil spacingsooExperience based onolder designs may notbe validTest coupons musthave the same spacing andsame electric field as actualproductParameterPeripheral Flip Chip SolderBumpsThin Shrink Small OutlinePackage (TSSOP) LeadsPCB External Traces (lowvoltage line)Spacing5 mil (120 mm)7 mil (170 mm)4 mil (100 mm)BGA Substrate Traces2 mil (48 mm)© 2004 - 2007 2010

Failure ModeoWhy do you care about excessive contamination orinsufficient cleanliness?Electrochemical Migration(note: not Electromigration; completely different mechanism)oUnderstanding the mechanism provides insight into thedrivers and appropriate mitigations© 2004 - 2007 2010

What is ECM?oMovement of metal through an electrolytic solution underan applied electric field between insulated conductorsoElectrochemical migration can occur on or in almost allelectronic packagingoooooDie surfaceEpoxy encapsulantPrinted boardPassive componentsEtc.© 2004 - 2007 2010

ECM MechanismsoooSome ECM Mechanisms have more definitive descriptionsDendritic growthooDescriptor for ECM along asurface that produces adendrite morphology“Tree-like”, “Feather-like”Conductive anodic filaments(CAF)oDescriptor for migration withina printed circuit board (PCB)© 2004 - 2007 2010

PCB Cleanliness: Moving ForwardoooooExtensive effort to update PCB Cleanliness StandardsIPC-5701: Users Guide for Cleanliness of Unpopulated PrintedBoards (2003)IPC-5702: Guidelines for OEMs in Determining AcceptableLevels of Cleanliness of Unpopulated Printed Boards (2007)IPC-5703: Guidelines for Printed Board Fabricators inDetermining Acceptable Levels of Cleanliness of UnpopulatedPrinted Boards (Draft)IPC-5704: Cleanliness Requirements for Unpopulated PrintedBoards (2010)© 2004 - 2007 2010

Nominal Ionic LevelsooooBare printed circuit boards (PCBs)o Chloride: 0.2 to 1 µg/inch 2 (average of 0.5 to 1)o Bromide: 1.0 to 5 µg/inch 2 (average of 3 to 4)Assembled board (PCBA)o Chloride: 0.2 to 1 µg/inch 2 (average of 0.5 to 1)o Bromide: 2.5 to 7 µg/inch 2 (average of 5 to 7)o Weak organic acids: 50 to 150 µg/inch 2 (average of 120)Higher levelso Corrosion/ECM issues at levels above 2 (typically 5 to 10)o Corrosion/ECM issues at levels above 10 (typically 15 to 25)o Corrosion/ECM issues at levels above 200 (typically 400)General ruleo Dependent upon board materials and complexity© 2004 - 2007 2010

Cleanliness ControloooIncoming PCB CleanlinessoCleanliness testing performed using ROSE (resistivity of solvent extracted)or Omega-Meter method (ionic cleanliness, NaCl equivalent)Consider cleanliness requirements in terms of IC (ionchromatography) test for PCBs using WS fluxoooDon’t use ROSE or Omegameter test as single option (at all? Risk from dirtyIPA)Inspection method with accept/reject limitSampling criteriaControl cleanliness throughout the process from start to finish.© 2004 - 2007 2010

Process Material Qualification – SIR RecommendationoValidate compatibility and performanceof all new process materials using SIRtesting.ooIPC-B-52 SIR TEST VEHICLE (shown below)IPC-A-52:Cleanliness and Residue EvaluationTest Board – Single User CD-ROMooThe IPC-B-52 test board is intended to bea process qualification vehicle, with thematerials of construction and source oftest boards to be representativehttps://portal.ipc.org/Purchase/ProductDetail.aspx?Product_code=5e7a8626-b486-db11-a4eb-005056875b22© 2004 - 2007 2010

Surface Finishes© 2004 -– 20072010

Importance of Surface FinishooooThe selection of the surface finish to be used on your PCBscould be the most important material decision made for theelectronic assembly.The surface finish influences the process yield, the amountof rework necessary, field failure rate, the ability to test,the scrap rate, and of course the cost.One can be lead astray by selecting the lowest costsurface finish only to find that the total cost is much higher.The selection of a surface finish should be done with aholistic approach that considers all important aspects of theassembly.© 2004 - 2007 2010

Surface Finishes - Post Pb-FreeooMultiple Pb-Free Surface Finish Options Now Exists.oNo clear winner, no ideal solution.2003Each PCB surface has different advantages and disadvantagesthat affects fabrication, solderability, testability, reliability, orshelf life.Surface Finishes,WorldwideoooThe 5 most popular Pb-Free Surface Finishes are:oooooElectroless nickel/immersion gold (ENIG)oAnd ENEPIG (electroless Pd added)Immersion silver (ImAg)Immersion tin (ImSn)Organic solderability preservative (OSP)Pb-free HASL.2007These finishes (except for Pb-free HASL)have been in use for several years.Newer finishes are currently being developed (direct Pd,PTFE-like coatings, etc.18%Ref: J. BeersGold Circuits© 2004 - 2007 2010

Surface Finish Selection ApproachoooooComponent Procurement: Select the cheapest one and let theengineers figure out how to use it.PCB Engineer: Select the finish that is easiest for the suppliers toprovide (their sweet spot); let the assembler figure out how touse it.Assembly Engineer: Select the finish that provides the largestprocess window for assembly and test.Sustaining Engineer: Select the finish that minimizes field failures.CEO: Select the finish that minimizes the overall cost (includingreliability risk).© 2004 - 2007 2010

Surface Finish Selection Considerationso Cost sensitivityo Volume of product (finish availability)o SnPb or LF processo Shock/Drop a concern?o Cosmetics a concern?o User environment (corrosion a concern)?o Fine pitch assembly ( 0.062”)o High yield ICT is important?© 2004 - 2007 2010

Surface Finish Selection GuidelineAttributesCost SensitiveProductHigh VolumeRequiredCosmetics of Finishis ImportantPb-Free WaveSolder(PCB > 62mil)SFTypeHigh Yield ICTRequiredPb-FreeShock/Drop is aConcernFine PitchComponents UsedIs Importantto ProductWire bonding toFinish is RequiredCorrosion Failure isPossibleIs not requiredfor the Product© 2004 - 2007 2010

Surface Finish Selection GuidelineAttributesCost SensitiveProductHigh VolumeRequiredCosmetics of Finishis ImportantHigh Yield ICTRequiredPb-Free WaveSolder(PCB > 62mil)OSPPb-FreeShock/Drop is aConcernIs Importantto ProductFine PitchComponents UsedWire bonding toFinish is RequiredCorrosion Failure isPossibleIs not requiredfor the Product© 2004 - 2007 2010

OSP Issues: Plated Through-Hole Fill• Solder fill is driven by capillary action• Important parameters• Hole diameter, hole aspect ratio, wettingforce• Solder will only fill as long as itsmolten (key point)• OSP has lower wetting force• Risk of insufficient hole fill• Can lead to single-sided architecture• Solutions:• Changing board solderability plating• Increasing top-side preheat• Increasing solder pot temperature(some go as high as 280ºC)• Not recommended!• Changing your wave solder alloyP. Biocca, Kester© 2004 - 2007 2010

In Circuit Test w/ OSP – test via challengesooProbing through HT OSP is not recommended.Solder paste is printed over OSP test pads/vias (leaving flux residue with no-cleanpaste).OSPMetallic FinishesFlux residue onsurface (smallissue)Test PadFlux residue poolsin dimple and limitsprobe contact.Test Via© 2004 - 2007 2010Space constraints on PCB make it difficult to eliminate test vias.

Surface Finish Selection GuidelineProductAttributesCost SensitiveProductHigh VolumeRequiredCosmetics of Finishis ImportantHigh Yield ICTRequiredPb-Free WaveSolder(PCB > 62mil)ImAgPb-FreeShock/Drop is aConcernIs Importantto ProductFine PitchComponents UsedWire bonding toFinish is RequiredCorrosion Failure isPossibleIs not requiredfor the Product© 2004 - 2007 2010

Immersion Silver Ag (ImAg)• Single material system• Specified by IPC-4553• Thickness is typically 6-20 u”• Benefits• Good flatness & coplanarity• Good shelf life if packaged properly.• Good oxidation resistance & shelf life.• Good wettability and reflowperformance.• Good testability• Low cost© 2004 - 2007 2010

ImAg Trace EtchingSolder maskGalvanic etching can occur SM edge if PCBrinsing and drying not adequately performed.© 2004 - 2007 2010

ImAg - MicrovoidsoVoid under silver causes void at interface.Microvoids survived shocktesting but cause earlyfailure in thermal cycling.Ref: Mukadam, “Planar Microvoids in LF Solder Joints”, SMTA, 2006.© 2004 - 2007 2010

Typical Creep Corrosion• Corrosion product is poorly conductive (resistance of about 1Mohm).• Conductivity is higher when the humidity is high.• Field returns often function fine – since corrosion product has dried out.• Features most sensitive to leakage current will trigger the system failure (failingsymptoms can vary system-to-system).• Visual inspection is often required to diagnose.© 2004 - 2007 2010

ImAg Creep Corrosion - Affected LocationsooooooooooPaper millsRubber manufacturing (tires for example).FertilizerWaste water treatmentMining/smeltingCement or asphalt productionPetrochemicalClay modeling studiosRegions of the world with poor air qualityEtc. - includes companies nearby such industries• Product is less impacted if airflow to PCBA is restricted.© 2004 - 2007 2010

Wetting Force ( mN/mm)Impact of Tarnish400oShelf life can be an issueooIf not stored in protective bagsSignificant degradation whenexposed to corrosive gases3002001000-100-2000 Months Shelf HASL6 months Shelf HASL0 months Shelf ImmAg0 months Field ImmAg-3006 months Shelf ImmAgoooTime (sec)Tarnish after assembly is mostly cosmetic – but will impactperception of quality.If PCBA is visible to user tarnish may be an issue.Scrap costs may increase considerably if PCBAs are repairedand sent back into service.oBoards that appear black but are still functional are often thrown out.-4000 2 4 6 8 10 12© 2004 - 2007 2010

Surface Finish Selection GuidelineProductAttributesCost SensitiveProductHigh VolumeRequiredCosmetics of Finishis ImportantHigh Yield ICTRequiredPb-Free WaveSolder(PCB > 62mil)ImSnPb-FreeShock/Drop is aConcernIs Importantto ProductFine PitchComponents UsedWire bonding toFinish is RequiredCorrosion Failure isPossibleIs not requiredfor the Product© 2004 - 2007 2010

Immersion Sn (ImSn)• A single material system• Specified by IPC-4554• Benefits• Standard thickness: 1 micron (40 microinches)• Some companies spec up to 1.5 microns (65 microinches)• Excellent flatness, low cost• Not as popular a choice with PCB fabricators.• Environmental and health concerns regarding thiourea(a known carcinogen)• Some concern regarding tin whiskering (minimal)© 2004 - 2007 2010

Oxide Thickness (nm)ImSn: Quality Issues & Failure Mechanisms• Insufficient thickness.• Decreases solderability duringstorage or after 2 nd reflow – due toIMC growth through the thickness.• Solderability problems with Oxidethickness greater than 5 nm.• Excessive oxide thicknesses (50-100nm)periodically observed.• Drivers of oxidation.• Exposure to humid conditions (>75%RH)• Greatly accelerates oxide growththrough the creation of tin hydroxides.• Use sealed moisture/air tightwrapping for shipping and cool, lowhumidity storage.• Cleanliness of the raw board.• Contaminates breaks down self-limitingnature of tin oxides.• Accelerates oxide growth.© 2004 - 2007 201010090807065°C/85%RH6050403085°C2065°C1030°C00 20 40 60 80 100 120Time (Days)

Surface Finish Selection GuidelineProductAttributesCost SensitiveProductHigh VolumeRequiredCosmetics of Finishis ImportantPb-Free WaveSolder(PCB > 62mil)ENIGENEPIGHigh Yield ICTRequiredPb-FreeShock/Drop is aConcernIs Importantto ProductFine PitchComponents UsedWire bonding toFinish is RequiredCorrosion Failure isPossibleIs not requiredfor the Product© 2004 - 2007 2010

ENIG: Primary Reliability Risks• Black pad drivers• Phosphorus content• High levels = weak, phosphorus-richregion after soldering• Low levels = hyper-corrosion (black pad)Insufficient Phosphorous will not preventcorrosion during the highly acidicimmersion gold (IG) process.• Cleaning parameters• Gold plating parameters• Bond pad designs• Causes a drop in mechanical strength• Difficult to screen• Can be random (e.g., 1 pad out of 300)Images of Black Pad• Ni-Sn intermetallic produces a brittleinterface when used with SAC solder.Phosphorus-Rich Dark Streak© 2004 - 2007 2010

ENIG - Ni Interface Issues w/ SACBrittle SnNi intermetallics fail more easily with a high modulus LF solder ball.These cracks resulted from product handling.© 2004 - 2007 2010

Electroless Nickel/Immersion Gold (ENIG)• Two material system.• Defined by IPC-4552 Specification forElectroless Nickel/Immersion Gold.• Electroless nickel.• 3 – 6 microns• Thin Immersion gold top coat• 0.08-0.23 microns• Benefits• Excellent flatness and long-term storage (shelf life).• Excellent oxidation resistance and wetting properties.• Robust for multiple reflow cycles,• Supports alternate connections (wirebond, separable connector) & electrical testability.• Moderate costs.• Gold readily dissolves into solder and does not tarnish or oxidizemaking it an excellent choice for a surface finish.• But gold cannot be directly plated onto copper, since copper diffuses into gold,which allows the Cu to reach the surface and oxidize which reduces solderability.• Nickel is serves as a barrier layer to copper,the thin gold coating protects the nickel from oxidizing.© 2004 - 2007 2010

Unreliability, F(t)ENIG: Mechanical Shock with SAC305 solder• ENIG Less Robust than OSP.• SAC less robust than SnPb• Plating is an important driver• SnNi vs. SnCu intermetallicsR eliaSoft's W eibull++ 6.0 - w w w .W eibull.c om99.0090.0050.00Probability - WeibullSAC305 on ENIGSAC305 on OSPW eibullPb-Free on ENIGW3 RR3 - SRM MEDF= 6 / S= 0Pb-Free on OSPW3 RR3 - SRM MEDF= 5 / S= 1SnPb on OSPW3 RR3 - SRM MEDF= 3 / S= 310.005.00SnPb on OSP1.001.00 10.00100.00Number of DropsCraig HillmanDfR Solutions7/29/2005 10:27 35x35mm, 312 I/O BGA© 2004 - 2007 2010

ENEPIGElectroless Ni – Electroless Pd – Immersion AuooAddition of the electroless palladium layer provides twoprimary advantages.1. It prevents black pad (since gold bath doesn’t come in contact withNi).2. It enhances the wire bondability of the finish.Pd thickness is typically in the range 2-30 microinches.© 2004 - 2007 2010

Surface Finish Selection GuidelineProductAttributesCost SensitiveProductHigh VolumeRequiredCosmetics of Finishis ImportantPb-Free WaveSolder(PCB > 62mil)Pb-FreeHASLHigh Yield ICTRequiredPb-FreeShock/Drop is aConcernIs Importantto ProductFine PitchComponents UsedWire bonding toFinish is RequiredCorrosion Failure isPossibleIs not requiredfor the Product© 2004 - 2007 2010

Pb-Free HASL (Hot Air Solder Leveling)• Good choice when excellent solderability is required• Thick boards that require LF wave soldering.• Robust in multiple reflow cycles.• Long shelf life required• Flatness not as good as other finishes (but an improvementover SnPb HASL).• Could potentially be a problem with very fine pitch components• High volume equipment is not yet in production.• Horizontal LF lines are available but few are in production since highvolume demand is needed to make them cost effective.© 2004 - 2007 2010

Pb-Free HASL: Ni-modified SnCuoAlloy selection is critical.ooSn-Cu will result in high Cu dissolution and poor planarity.SnCuNiGe provides high fluidity and reduced Cu dissolution.oRole of constituentsoooSnCuNiGe AlloySnCu AlloyCu creates a eutectic alloy with lower melt temp (227C vs. 232C), formsintermetallics for strength, and reduces copper dissolutionNi suppresses formation of -Sn dendrites, controls intermetallic growth, grainrefinerGe prevents oxide formation (dross inhibitor), grain refiner© 2004 - 2007 2010

LF HASL – Critical ParametersPre-Clean:ooMicro-etching rateFluxHASL:o LF Alloyo Pot temperature (~265C)o Front & Back air knife pressureo Front & Back air knife angleo Distance between air knife & PCBo Lifting speedo Dwell time (~ 2-4 sec)Post-Clean:o Final flux clean and rinsing© 2004 - 2007 2010

Newer Finishes to the MarketProductAttributesCosmetics of Finishis ImportantPb-Free WaveSolder(PCB > 62mil)Cost SensitiveProductLower cost than ENIGEPdHigh VolumeRequiredHigh Yield ICTRequiredPb-FreeShock/Drop is aConcernIs Importantto ProductFine PitchComponents UsedWire bonding toFinish is RequiredCorrosion Failure isPossibleNeeds verificationIs not requiredfor the Product© 2004 - 2007 2010

Electroless PdProcess SequenceAcidCleanerRinseMicroetchRinsePre-DipActivatorRinseE-PalladiumRinseRinseDryCourtesy of OMGI© 2004 - 2007 2010

Newer Finishes to the MarketProductAttributesCosmetics of Finishis ImportantPb-Free WaveSolder(PCB > 62mil)Cost SensitiveProductThese will become morefavorable with time.PlasmaCoatingHigh VolumeRequiredHigh Yield ICTRequiredPb-FreeShock/Drop is aConcernIs Importantto ProductFine PitchComponents UsedWire bonding toFinish is RequiredCorrosion Failure isPossibleIs not requiredfor the Product© 2004 - 2007 2010

Plasma Coated FinishoooooCoated in plasma chamber.Many panels coated simultaneously.Film is 60 nm thick.Flux breaks through film at elevatedtemperature.Hydrophobic and acid resistantWire Bond 25um Au Wire – Pull Test600nmCourtesy of Semblant© 2004 - 2007 2010

Examples of Best Application FitsooOSP (but must address ICT issues)oooooHand held electronicsNotebook computersBasic desktop computersBasic consumer electronics & power suppliesSimple Pb-free Medical or aerospace (thin PCBs)ENIG or ENEPIGooSnPb medical and aerospacePb-free that is not susceptible to shock© 2004 - 2007 2010

Examples of Best FitsoooImAgooImSnoooFully enclosed hand held electronicsBasic consumer electronics – low power and airflowSimple consumer electronics (not fully enclosed)Simple medical or aerospace applications (1 side)Low to moderate volume peripheral componentsLF HASLooThick LF PCBs going into business environments (servers, telecomequipment)Complex Pb-Free medical or aerospace?© 2004 - 2007 2010

What to do if there is no SF fit?ooIf no SF fits your specific requirements, designmodifications may be required and tradeoffs made.For example, I need low cost, high volume, corrosionresistant, with good ICT capability.ooOne solution might be to use ImAg but plug the vias withsoldermask to protect from corrosion (but some cost is sacrificed).Another is to use OSP but implement cleaning to remove fluxresidue for probing (cost is again sacrificed).© 2004 - 2007 2010

ExampleoAnother example might be the desire to use ENIG for aPb-free product where shock is a concern.ooOne solution might be to underfill critical components sensitive toshock (cost adder).Another might be to dampen the shock by better design of theenclosure (possible cost adder).© 2004 - 2007 2010

SummaryoooooThe surface finish you select will have a largeinfluence on quality, reliability and cost.It is a complex decision that impacts many areas ofthe business.Select a finish that optimal for the business (and notjust one function).Know that there are engineering tricks to improve onweak areas of each finish.Stay current in this field because new developmentscontinue to be made.© 2004 - 2007 2010

SummaryooooTo avoid design mistakes, be aware thatfunctionality is just the beginning. Designreliability in!Be aware of industry best practicesMaximize knowledge of your design as early inthe product development process as possiblePractice design for excellence (DfX)ooooDesign for manufacturabilityDesign for sourcingDesign for reliabilityDesign for environment© 2004 - 2007 2010

ConclusionsoooDesign for Reliability is a valuable process forlowering cost, reducing time-to-market, andimproving customer satisfactionPoF is a powerful tool that can leverage thevalue of DfR activitiesSuccessful DfR / PoF implementation requiresthe right combination of personnel and tools andtime limitations© 2004 - 2007 2010

Instructor Biography• Cheryl Tulkoff has over 22 years of experience in electronics manufacturing with an emphasis onfailure analysis and reliability. She has worked throughout the electronics manufacturing life cyclebeginning with semiconductor fabrication processes, into printed circuit board fabrication andassembly, through functional and reliability testing, and culminating in the analysis and evaluation offield returns. She has also managed no clean and RoHS-compliant conversion programs and hasdeveloped and managed comprehensive reliability programs.• Cheryl earned her Bachelor of Mechanical Engineering degree from Georgia Tech. She is apublished author, experienced public speaker and trainer and a Senior member of both ASQ andIEEE. She has held leadership positions in the IEEE Central Texas Chapter, IEEE WIE (Women InEngineering), and IEEE ASTR (Accelerated Stress Testing and Reliability) sections. She chaired theannual IEEE ASTR workshop for four years is an ASQ Certified Reliability Engineer and a member ofSMTA and iMAPS.• She has a strong passion for pre-college STEM (Science, Technology, Engineering, and Math) outreachand volunteers with several organizations that specialize in encouraging pre-college students topursue careers in these fields.© 2004 - 2007 2010

Contact Information• Questions?• Contact Cheryl Tulkoff, ctulkoff@dfrsolutions.com,512-913-8624• askdfr@dfrsolutions.com• www.dfrsolutions.com• Connect with me in LinkedIn as well!© 2004 - 2007 2010