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Yole Développement top 30 MEMS ranking: STMicroelectronics ...

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APRIL 2012 issue n°128THE DISRUPTIVE SEMICONDUCTOR TECHNOLOGIES MAGAZINEADVANCED PACKAGINGGeorgia Tech proposes industry consortium on advanced packaging technologiesand heterogeneous 3D integrationwins first orderFrom page 1GT-PRC has demonstrated groundbreakingtechnologies that include ultra-thin organicsubstrates, fine-pitch Cu-to-Cuinterconnections, low temperature bonding with highassembly throughput and prototype functionalmodule demonstration of digital Si and RF GaAs dieembedding.3D stackingbeyond PoPUltra-thin package substrateswith low warpageUltra-fine pitch and low profilepackage to package I/OsGT-PRC proposes the next consortium, building uponthe above advances, 3D ThinPack with a focus on:- 3D package stacking beyond conventional PoPleading to ultra-thin stacked modules- Ultra-fi ne pitch and low profi le package-to-packageinterconnections- Novel thermal solutions for embedded thin dieeliminating TIM- 15μm pitch die-to-package Cu-Cu I/Os with highcurrent carrying capability- Ultra-slim substrates with low warpage- Embedded thin IPDsThe primary objective of the proposed 3D ThinPackconsortium is to achieve ultra-miniaturizedUltra-fine pitch, lowprofile interconnectionsheterogeneous sub-systems by 3D integration ofmultiple ultra-slim packages with embedded thinactive or passive components. The two-year goal isto demonstrate a four-package stack within ~1mmthickness by advancing the above fi ve technologiesshown in Fig 1.Novel thermal solution forembedded dieEmbedded thinIPDsProposed technologies for ultra-miniaturized 3D stacked modules (Courtesy of Georgia Tech)The proposed 3D ThinPack research addressesthe need for highly-miniaturized and highlyfunctionalheterogeneous modules with particularfocus on:1. High-yield, low-cost, chip-last embedding withFR4-compatible manufacturing-processes2. Interconnections and assembly processescompatible with existing infrastructurewww.prc.gatech.edu2012 IEEEINTERNATIONAL INTERCONNECTTECHNOLOGY CONFERENCEIITCInnovations In InterconnectionsSHORT COURSE OFFERED ON SUNDAY, JUNE 3The IITC one-day Short Course precedes the technical program,providing an opportunity for instruction and interaction onadvanced interconnect technology, emerging materials anddesign/reliability issues:Scaling Options for Barriers3D InterconnectReliabilityChip Package InteractionOptical InterconnectsBEOL MemoryAdvanced InterconnectsEric Eisenbraun, University of Albany CNSEClair Webb, IntelLucile Arnaud, ST/LETIThomas Shaw, IBMDavid Miller, StanfordJorge Kittl, IMECMizuhisa Nihei, AIST/FujitsuDOUBLETREE HOTELSAN JOSE, CAJUNE 4 – 6, 2012For complete IITC 2012conference and registrationinformation visit:www.his.com/~iitc/Copyrights © <strong>Yole</strong> Développement SA. All rights reserved - Recycled paper17

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