SCTF loop for noise reduction in Autozero amplifiers

SCTF loop for noise reduction in AutozeroamplifiersG. Costa, N. Giménez, A. Arnaud and M. MiguezThe use of a lowpass switched continuous time filter (SCTF) in thenoise cancellation loop of an Autozero amplifier to reduce the whitenoise aliasing effect at low frequencies is presented. The SCTFlimits only the bandwidth of the sampled noise, not the bandwidthof the amplifier. Time domain simulations showing the effect of theSCTF-Autozero on both flicker and white noise are presented, aswell as a designed low-noise electroencephalography (EEG) amplifier(DC – 150Hz) that takes advantage of the proposed technique for a40% reduction of its input rms noise voltage.Introduction: The Autozero (AZ) technique is regularly employed toeliminate offset and reduce flicker noise in precision amplifiers. Aclassic scheme of an AZ is shown in Fig. 1, assuming a value of Rclose to 0. It includes an amplifier and a cancellation loop which periodicallytakes samples of noise and offset. V N represents the amplifier’sinput referred noise (white and flicker noise) and offset. The circuitworks in two phases, Autozero (S 1 ) and Amplification (S 2 ). In theformer phase, usually very short in time, the value of the noise sourceV N is stored in the capacitor C, while in the latter phase the sampledvalue is subtracted from the signal. Thus offset and the highly correlatedflicker noise are greatly reduced. But as pointed in [1], white noise aliasingis a major limitation at low frequencies. In effect, because of noisesampling in the AZ phase, several replicas of the noise spectrum of thelarge bandwidth amplifier are summed at the lower frequencies. Theexcess AZ noise PSD is plotted in Figures 5 and 6 of reference [1]using analytic expressions, in comparison with the original noise spectrumof the amplifier. In the work reported in this present Letter, AZnoise PSD plots equivalent to those in [1] were obtained by means ofa time domain simulation of the random process in the circuit inFig. 1. The results are shown in Fig. 2 (continuous line) for white andflicker noise, both filtered at a frequency f c , normalised against S N ,the non-AZ input referred white noise. In Fig. 2 f c T AZ ¼ 5 andf k T AZ ¼ 1, where T AZ is the period of the AZ process and f k is thenoise corner frequency where flicker and white PSDs are equal. Notethat while flicker noise is reduced, due to aliasing white noise isincreased 15 times at low frequencies. In this Letter, it is demonstratedthat reducing the bandwidth of just the AZ cancellation loop by increasingR’s value in Fig. 1, the effect of white noise aliasing can be reduced.The total bandwidth of the AZ amplifier is preserved, as well as itsflicker noise and offset reduction characteristics.S 2 V N+++ –V in S 1– –S 2S 1+V c C R –SCTFS 1Fig. 1 Scheme of Autozero amplifierSwitches S 1 and S 2 select corresponding phaseIncluding a SCTF AZ block: Consider now a large R in the scheme ofFig. 1: instead of sampling (and holding) the noise source almost instantaneously,the RC circuit will follow V N in a smoother way. If alarge time constant t ¼ RC is selected, instead of samples, a ‘lowpassand hold’ structure is included in the AZ loop, which limits the effectof the aliasing. The AZ principle is preserved but the impact of whitenoise is reduced. However, because it is not a time-invariant system,the noise analysis becomes complex in this so-called switched continuoustime filter (SCTF) working as a continuous-time circuit during theAZ phase, and holding its value during the amplification. SCTF filterswere previously studied, and the analytic tools that allow noise calculationwere developed and applied to a chopper amplifier [2]. In the followingSection, time domain simulations of the proposed AZ circuitincluding an RC network in the noise cancellation loop are presented,showing the trade-off between white noise aliasing reduction andflicker noise reduction. Finally, a designed low-power, low-noiseV outamplifier, aimed at implantable EEG recording using the proposed techniqueis presented.normalised PSDnormalised PSD1614121086420181614121086420–1.0 –0.8 –0.6 –0.4 –0.2 0fTsba0.2 0.4 0.6 0.8 1.0Fig. 2 Output’s PSD of circuit in Fig. 1 for different values of RC, T AZ ¼1.25 msa White noiseb Flicker noiseContinuous line: C ¼ 0, 1 mF, R ¼ 1kV, t ¼ 0.1 ms; dashed line: C ¼ 1 mF,R ¼ 1kV, t ¼ 1 ms; dash dotted line: C ¼ 10 mF, R ¼ 0, 5 kV, t ¼ 5 ms; dottedline: C ¼ 100 mF, R ¼ 0, 5 kV, t ¼ 50 msTime domain simulations: The circuit in Fig. 1 was simulated over afinite time interval for four different values of t, and the output PSDwas calculated with adequate random input vectors V N . The resultsare shown in Fig. 2, considering white and flicker noise separately.The continuous line is the usual sampled Autozero (t ≈ 0), whiledashed and dotted lines show the result for three different t values.Fig. 2 shows that as t increases, the impact of aliasing of white noisedecreases, while flicker noise increases. The lowpass AZ loop is moreimmune to white noise aliasing, but on the other hand it is not sogood to track flicker noise. At this point, a trade-off t can be selected,in which the reduction of offset and flicker noise is achieved, withouta large foldover white noise overhead at low frequencies. In principle,analytic expressions are too complex to solve [2], but a numericaldesign space exploration can be performed.Designed EEG amplifier: In Fig. 3a, the topology of a fully integratedpreamplifier for EEG signals using the proposed AZ technique is shown.It was designed in a 0.6 mm CMOS technology, and is aimed at implantablemedical applications, thus micro power consumption is mandatory.EEG signals have amplitudes of few mV, and a limitedbandwidth up to 150 Hz [3]. The main amplification block is a tripledifferential input transconductor. The first input is used for the signal,the second input for the noise cancellation feedback, and the third onefor the gain control feedback. When S 1 is high and S 2 is low (AZphase), the input signal is disconnected from the amplifier, the amplifier’snoise is filtered in the SCTF lowpass block (RC circuit) and theholding value is stored in C AZ . When S 2 is high and S 1 is low (amplificationphase), the stored voltage on C AZ is subtracted from the inputsignal being amplified.By means of successive numerical simulations, an optimal set of AZparameters was chosen, including R AZ ¼ 1MV, C AZ ¼ 10 pF, the AZfrequency f AZ ¼ 15 kHz and an 85% duty cycle. The output PSD consideringboth white and flicker noise is shown in Fig. 3b. The designedamplifier’s gain is 40 dB, current consumption is only 1.9 mA, and thecalculated input referred noise voltage is 1.6 mV rms over the frequencyELECTRONICS LETTERS 2nd September 2010 Vol. 46 No. 18

ange 0.5–150 Hz. It should be noted that the input rms noise is 40%lower in comparison to an estimated 2.3 mV rms value, if a traditionalsampling AZ (t ¼ 0) is applied to the same amplifier.S 2 V N– +S+V i 2 S 1– V 1+V– 2+V– 3S 2S 2V oC LConclusion: It has been demonstrated that by reducing the bandwidth ofthe noise cancellation loop in a switched way (SCTF), the effect of whitenoise aliasing can be attenuated in AZ amplifiers. Although the resultingflicker noise PSD increases, the total input rms noise can be reduced incomparison to a classical AZ amplifier if the adequate AZ parametersand circuit elements are selected. The result was applied to the designof a precision amplifier for EEG signals.Acknowledgment: The authors thank ANII (Agencia Nacional deInvestigación e Innovación, Uruguay) for financial support throughproject FCE2007_592.S 1S 2S 1SVn, V 2 /Hz × 10 –14SCTFC AZR AZR+G m–V CMa3.02.52.01.51.00.50–1.0 –0.8 –0.6 –0.4 –0.2 0fTsb0.2 0.4 0.6 0.8 1.0Fig. 3 Designed amplifier for EEG signals, and output PSD consideringboth white and flicker noisea Designed amplifier for EEG signalsb Output PSD considering both white and flicker noise# The Institution of Engineering and Technology 201027 May 2010doi: 10.1049/el.2010.1456G. Costa, N. Giménez, A. Arnaud and M. Miguez (Department ofElectrical Engineering, Catholic University of Uruguay, MontevideoCP 11700, Uruguay)E-mail: gcosta@ieee.orgReferences1 Enz, C.C., and Temes, G.C.: ‘Circuit techniques for reducing the effectsof op-amp imperfections: autozeroing, correlated double sampling, andchopper stabilization’, Proc. IEEE, 1996, 84, (11), pp. 1584–16142 Arnaud, A., and Miguez, M.R.: ‘On the evaluation of the exact output ofa switched continuous-time filter and applications’, IEEE Trans. CircuitsSyst. I, Reg. Pprs, 2008, 55, (6), pp. 1421–14293 Denison, T., Consoer, K., Kelly, A., Hachenburg, A., and Santa, W.: ‘A2.2 mW 94nV/ p Hz, chopper-stabilized instrumentation amplifier forEEG detection in chronic implants’. IEEE Int. Solid-State CircuitsConf., (ISSCC 2007), Dig. Tech. Pprs, San Francisco, CA, USA,February 2007, pp. 162–594ELECTRONICS LETTERS 2nd September 2010 Vol. 46 No. 18