Synchronization - Digital Communication Chapter 6 & 7 - Unik

acquisition - going into lockSynchronizationOla JetlundAssume that n ′ (t) = 0 and F (ω) = 1 and that the inputphase isθ(t) = ω i t.Then the output phase can be denotedˆθ(t) = ω o t +∫ t0K 0 sin e(t)dt + ˆθ(0)where ω i is the frequency of the input signal and ω o thefrequency of the output signal and the difference isdenoted∆ω = ω i − ω oIntroductionSynchronizationPhase syncPLLlinear loop modelnonlinear PLL modelSymbol syncFrame sync’Network sync’