Motor Control Lighting Development Tools Motor ... - ICC Media GmbH

MOTOR CONTROLTo collect the data, the Arduino board will send voltage commands tothe motor and measure the resulting motor angles. We create a Simulinkmodel to enable data collection. The host machine must communicatewith the Arduino board to send voltage commands and receive back theangle data. We create a second model to enable this communication.In the model that will run on the Arduino Uno board (Figure 3), theMATLAB® Function block Voltage Command To Pins reads from theserial port and routes the voltage commands to the appropriate pins.We use serial communication protocol to enable the host computer tocommunicate with the Arduino board. In the CreateMessage subsystem,a complete serial message is generated from the motor position dataobtained from one of the analog input pins on the board.>> u = logsout.getElement(1).Values.Data;>> y = logsout.getElement(2).Values.Data;>> bounds1 =iddata(y,u,0.01,'InputName','Voltage','OutputName','Angle',......'InputUnit','V','OutputUnit','deg')Time domain data set with 1001 samples.Sample time: 0.01 secondsOutputs Unit (if specified)Angle degInputs Unit (if specified)Voltage VWe will be working with 12 data sets. These data sets were selected toensure adequate excitation of the system and to provide sufficient datafor model validation.Developing Plant Models from Experimental DataDeveloping plant models using system identification techniques involvesa tradeoff between model fidelity and modeling effort. The moreaccurate the model, the higher the cost in terms of effort and computationaltime. The goal is to find the simplest model that will adequatelycapture the dynamics of the system.Figure 3. Simulink model that will run on the Arduino board.We create a real-time application from the model by selecting Tools > Runon Target Hardware > Run. We are then ready to acquire the input/outputdata using the model that will run on the host computer (Figure 4).Figure 4. Model that will run on the host machine..We send various voltage profiles to excite the system, and record andlog the corresponding position data. At the end of the simulation, thesignal logging feature in Simulink will create a Simulink data set objectin the workspace containing all the logged signals as time-series objects.Next, we prepare the collected data for estimation and validation.Using the following commands, we convert the data into iddata objectsfor import into the System Identification Tool in System IdentificationToolbox.>> logsoutlogsout =Simulink.SimulationData.DatasetPackage: Simulink.SimulationDataCharacteristics:Name: 'logsout'Total Elements: 2Elements:1: 'Voltage'2: 'Angle'-Use getElement to access elements by index or name.-Use addElement or setElement to add or modify elements.Methods, SuperclassesWe follow the typical workflow for system identification: We start byestimating a simple linear system and then estimate a more detailednonlinear model that is a more accurate representation of the motorand captures the nonlinear behavior. While a linear model mightsuffice for most controller design applications, a nonlinear modelenables more accurate simulations of the system behavior and controllerdesign over a range of operating points.Linear System IdentificationUsing the iddata objects, we first estimate a linear dynamic model forthe plant as a continuous-time transfer function. For this estimation,we specify the number of poles and zeros. System Identification Toolboxthen automatically determines their locations to maximize the fit to theselected data sets.We launch the System Identification Tool by executing>> identWe can import the data sets into the tool from the base workspaceusing the Import Data pull-down menu (Figure 5). We also have theoption to preprocess the imported data. To start the estimation process,we select the working data that will be used to estimate a model and thevalidation data against which the estimated model will be tested. Wecan use the same data set for both estimation and validation initially,and then use other data sets to confirm our results. Figure 5 shows theSystem Identification Tool with the data set imported. The estimationdata set, data set 11, comes from an experiment designed to avoidexciting nonlinearities in the system.Figure 5. The System identification Tool with data imported.5 April 2013

MOTOR CONTROLValidated methodology for designingsafe industrial systems-on-a-chipSafety has usually been addedto systems by redundantcontroller or communicationmodules. These additionalcomponents incur highercosts and are less flexibleand scalable than designingan application optimized forsafety and cost-competitivenessfrom the start. This articleexemplifies such an approachwith a drive design. When a company decides to develop a safeproduct, it must consider safety as core systemfunctionality. Historically, safety has beenadded to the system by additional functionalitysuch as redundant controller or communicationmodules combined with circuitry to monitorthe system. These added-on safety components,introduced as an afterthought intothe system concepts, incur significantly highercosts and are less flexible and scalable than designinga safe application, optimized for safetyand cost-competitiveness, right from the start.For a typical motor control application, suchas a drive, the partitioning step separates thesystem into system control, communication,and real-time motor control functions. For example,the architect selects a software implementationfor the control part and for thereal-time portion of the system, and decidesto use a hardware/software approach for thecommunications portion to support real-timeIndustrial Ethernet communication protocols.The next step is the component selection. Thedecision may lead to an implementation wherethe control software runs on a standard applicationprocessor, the real-time motor controlportion will get implemented on a digitalsignal processor (DSP), and the communicationwithin the system will be realized with anFPGA-based approach. An FPGA allows flexibilityin the system to realize various differentIndustrial Ethernet standards like Ethernet/IP,EtherCat, Profinet, or Sercos III in the samedevice interchangeably. This flexibility for thecommunication part of the architecture allowsfor a standard hardware platform to be customizedfor the specific protocol needs of theend customer very easily.After the partition has been decided and thecomponents are selected, the design teams willwork on the development of their part of theapplication independently. Then they will integratethe components to a full system, testthe system functionality, and release the product.If the design is developed with functionalsafety as part of the product requirements, itis required to add additional phases to theproject. To design a safe application with thegoal to achieve functional safety certification,such as IEC 61508, the project complexity increasessignificantly to provide a clear andtransparent project structure that matches thestandard.In the project startup and risk analysis phase,the scope for safety in the project is identifiedbased on the general requirements for the application.The desired and achievable SIL forthe application is determined, formulated, anddocumented for the implementation stages,and acts as the basis for the risk analysis andassessment. The risk analysis provides thefoundation for measures that must be takenlater in the process to develop a safe application.It represents the understanding of the productboundaries and is closely linked to the productsscope definition. It provides the base for therequired SIL, a detailed definition of the safetyfunction, and the framework of the productdocumentation. This must happen on thecomponent as well as on the system level.Following this step, the architecture for theapplication is developed to meet the functionalrequirements, as well as the safety requirements.The safety requirements are refined and thespecific functions to be realized during operationand maintenance work are documented,together with the identification of strategiesthat must be followed to validate that thesafety measures meet the requirements.For a safe drive, the scope might includeseveral aspects such as identifying whether thedrive parameters are in the allowed range, orif a safety I/O signals a critical event. Themost basic safety feature for drives is “safetorque off” (STO), in which the motor is disconnectedfrom the power supply in a safeway. The procedure might also include communicatingto the overall automation systemthat a safety event occurred and certain measuresmust be taken within a certain time window,such as a sequential shutdown of a wholeapplication following a series of steps over apredetermined period of time.The development of the validation plan mightinclude methods of controlled failure insertionto test the system, and additional monitorsthat observe the system to compare the currentparameter to a range of predetermined allowedvalues. The component selection step takesplace in a typical project, but with the addi-April 2013 8

MOTOR CONTROLand semiconductor products that provide thenecessary information, especially for relateddesign tools and IP used for the application.Figure 1. Typical design stepsFigure 2. Architecture developmentFigure 3. Component selectiontional need to ensure that the componentsand IP functions allocated and selected aresuitable for use in a safe application. For theselection, it is important to consider the residualerror probability, which is used as a basis tocalculate the total failure probability (FIT) ofa product and finally the achievable SIL. Partially,this can be achieved through gatheringthe required device and design tool data andinformation to ensure that products are usedbroadly by a wide range of users, in such away that they are sufficiently free of systematicerrors or proven in use (for IP, for example). Itcan also be achieved through access to reportsthat provide error rates and reliability informationfor semiconductor products like processorsor FPGAs. However, it is often difficult toget access to reliability reports for componentsComplex system functions like communicationprotocols, memory interface IP used in theFPGA or processor IP embedded in the FPGA,such as the Altera Nios II embedded processor- typically used to run the software stack forindustrial Ethernet protocols in drive applications- need to be analyzed, tested, and qualifiedfor safety applications as well.In addition to the implementation of the application,certain additional functionalitymust be added to the design. Basic parametermonitoring functions, such as clock andpower, and complex functions, such as datamonitors that ensure correct system operationsby observing the output from a pulsewidthmodulation (PWM), are required. It isrequired to implement functions that automaticallyidentify failures, and transition thesystem into a safe state. Basic functions includeensuring that memory content has notchanged due to external impact on the design,or monitoring system clocks to ensure theyare driving the design within the specifiedsystem parameters (or failed due to failure ofexternal components), and that power suppliesare operational.After development of the individual components,they are integrated to a safe drive implementationand tested for delivering the expectedsystem functionality as well as providingthe safety functionality that has been specified.The safety validation must ensure that the desiredsafety features are in effect and remainin effect during operation, for example to ensurethat an external impact on the design hasno negative effect on the safety function suchas accidentally disabling it without being noticedby the system. Throughout the entireprocess, close cooperation with the assessor isrequired to ensure that the measures takenduring the development process are reasonable9 April 2013

MOTOR CONTROLFigure 4. Design with safety stepsFigure 5. Design with prequalified safety stepsand provide the right level of safe functionality.Finally, the assessor certifies the product forfunctional safety and it can be released intothe market. There are certain steps where semiconductorvendors like Altera can help withthe process and reduce the effort for the developmentof safe applications. For example, havingimmediate access to semiconductor data,IP, development flows, and design tools thatare already qualified for functional safety canprovide a significant acceleration of the overallproduct development process.Altera invested almost two years to achievequalification for their products. The requiredtest and usage data for IP and design tools anddevice reliability data are summarized and formattedin such a way that they can be presentedfor certification for functional safety. A TÜVapproveddesign methodology (V-Flow) wasdeveloped to address the specific needs ofFPGA designs. Essential diagnostic functionswere designed as FPGA IP and are provided aspart of the functional safety package. This exampleof a drive with a safe I/O uses qualifiedFPGA design tools, Quartus II software version9.0 SP2, from Altera and a suggested designmethodology for the implementation of theapplication. In addition, a dual-FPGA implementationfor the application, was used insteadof external processors and DSP. The applicationis partitioned onto several Nios II soft processorcores. The first Nios II soft processor providessupport for the communication stacks, thesecond handles the control of the system andthe third Nios II processor is integrated intothe motor control block. The motor controlalgorithm is partitioned so that its softwareportion runs on a Nios II processor and is acceleratedby hardware blocks specifically developedfor this applicator to accelerate themotor control loop. An external safety controllerprovides the redundancy required for aSIL3 application. This solution enables combiningthe safe controller with the field buscontroller in a single FPGA, and uses theAltera SOPC Builder system integration toolto integrate the Nios II soft processors withthe other IP blocks for communication, theencoder interfaces, and memory interfaces.For low-level monitoring of critical but commondiagnostic tasks in the FPGA, this exampleuses safety-qualified diagnostic IP blocks providedby Altera. These diagnostic IPs, designedto the IEC 61508 specification, perform commondiagnostic functions such as the following.1) Cyclic redundancy check (CRC) calculation- this calculation is useful in many systemsand is particularly useful for fieldbus applications.2) Derived clock checking - this corelooks at the presence and frequency of clocksin the system. 3) SEU check controller - thisblock works with the built-in soft error checkinghardware in the device to monitor changesbrought about by so-called soft errors. Sincethe implementation of these hardware IP coresis in the FPGA logic area, the system processoris relieved of these tasks.The design implementation follows the providedrecommendations. In the area of qualifiedmethods, Altera took the IEC spec and analyzedthe FPGA design methods and related clauses.From this analysis, a tool flow document wasproduced. The V-Flow and the documentationthat comes along with it maps all steps in thedesign of a safe application for Altera FPGAsto the IEC specification and its requirements.In addition, it explains which tools are usedfor the specified design steps. Specific chaptersin the IEC specification are discussed and anexplanation is provided to guide the user tofollow the right development steps for the developmentof a safe application.Altera provides a TÜV-qualified FunctionalSafety Data Package that covers qualified developmenttools, qualified IP, and qualified silicondata for devices under a specific toolflow. The documentation and data that the assessorneeds for certification are included andprovided in a format that matches preciselythe IEC 61508 specification format so theycan easily be processed by the assessor. Havingthis documentation available in the rightformat saves a significant amount of work forthe documentation of the safety project. Inthe reliability report included in the FunctionalSafety Data Package, an extensive analysis ofthe statistical information about the reliabilityof Altera FPGAs is provided. All the necessaryinformation to calculate failure-in-time (FIT)rates is part of the provided documentation,including a guideline that explains how to performthis calculation so that it can easily bepresented to the assessor for certification. Figure 6. Dual-FPGA implementation of a safe drive Figure 7. Tool flow for a safe designApril 2013 10

MOTOR CONTROLProduct News TI introduces InstaSPIN-FOC motor control solutionMotor control system designers can now concentrate on differentiating designs rather than spendingweeks and months tuning their motor control systems. With the new InstaSPIN-FOC solution fromTexas Instruments, designers can now identify, tune and fully control (through variable speeds andloads) any type of three-phase, synchronous or asynchronous motor in five minutes or less.News ID 16923 Toshiba: ARM Cortex development board for motor controlToshiba Electronics Europe has announced a pre-configured development board for rapid implementationof motor control applications using its ARM Cortex-M3 family of microcontrollers. Developers canuse the low-cost ‘SigmaBoard’ as a starter kit, as a reference design, or as a stand-alone solution forfield-orientated control/vector control of brushless DC motors with ratings to 36V and 2A.News ID 16972 Digi-Key opens European customer support centerDigi-Key is expanding its global footprint with new sales and customer support resources coveringthe EMEA region. The company today announced its regional sales leadership team and theopening of a new European sales and support office in Munich. Offering regional support to itsEMEA customer base, Digi-Key appointed a team of experienced sales leaders, charged withsupporting an existing roster of over 41,000 EMEA customers while expanding awareness of Digi-Key to both the design engineer and the higher volume Production Business buyer. Additionalresources covering the Nordics, the Baltics, and Eastern and Southern Europe will be announcedwithin the next 90 days.News ID 17010 Telit expands Qualcomm portfolio with new LTE concept productTelit Wireless Solutions announced the expansion of its long-standing relationship with QualcommTechnologies. The complete portfolio allows Telit to offer form-factor compatible QualcommTechnologies-based solutions for CDMA, UMTS and LTE radio technologies to address the communicationsneeds of M2M and Internet of Everything application developers.News ID 16888 TI: SoftwarePac features production ready PHY and transport softwareTexas Instruments announced two new software packages for its KeyStone-based multicore Systemon-Chips.The first software offering is a new production ready small cell Physical software package,enabling developers to quickly, easily and cost effectively design highly differentiated small cell basestations. The second software offering is a transport software package for wireless and othernetwork-oriented applications.News ID 16976 Microchip: BodyCom technology uses human body as low-power communication channelMicrochip announces its BodyCom technology, which provides designers with a framework forusing the human body as a secure communication channel. Compared to existing wireless methods,BodyCom technology provides lower energy consumption, whilst further increasing security viabidirectional authentication. BodyCom technology is activated by capacitively coupling to thehuman body. The system then begins communicating bidirectionally between a centralisedcontroller and one or more wireless units. There are many applications where secure wirelesscommunication is essential, and there is no more secure channel than the human body.News ID 16930 Toshiba: new line-up of image recognition processors for automotiveToshiba Electronics Europe is offering an expanded line-up of Visconti image recognition processors withthe launch of the Visconti3 series. The first device in this new series, the TMPV7528XBG, is enhanced bythe integration of additional processor cores. Toshiba developed the Visconti series of image recognitionprocessors to advance the creation of camera-based vision systems for automotive applications.News ID 16959ore information about each news is available Mwww.Embedded-Control-Europe.com/ece_magazineYou just have to type in the “News ID”. —11 April 2013

LIGHTINGSavings all along the road with LEDsBy Wolfgang Reis, EBV The fact that some LED components can berecycled is not just a positive aspect in environmentalterms, it also results in lower disposalcosts. There is much less of an LED left at theend of its useful life than of other types oflamp. LEDs offer many different savings: Theydo not have to be cleaned for example, nor –despite their 50,000 hour service lives – dothey need maintaining. And maintenance canbe very expensive in some cases, as the followingexample demonstrates. If a defective bulbcauses a traffic light to fail, it is not merely amatter of the cost of a new light, but also ofthe time and effort for staff to come out andreplace it; temporary traffic control by the policewhere appropriate; and possibly additionalrequired materials. The economic loss resultingfrom traffic congestion is a further factor.Though the acquisition cost of an LED andthe associated operating unit is higher than aconventional lamp, the savings over a periodof years far outweigh the difference in initialoutlay, because LEDs last in some cases 100times longer than bulbs.In order to deliver the light provided by conventionallamps, multiple LEDs are required.This does mean that the cost of lighting byLED is initially higher. It should be remembered,however, that the efficiency of LEDs ishigher and so energy costs will be lower. Aconventional 12 lm/W bulb uses three timesmore electricity than a white LED with a lightoutput of 40 lm/W to attain the same level ofbrightness. Also, LEDs generate less heat, sothe cost of air conditioning is reduced. Thestory is similar with regard to the use of LEDsin vehicles. The additional electronics required,the higher numbers of LEDs and their higherunit costs mean that the purchase price ishigher. However, manufacturers are able tomarket LED-powered lights as a profitable optionalextra, thereby also meeting the legal requirementto cut emissions. Moreover, vehicleowners profit from reduced fuel consumption.The reason is that a generator driven by wayof a belt by the engine generates the electricalenergy needed for the vehicle. When morepower is needed, the mechanical resistance ofthe engine increases, in turn increasing thefuel consumption. When LEDs are used, lesselectrical energy is needed. The resultant reductionin power consumption is importantto the automotive industry not only because ithelps cut CO2 emissions in line with legal requirements.Government moves to make drivingwith daytime running lights mandatory atall times are also leading motor manufacturersincreasingly to fit LEDs.According to the German Federal HighwayResearch Institute (Bundesanstalt für Straßenwesen),daytime running on conventional bulbheadlights results in an additional consumptionof 0.052 litres per 100 km, while the additionalconsumption with LEDs is 0.02 l/100 km. In ,this would mean the annual additional fuelconsumption resulting from permanent useof daytime running lights would be around0.3 per cent of the total with bulbs and 0.1 percent with LEDs. In other words: the total costof cars driving permanently with their dippedbeam headlights on (daytime running lights)resulting from the increase in fuel consumptionin Germany would be 630 million euros. Overthe long term, daytime running lights usingLEDs would cut that cost to 60 million euros.Another factor is that LEDs are so long-lastingthat they would even outlive the vehicles inwhich they were fitted.Assuming that LEDs are operated within thelimits specified by the manufacturers with regardto current and ambient temperature, andno environmental factors such as damp orchemicals lead to the premature destructionof the LED, the likelihood of a high-qualityLED suffering a total failure over its lifetime isnegligibly small. Failures of LED lamps usuallyresult from defective or ageing soldered points;the LED itself remains operative. It should,however, be borne in mind that there is a differencein lifetime between the various colours,as they are made by different technologies. Itcan generally be assumed that LEDs in red, orangeand yellow will age much less than greenand blue – and thus also white – LEDs. In typicalvehicle operation, red, yellow and orangeLEDs attain service lifetimes of around 7,000hours. Operating at normal ambient temperatureat 80 per cent of the application-specificmaximum permissible current, they attainaround 10,000 hours, and at 50 per centaround 100,000 hours. If white LEDs are operatedat half the starting current, their lifetimescan be expected to double. Double life canalso be expected if the LED is operated at anambient temperature 30 Kelvins below thestarting value. In contrast to bulbs, LEDs arestill lighting at the end of their lives, though at“time of death” their light intensity has fallento 50 per cent of its original level.Consequently, the decision as to which lightshould be used in applications in which replacementis complex and costly is easily madein favour of the LED. April 2013 12

LIGHTINGColour control of displays withhigh colour fidelityBy Frank Krumbein, MAZeTThis article describesthe True Color sensorsthat are available as anIC or board solutiondeveloped by MAZeT.Image source: Smile-shoots / Jena Displays, monitors and projectors are becomingmore and more important in everydaylife. From computer screens, tablet PCs, smartphones, and point-of-information devices toTVs and video walls for large-scale LED panels,the application range in the public, privateand industrial sectors is steadily increasing.The user expects a high contrast ratio andbrilliant colours. This results in a higher demandfor so-called True Colours, driven by industrystandards but also by a generally increasingnumber of users demanding higherqualityin colour applications. This characteristic,in conjunction with long-term stabilityover the entire lifetime and low energy consumption,is progressively becoming a distinctiveselling point for high quality products.LED technology provides higher colour brilliancewith increased service life compared totraditional display technologies.However, being able to offer consistent TrueColour technology via LED backlights in allconditions and over the entire lifespan requirescertain precautions. Temperature, aging andtechnology-dependent errors and tolerancelimits of the light source, optics, mechanicsand electronics need to be corrected. Thismust be performed within the factories of themanufacturer at defined intervals and as aspecial service. This is especially true for LEDbasedlight sources, where colour and brightnessvary greatly due to temperature influencesor aging of the system. Correction of the lightsources during operation and integrated withinthe device requires independent and stableoperating conditions of the optical sensor.True Colour sensors based on interference filtersthat are small, fast and cost-efficient, andthat measure colour based on standards (forexample: CIE1931 or DIN5033) without agingor temperature drift effects over the entire lifetime, are an ideal basis for color managementand control options of light sources.In medical engineering it is important thatscreens of diagnostic devices are capable of ahigh contrast ratio for detailed display options.Display colours based on an LED system showcolours that shift depending on the operatingtime and heat management of the device. Sensorsare used for monitor calibration in medicaldisplays for fast and absolute measurements,to ensure accurate display of colours duringoperation, which are required by internationalmedical standards. A correct diagnosis canonly be made if accurate colours are displayed,whereas slight colour shifts could lead to amisinterpretation. Another option is to useexternal measurement devices to ensure suitablecorrection or calibration methods. To date displaycalibration has been performed by calibrationlaboratories at high costs and withgreat efforts. There are so-called colorimeters- external devices - that display users themselvescan use for the calibration process. However,these devices require a certain amount of expertiseand bear high initial costs. These devicesvary depending on the technology used: spectralmeasurements tend to be expensive andrequire a high effort, while RGB sensors lackthe required value accuracy. An ideal solutionfor the display market would be an auto-calibrationmethod, which occurs invisibly in thebackground and provides a real-time benefitwithout additional user effort.Video walls or screen network systems thatconsist of multiple displays have high demandsregarding uniformity of colour and brightness.It is the goal to generate a unified picture impression,rather than a fraction of single imagesregardless of the operating and working conditions.The number of outdoor and semioutdoordisplay systems for applications isconstantly increasing. These systems are usedas interactive terminals with multi-media propertiesto process information. All displays, lightengines or projectors related to the video walldisplay should work with the same colours orcolour temperatures so as not to distort theoverall output. In contrast to this aspect, it is achallenging task to re-calibrate larger outdoorsystems without high maintenance costs orspecial monitoring equipment, which is usedexternally on the screen. With these facts in13 April 2013

LIGHTINGFigure 1. The True Color sensor MTCSiCFenables colour measurement based on theCIE1931/DIN5033 standard.mind, alternative approaches are required thatare either applied within the displays via backlightor light engine control, or allow remotemonitoring of display segments. Similar approachesare found in alternative applications,for example the lighting industry, where mixedLED light sources that require to maintainspecific colour temperature use feedback control-loopsolutions.The colour measurement of such applicationsis performed by compact JENCOLOR TrueColour sensors. Supplemented with appropriatesignal electronics, they enable new opportunitiesfor device manufacturers and inline colourmeasurement of light sources and displays.The semiconductor-based sensors with XYZinterference filters are fast, cost-efficient andenable long-term stable colour detection andabsolute colour measurement based on theCIE1931/DIN5033 standard. These sensors arecapable of measuring colour differences withinthe colour space that are beyond the capabilityof the human eye. MAZeT offers these kindsof True Color Sensor ICs in various packagesand embedded solution options including calibrationlibraries. (Sensor IC, evaluation boardsfor various applications).The True Colour sensor IC MTCS is a miniaturizedcolour sensor for colour measurementsbased on the tristimulus procedure. The differencebetween usual colour sensors with absorptionfilters and RGB detection is that theMTCS can perform colour measurements witha spectral sensitivity based on the accuracyand performance of but better than the humaneye. The standard values for the description ofthe colour areas X, Y and Z are a result of theemitted radiation and the spectral tristimulusfunction based on the colorimetric principleof True Color sensors. A nearly spectrally identicalsimulation of the CIE 1931 standard observeris required for a precise color measurementof emitted sources based on human eyeperception. The quality of the viable colourmeasurement depends on the quality of thesefactors. Every variation of the standard observervalues increases the total error of the colourmeasurement system. Depending on the task,the measurement system requires certain accuracy,as measurement error varies from thenominal value, even after a previously performedcalibration. This deviation is definedas measurement error delta (for example ∅Efor the deviation within the Lab-graph or∅u’v’ for the colour area error within theLu’v’-graph) and is used for colour measurementapplications. Certain factors like themeasurement procedure, absolute and repeataccuracy of the sensor, lighting, calibrationand disturbing sources of the system environmentare the determinants of the requestedaccuracy levels.Figure 2. The JENCOLOR sensors consist ofspectral filters that are based on human eyeperception - that is standardized in colorimetrictasks based on CIE 1931.Currently the MTCS colour sensors are theonly miniaturized sensors based on the scaledtristimulus function. The sensor signals XYZcan directly be evaluated as colour areas withinthe colour graph. After calibration and underusual measurement conditions is possible toachieve values better than the perception limitof the human eye („Better than the humaneye“; ∅E

LIGHTINGThe True Color sensors are available as an ICor board solution developed by MAZeT. Theyare commonly used in measurement devicesor systems of various manufacturers, for example,within the calibration system Mii 2mobile colour analyzer developed by Premosysenabling to manage the colour intensity andcontrast of displays with pin-point accuracy..The system is applicable to different displaytypes, regardless of CCFL, LED or RGB backlight,for both narrow- or wide-range. The deviceprovides excellent repeatability, is easy touse and allows a very fast calibration of displays. Atlantik presents Greenvity s HomePlugGreen PHY for LED lightingAtlantik Elektronik introduces the latest memberof Greenvity Hybrii family, the new Hybrii-Mini GV7013. This chip is compatible to thePLC HomePlug Green PHY for Smart Gridapplications and is ideal for intelligent LEDlighting systems over long distances withinthe commercial, public and private sector. TheGV7013 enables a robust and reliable twowaycommunication of remote-controlledstreet lights up to digital signage applications.In residential and commercial buildings theHybrii-Mini PLC also enables larger transmissiondistances through multiple walls andceilings.News ID 16878 ams: intelligent LED driver for mobilephone camerasams introduced a new intelligent LED driverfor mobile phone cameras that maximizesthe brightness of the flash without causingthe phone’s battery to fall below its minimumoperating voltage. The AS3649 LED driveruses an innovative “diagnostic pulse” – a burstof controlled high current lasting a few milliseconds– immediately before every flashoperation. During this pulse the devicemeasures the momentary voltage across theThe achievable accuracy lies in a region thatwas previously only manageable by very expensivemeasurement systems. The system isavailable in different versions with USB orRS232 interfaces. It is possible to perform upto eight base calibrations in addition to thirtyindividual user calibrations to meet the demandsof customer-specific displays. Likewise,flicker measurements can be performed. Theintegrated temperature sensor compensatesthe temperature shift during the measurement.The integrated design ensures the long-termstability of the measurement values. TheProduct Newsterminals of the phone’s battery. On the basisof this measurement, it reports a value for thehighest flash drive current the battery cansustain, up to a maximum of 2.5A, withoutdropping below its minimum voltage andtriggering the phone to reset itself during themain flash.News ID 16965 Electronic Assembly: 5.7“ color displayincludes touchscreen capabilityThe EA eDIPTFT57-A intelligent display fromElectronic Assembly is, for a variety of reasons,the ideal candidate for implementing an interactivecontrol in mechanical engineering orindustrial electronics applications. The highcontrastscreen, for example, which measures5.7“ in the diagonal and has LED backgroundillumination, offers a crisp, colorful resolutionof 640 x 480 pixels.News ID 16979 FTDI: easy-to-use graphic controller forwide-ranging display applicationsAddressing the need for ever more advancedforms of human-machine interaction, FTDIhas announced the release of the FT800, theinitial offering in its Embedded Video Engine(EVE) family. Targeted at cost-effective, intelligentQVGA and WQVGA TFT display panels,measurement device is calibrated individually,and can always be recertified, so that the systemcan be used as reliable test equipmentfor several years.Similar solutions for screen measurementsexist from other companies. The Brontes Colorimeterfrom Admesy was developed for displayapplications where colour rendering isextremely important and long-term stabilitymust be guaranteed without re-calibration. Inaddition to the high accuracy, an extremelyhigh measuring speed is a selling point. the FT800’s object oriented approach rendersimages in a line by line fashion with 1/16th ofa pixel resolution, eliminating the expense oftraditional frame buffer memory. Supporting4-wire resistive touch sensing with built-inintelligent touch detection and an embeddedaudio processor allowing midi-like soundscombined with pulse code modulation foraudio playback, the controller’s functionalitysets new industry benchmarks.News ID 16915 ARM: adoption of ARM big.LITTLEtechnology acceleratedARM unveiled that its big.LITTLE processingtechnology has been adopted by many of theworld’s leading mobile chip manufacturers.Samsung and Renesas Mobile have alreadyannounced their plans, and subsequent implementationswill be revealed during 2013 byfive more companies including CSR, FujitsuSemiconductor and MediaTek. ARM big.LIT-TLE technology saves up to 70 percent ofprocessor energy consumption in commonmobile workload tasks, essential as the performanceof the smartphone has jumped by60x since 2000 and 12x since 2008, causing amassive increase in both content generationand consumption.News ID 1693115 April 2013

LIGHTINGLighting industry continues to movetowards the adoption of LEDsBy Stephan Greiner, CreeThis article reviewsthe many benefits ofLED technology whichsupport its increasingacceptance throughoutthe lighting industry.Spectral concentrationof various light sources A technology that was once known for treelighting during the holidays and headlightson the newest cars is now making its way intothe commercial and residential sectors – fromschools and office buildings to gas stations,hotels and homes. More and more facilitymanagers and electrical contractors are makingthe switch to LED lighting to save big onenergy and maintenance costs. Although monetarypayback savings and longevity often drivethe shift to LED lighting, there are severalother benefits. Below are a few reasons whyLED lighting is quickly rising to the top as thepreferred lighting option.Illuminating a space depends largely on thedesired outcome. For example, warehouse lightingtends to be brighter than residential lightingbecause workers need the additional illuminationto perform their tasks. Contrary to thecommon belief that LED lighting emits a harshwhite light, the technology has now becomeso advanced that it can achieve a wide rangeof colour temperatures (from cool to warmerwhites) to address more applications than everbefore. As the human eye adapts to variouslight settings, it is important to have variation;brighter lighting in an office environment andwarmer (yellower) lighting in the evening.Cree LED lighting products fall between 2700Kand 4000K colour temperatures. In order toachieve optimum illumination for a given application,luminaire design starts with the LEDcomponents within the fixture, not the physicalaesthetics of the fixture. The colour temperatureof the lighting fixture is often determined bythe LED components which serve as the lightsource. Luminaire designers select the LEDcomponents for the fixture based on the desiredend lighting effect. By going LED, lightingspecifiers can attain the most appropriate lightingcolour for their applications while benefitingfrom the energy and maintenance savingsassociated with using this technology. Thesame varied colour temperatures and energyefficiency are not available with incumbentlight sources. For example, metal halide fixturesused for exterior parking lot lighting end upconsuming high amounts of wattage. Thisisn’t the case with LED luminaires.Not only does LED lighting provide a widerrange of colour temperatures than previousoptions, but it also has a greater colour spectrumto more closely replicate natural daytimelighting. In other words, objects under LEDlighting look the most similar to what theywould look like under the sun. The colourrendition can be measured using the ColourRendering Index (CRI) where 100 is the highestmarker and represents daylight. A CRI in the80s range is generally good enough for mostapplications while a CRI of 90 (where highqualityLED luminaires range) is nearly identicalto natural daylight. This is achieved becauseLED lighting has greater intensity at the variouswavelengths than metal halides.Additionally, the high colour quality of LEDsremains consistent longer than current options.LED lighting has a low light depreciation rateso illuminated areas have uniform lighting thatlasts longer than technologies like high pressuresodium or metal halides. Older lighting technologiesdiminish in colour quicker, resultingin different coloured lighting fixtures throughoutthe illuminated space. Due to the stable natureof LEDs (a solid state lighting technology),areas illuminated by LED luminaires will becontinuously lit without interruptions, unlikefluorescent fixtures that flicker.Due to the nature of LED technology, thereare many control possibilities, such as dimming.The LED source can be operated through awide range of power and output, enablingmany applications with adaptive illuminationto right-size the illumination while maximizingenergy savings. With dimming capabilities, itis possible to adjust illumination based on thechanging requirements of the application. Thiscan be accomplished with systems rangingfrom network-based closed loop dynamic monitoringand control, to something as simple asa manual dimming control system. In general,it is easier to justify greater light control withApril 2013 16

LIGHTINGan LED-based system because LED fixtures areoften sold with dimming as a standard feature.Therefore, daylight harvesting and dimmingcapabilities are most cost-effective with LEDs.Embedded control protocols enhance dimmingcapabilities, demonstrating the ability for LEDsand controls to work together seamlessly.Cree, for example, just entered into a first-ofits-kindagreement with Lutron ElectronicsCo., Inc. to embed Lutron EcoSystem technologyon a chip into its luminaires. By using energymanagement solutions such as LutronEcoSystem technology, LED lighting can significantlyreduce building owners’ operatingcosts and continue to deliver faster payback.Digital control and dimming of LED fixturescan significantly extend LED lifetime whilealso allowing flexibility to reconfigure andimprove occupant experience in any space.Optical control is also crucial to proper illumination.Continued engineering advancementsin LED technology can improve optical efficiency,maximizing illumination to desiredareas with less light spill-off. For example, CreeNanoOptic Precision Delivery Grid optic technologyfeatured in the XSP Series LED StreetLight efficiently delivers light to the street,making communities appear cleaner and safer.LED lighting offers several secondary benefits.LEDs are mercury-free, UV-free and low heatemitting. These features increase the environmentalfriendliness of a building, while protectingproducts and supplying visitors with acomfortable atmosphere. LEDs offer the perfectalternative to other high-efficiency light sources,like compact fluorescents and high intensitydischarge fixtures, which contain toxic mercuryvapour. Problems occur when these lightsbreak and mercury escapes as a vapour thatcan be inhaled and as a powder that can seepinto textiles. These lights must be properly disposedof in order to prevent mercury frompoisoning landfills. Additionally, since the mercuryvapours need to warm up to actuallyemit light, these fixtures do not turn on instantlyand occasionally flicker. LED luminaires,however, are instantly on, do not flicker anddo not contain mercury.Another benefit of LEDs is that they are UVfree.Ultraviolet rays can cause degradation toartwork, apparel, furnishings and even food.This lighting quality is particularly importantin grocery stores. Given their relative size andwide variety of consumer areas, grocery storesmust pay attention to both efficiency and lightquality. LED lamps deliver bright, UV-freelight to attract consumers to goods while helpingkeep produce and other foods fresher forlonger. For example, UV rays cause the colourof fresh meat to fade and accelerate the developmentof rancidity in the meat fat.Along with being mercury-free and UV-free,LEDs also emit a lower amount of heat comparedto other light sources. Most of the energyemitted from incandescent bulbs is convertedto heat instead of light. Touching an incandescentbulb that has been turned on for a whilecan even cause a harmful burn. Since LEDsconsume significantly less energy, they do notemit as much heat. This is especially importantto consider in terms of warmer weather environmentsand cooling costs.Many LED bulb fixtures are also equippedwith a thermal management system that usesan integral heat sink to conduct heat awayfrom the individual LEDs and transfer it tothe surrounding environment for optimal performance.The advanced heat sink and heatpiping technologies are integrated to maximizethe cooling effectiveness of each LED lamp.Moreover, LEDs are not as sensitive to changingweather patterns, like cold weather that can bedetrimental to fluorescent lighting. Unlikemetal halide fixtures that need to cool downbefore being turned on again, LED lightingdoes not have this heat issue and turns oninstantly. Additionally, since LED is a solidstate technology, LED luminaires tend to bemore durable. Components do not break aseasily as other lighting options, specificallymetal halides. A prime application example ofthis is a parking garage with multiple levels.These levels are not as rigid as the groundfloor, so as cars drive by the structure will vibratecausing disruptions in the lighting qualityof metal halides and high-pressure sodiumlight fixtures.The benefits listed here are some of the mainreasons why LED lighting is growing in acceptanceand use in many industries aroundthe world. Aside from the much expanded capabilitiesof LED lighting, which can be furthermaximized in the design process, LEDs arebeing designed with the intent to meet the undeniablerequirements of the future. For example,the demand for adaptive lighting is expectedto continue to accelerate as energycodes continue to evolve and become evenmore stringent to reflect advancements in thelighting industry. Unlike incumbent technologiesof the past, LED technology is well-suitedfor such applications and is expected be at theforefront of this movement. Integrating LEDsolutions with adaptive controls allows foroverall improvements in total cost of ownershipthrough a combination of even greater energysavings and improved long-term luminaireperformance and reliability. Through theseand other innovations, LED luminaires arecontinuing to carve out a clearly defined andwidely recognized place for themselves withinthe lighting market. Cypress: touch controllers silence noisefrom even worst chargers and displaysCypress Semiconductor introduced its nextgenerationGen5 TrueTouch controller productline that delivers most noise-immune touchscreencontrol technology, shattering currentstandards for performance in noise from allsources. Gen5 offers unprecedented 40 voltpeak-to-peak charger noise immunity measuredfrom 1 to 500 kHz with an ultra-thin0.5-mm cover lens and a finger-size up to 22mm—the most stringent specifications usedto measure any touchscreen controller. Nocompeting controllers deliver noise immunityover 15 Vpp under these conditions.News ID 16899Product News nanotron: industrial safety platform withswarm featuresnanotron has launched a new product torevolutionize industrial safety applications:the swarm platform. The nanotron swarmplatform consists of swarm radios controlledby a swarm application programming interfaceas well as swarm toolkits. It consists ofswarm radios controlled by a swarm applicationprogramming interface as well asswarm toolkits enabling fast developmentand implementation of location-aware applications.Swarm is currently used for collisionavoidance, secure access and virtualsafety zones.News ID 16951 EB achieves ASIL D and SIL 3 certificationfor tresos Safety OSElektrobit achieved its Functional Safety certificationby the assessment agency exidaCertification SA for the EB tresos Safety OS.Exida confirmed that the software is capablefor use in Automotive Safety Integrity LevelD applications such as electrical power steering.Additionally, the OS is certified forSafety Integrity Level 3 used in non-automotiveprojects. ASIL D and SIL 3 rankamong the highest security levels for functionalsafety according to the ISO26262 /IEC 61508 specifications for electric andelectronic components.News ID 1694117 April 2013

TOOLS & SOFTWAREDevelopment process runs smoothlythanks to EclipseBy Heiko Riessland, PLS Programmierbare Logik & SystemeAre you oneof the software developersthat have to constantlydeal with different targetarchitectures, perhapssometimes even within asingle embedded project?Standardized development,test and debug tools can bevery useful here, particularlywhen they are modularand extendable like theEclipse framework.Figure 1. Structural conceptof Eclipse simplifies thework of developers. A favourite editor or preferred developmentenvironment provides plenty of opportunityfor discussion by software developers of microcontrollerapplications. Surprisingly, there isobviously still a certain level of personal freedomin regard to this point; even in some large organizationswith otherwise clearly definedprocesses. However, as a rule, in large companiesthe trend towards standardized tools is evident.Uniform tools and known operating concepts,of course, significantly reduce the expenditureneeded to learn new target architecture and developerscan concentrate on their main task.In order to ensure the necessary longevity andvendor independency, an open-source project- such as the Eclipse platform - offers idealconditions for an efficient implementation ofsuch intentions.Eclipse was originally created by IBM for theJava programming language. Today, the EclipseFoundation, a member-supported corporationbased in Canada, is responsible for the furtherdevelopment. IBM still contributes with manyof its own developers and also uses Eclipsetechnology in its own products. Since Version3.0, Eclipse, which was originally developed asan integrated development environment (IDE),simply provides a framework. The Eclipse platformuses so-called plug-ins in order to providethe actual functionality. This highly flexibleconcept paves the way for very broad use as auniversally applicable development platform.Both Eclipse itself and the plug-ins are implementedin Java. However, this does not meanthat plug-ins cannot execute functionality fromnative code components. Eclipse graphical interface,which is based on the Standard WidgetToolkit (SWT), also sits on top of native GUIcomponents of the respective operating systemon which the Java environment runs. As withsome plug-ins, Eclipse itself is thus not completelyplatform-independent; however, it isnonetheless currently available for 14 differentoperating system platforms.The structural concept of Eclipse simplifiesthe work of developers. For example, so-callededitors are available to them for building applicationsby writing source code, drawing diagrams,etc. Entry in the text windows takesplace by conventional programming with supportof the respective programming languagevia syntax highlighting and features such asauto-completion. Furthermore, graphical editors- for example, for Unified Modelling Language(UML) or editors with tree presentationfor eXtensible Markup Language (XML) - arealso popular.Editors typically occupy a large part of theuser interface, whereby several source codesor diagrams can be open in parallel. A tabview with so-called tabs at the top edge enablesfast access. The actual editor window is surroundedby a further type of window, the socalledviews, in which additional informationis displayed. Examples of this include a projecttree with all associated files, an Explorer viewfor displaying classes, functions, variables andtype hierarchies as well as windows, which displaythe result of a build run or search resultsand enable a direct navigation to the respectivesource code position.Fundamental components of the Eclipse conceptinclude the so-named perspectives. Theseare complete preconfigured collections ofmenus, toolbars, editors and views. Despitethe pre-configuration, the perspectives areadaptable to a great extent to the user requirements.User defined settings can be stored andloaded again later.The Eclipse workspace is a further basic function,although not necessarily visible on thesurface. When an installed Eclipse platform isfirst started, the user is asked to choose aworkspace directory. From now on, all projectsthat have been created or imported are storedand organized in this directory. The advantageis that relationships between the projects nowonly exist of relative path information relatingto the workspace directory. Hence, these arevery easy to move. The individual developersof large project groups work with their localApril 2013 18

TOOLS & SOFTWARE0The debugger component of the Eclipse CDTis the only weak point for use as a cross-developmentplatform. Its model is based on observationof the target in a suspended state, whichis an approach that obviously does not coverthe requirements of modern cross-debuggersolutions. Unfortunately, the debugger componentof Eclipse still does not offer any possibilityto access the memory while the target isrunning and to update values in the debugger.Trace data for code coverage and code profiling,both must also be read and visualized withoutstopping the target, cannot be evaluated, andthe presentation of peripheral registers, mostlyseveral hundred with modern microcontrollers,is not possible.Figure 2. The component-oriented construction of the UDE with strict separation of function anduser interface enables the implementation of a complete debug perspective within Eclipse.workspace directories, whose specific locationin the local file system is completely meaninglessfor the group. Therefore, with the workspaceconcept, Eclipse creates its own storagesystem in the selected directory based on theunderlying file system. The otherwise usualrigid central file storage is not necessary hereand is replaced by the repository of a versioncontrol system. External references are also nolonger needed. All relevant information is importedor copied to the workspace directory.Furthermore, with the C/C++ DevelopmentTools (CDT), Eclipse offers a well-filled toolbox,consisting of several plug-ins of the EclipseFoundation, for C/C++ development. It alsoincludes project and build management, apowerful editor with syntax highlighting, navigationsupport and refactoring capabilities,as well as numerous functions based on staticsource text analysis such as the presentationof type hierarchy, call graphs, browsers for includefiles and macro definitions. What ismore, a source code debugging extended withwindows for memory, register and disassembleris provided. The implementation is based exemplarilyon the GNU compiler and the GNUdebugger (gdb).This also explains why Eclipse support by emulatorand debugger manufacturers has up tillnow mostly been limited to so-named callplug-ins. With their help, manufacturer-specificdebugger user interfaces can be started fromEclipse and setting of breakpoints in bothuser interfaces or, for example, also the reciprocalopening of files even enables some synchronization.However, full performance fortest, debugging and system optimization isonly available in a separate tool of the debuggermanufacturer. Another approach to upgradethe integrated Eclipse debugger is the retrofitof certain views for the special function registers(SFR) and real-time variables displays. However,the functionality here also ultimately mostlyremains an unsatisfactory compromise betweenthe debugger integrated in CDT and the manufacturer-specificuser interface.Thus, the only solution offered to this dilemmais the implementation of a complete debugperspective within Eclipse. The following exampleprovides developers with the completefunctionality of the Universal Debug Engine(UDE) from PLS, without having to make anycompromises. This is made possible by thecomponent-oriented construction of the UDE

TOOLS & SOFTWARECreating a flexible solution fortesting 802.11ad devicesBy Spiro Moskov, Agilent TechnologiesThis article outlinessome of the key problemsin testing and presents asystem configuration thatenables detailed testingand analysis of802.11 ad devices.Figure 1. This example ofEVM measurement wascreated using a test systemconfiguration similar tothe one shown in figure 2. The IEEE 802.11ad standard is an up-andcomingtechnology expected to enable wirelessconnectivity of up to 7 Gbit/s in data, displayand audio applications. Per the January 2011draft standard, signals will occupy the unlicensed60 GHz frequency band, and compliantdevices will provide backward compatibilitywith the 802.11 standard. As a result, tri-banddevices will operate at 2.4, 5.0 and 60 GHz.Many companies have launched product developmentprojects and developers face challengesthat stretch from system-level design toverification testing.For example, thorough testing of 802.11adtransmitters and receivers requires three essentialelements: arbitrary waveform creation;frequency conversion; and signal, modulationand spectrum analysis. In the development ofnew 802.11ad products, testing must addressthe transmitter and receiver portions of eachdevice. In a tri-band device, signals have threekey attributes: they operate at 2.4, 5.0 and 60GHz; carry various modulation schemes; andhave bandwidths in either the 20 MHz range(802.11a/g/n and 802.11b/g), 40 MHz range(802.11n), up to 80/160 MHz contiguous ornoncontiguous (802.11ac), or 2.0 GHz(802.11ad). At various points within the radioblock diagram the signals may operate in thebaseband, intermediate frequency (IF) or radiofrequency (RF) range.As a general problem statement, the IEEE802.11ad draft standard includes specific measurementswith expected values for transmittersand receivers. Examples include receiver minimumsensitivity and transmit error vectormagnitude (EVM; see figure 1). Going beyondthe draft specifications, design teams may alsowant to verify the overall performance of anew 802.11ad device. In such cases, they willwant to look at important measurements suchas match, gain or loss through frequency converters,and nonlinear tests such as p1dB undervarious operating conditions. Thorough testingof 802.11ad transmitters and receivers at baseband,IF and RF requires three essential elements:arbitrary waveform creation; frequencyconversion; and signal, modulation and spectrumanalysis. The flexible and configurabletest setup shown in figure 2 covers all these requirements.Starting at the top of figure 2, waveform creationat baseband frequencies is accomplishedwith specialized software and an arbitrarywaveform generator (AWG). In this case a 4.2GS/s AWG is used to create highly accuratesimulations of standard-compliant signals thatcan be applied to transmitters and receivers.Key features of the AWG include 12-bit resolution,up to 64 MS memory and advanced sequencingcapabilities. The AWG is availablewith one or two output channels, and twounits can be linked to provide four synchronizedoutputs. Each output channel has up to1 GHz modulation bandwidth and up to 2GHz I/Q modulation at carrier frequencies ofup to 1.5 GHz. Characterization of device performanceversus the standard also requiresgeneration of impaired or corrected signalsthat mimic real-world issues such as fading,distortion, I/Q skew and carrier-to-noise problems.One way to accomplish this is with waveform-creationsoftware that can downloadwaveforms into AWG memory. Examples includeSystemVue and Signal Studio from Agilentas well as MATLAB from The MathWorks.Moving down the figure, IF-band frequencyconversion is accomplished with an upconverter.This configuration uses a vector signal generatorwith optional wideband external I/Q inputs.As shown, the AWG is used to directly drivethe internal I/Q modulator with I/Q modulationbandwidth of up to 2 GHz. A custom-designedupconverter provides frequency conversion tothe RF range. A high-precision microwave analogsignal generator provides a stable LO signalfor the upconverter.In the lower half of the figure, the custom-designeddownconverter provides frequency translationto the IF band. In this configuration ahigh-performance oscilloscope (up to 32 GHzanalog bandwidth) and an advanced signal21 April 2013

TOOLS & SOFTWARElent 89600B vector signal analysis (VSA) software,which supports more than 30 hardware platformsand can run on a PC or inside newer Windowsbasedinstruments from Agilent. The VSA softwaresupports more than 70 signal formats, providesadvanced demodulation capabilities, andperforms measurements of EVM and other importantsignal characteristics. MATLAB is anotherimportant part of the receiver-side solution.Here, it provides a software environmentfor measurement automation and data analysis.For example, it can be used to create and applycustom measurements, filters, processing andequalization - capabilities that are especiallyuseful when standards are not finalized. MAT-LAB can also be used to create 2D and 3D dataplots derived from measured data.Figure 2. Thorough testing of 802.11ad transmitters and receivers requires a mix of capabilities:waveform creation, signal generation, frequency conversion, signal analysis, modulation analysisand spectrum analysis.analyzer (with optional high-end frequency coveragefrom RF to millimeter wave) providesignal, modulation and spectrum analysis capabilities.This configuration also includes the Agi-For additional RF characterization from 10MHz to 67 GHz, a microwave network analyzerprovides single-connection measurements ofactive devices such as amplifiers, mixers andfrequency converters. To simplify test configuration,built-in elements include a secondsignal source, a combiner and internal signalroutingswitches. Example measurements includeS-parameters, gain compression, twotonemeasurements, and noise-figure measurementson converters and two-port devices.The configuration presented here provides arange of testing and analysis capabilities thataddress the challenges of developing 802.11adtransmitters and receivers. The suggested combinationof flexible software elements andhigh-performance instrumentation is scalableand reconfigurable to address other technologiesas well as future projects. AdaCore releases GNAT Pro safety-criticalfor ARM processorsAdaCore announces the availability of its GNATPro Safety-Critical product for ARM Cortexmicro-controllers. This bareboard GNAT ProSafety-Critical product provides a completeAda development environment, oriented towardssystems that are safety-critical or havestringent memory constraints. Developers ofsuch systems can now exploit the software engineeringbenefits of the Ada language, includingreliability, maintainability, and portability.News ID 16936 HCC and Atollic accelerate the debugprocess for engineersHCC Embedded and Atollic announced the releaseof an advanced product that acceleratesthe debug process for engineers using Atollic’sTrueSTUDIO C/C++ IDE and HCC’seTaskSync verifiable task scheduler. AtollicTrueSTUDIO v4.0 was launched at the EmbeddedWorld. The TrueSTUDIO debuggerwill provide kernel aware debugging for HCC’seTaskSync scheduler to give engineers a meansto debug embedded systems rapidly. eTaskSyncis an advanced kernel that comes with fullProduct NewsMISRA-C:2004 compliance, 100%statement/object code coverage and MC/DCanalysis.News ID 16884 ARM announces mbed version 2.0 andopen source SDKARM unveils the next milestone of the mbedproject with a new SDK released under a permissiveopen source license, a new HDK forcreating low-cost development boards. Thembed platform is being developed by ARM todeliver free tools and software that enable effectiverapid prototyping with ARM Cortex-M series processor-based MCUs. The mbedSDK, already relied upon by tens of thousandsof developers, has been extended and releasedfree under a permissive open source license.News ID 16898 LDRA tool suite undergoes TÜV SÜDcertification for IEC 61508, ISO 26262and EN 50128LDRA has started TÜV SÜD review and certificationprocess to verify that the LDRA toolsuite is fully qualified to validate software applicationsfor industrial safety (IEC 61508),automotive (ISO 26262), and rail (EN 50128).Validation of full compliance is anticipated byQ2 2013. This TÜV SÜD certification buildson the ISO 9001:2008 certification alreadyachieved by LDRA in its forty year advocacyfor better quality software and development.News ID 16902 Rohde & Schwarz: generation andanalysis of WLAN IEEE 802.11ac signalsup to 160 MHzNew options extend the baseband of the R&SSMBV100A vector signal generator to 160 MHz,making it the only signal generator to directlysupport high-speed modes for WLAN IEEE802.11ac. An external PC is not needed. In the 5GHz ISM band, the R&S SMBV100A offers exceptionalsignal performance (0.44 % EVM) for160 MHz signals. The latest generation of thefield-tested R&S FSV signal and spectrum analyzercan also be equipped with a demodulationbandwidth of 160 MHz. Unmatched in the general-purposeinstrument class, the analyzer cannow be used to record and demodulate a WLANIEEE 802.11ac signal in its full bandwidth of upto 160 MHz.News ID 16890April 2013 22

TOOLS & SOFTWAREThe launch of the newMISRA C: 2012 (MISRA C3) GuidelinesPaul Burden, Senior Technical Consultantand PRQA representative on the MISRAworking committee, talked about the newguidelines with ECE Magazine editorWolfgang Patelay.ECE: So, Paul, give me a bit of backgroundto MISRABurden: The MISRA mission statement speaksof providing assistance to the automotive industryin the application and creation withinvehicle systems of safe and reliable software.MISRA has published a variety of documentsover the years. It has contributed significantlyto developments in functional safety, particularlythe ISO 26262 standard, and the developmentof coding guidelines for C and C++ -MISRA C and MISRA C++. MISRA C wasfirst published in 1998. It provided some badlyneeded guidance to engineers, often with verylimited experience in software engineering, ata time when software reliability was becominga critical issue. To start with, it was a modestinitiative within the UK motor industry, but itrapidly developed into a project of major significance.A second version of MISRA C appearedin 2004, and a third version, MISRAC:2012, was launched on 18 March 2013.ECE: So how significant is this particularupdate to the MISRA C coding guidelines?Burden: A lot of work has gone into the latestversion and the result is a better document.MISRA C has a large following and I wouldexpect the new version to be of interest to anyonedeveloping systems in C who cares aboutsoftware quality.ECE: But why was it necessary to produceanother edition?Burden: It is not an easy decision to changesomething that is widely accepted and widelyused, so there had to be a good reason to bringout a new version of MISRA C. In fact, therewere several key reasons: support for C99, respondingto user feedback and an acknowledgementthat improvements could be made.Paul Burden,Senior TechnicalConsultant andPRQA representativeon the MISRAworking committeeECE: Is MISRA C just an automotivestandard?Burden: Not at all. MISRA C is now in useworldwide. It is used in a wide range ofdifferent industries – aerospace, defence, medicalinstruments, process control, nuclear power,consumer electronics and critical systems infinance. It is the most widely used set ofcoding guidelines for development in the Clanguage.ECE: So what are the key differencescompared to the previous version?Burden: There are the following five main differences.First the language: C has evolved.Support is now provided for C99 as well asC90. Second the document structure: MISRAC3 includes 16 directives and 143 rules. Compliancewith a rule can be determined solelyfrom analysis of the source code. Compliancewith a directive may be open to some measureof interpretation or may, for example, requirereference to design or requirements documents.Third the deviation classification: Each directiveor rule is classified as Mandatory, Required orAdvisory.Deviations are optional for Advisory rules butcompulsory for Required rules – as in MISRAC:2004. Mandatory rules may not be deviated– ever! No circumstances are envisaged whereit would ever be desirable or necessary toviolate these rules. Fourth the analysis scope:Compliance with many rules can be assuredby analysis of the code in each translationunit in isolation. Other rules require analysisof all code in the program. Each rule is nowclassified explicitly as either a single translationunit rule or a system rule. This distinction isimportant for two reasons.Firstly because ensuring compliance with systemrules requires more extensive analysis; andsecondly because some system rules are undecidable.If a rule is undecidable, no tool, howeversophisticated, can guarantee to identify everynon-compliance. And last but not least fifththe improved rule definition: Rules are nowmore rigorously defined and better explained.ECE: What does this mean for legacy codewhich is already MISRA C:2004 compliant?Burden: Each version of MISRA C has beenlarger than the last but the number of ruleshas not increased greatly. In MISRA C:2012 afew new rules have been added – mainly forC99, and a few have been removed or redrafted.The document is larger, mainly because ofmany improvements in the explanation anddefinition of rules. There are new requirementsbut these are relatively few and code whichcomplies with MISRA C:2004 is likely to complywith MISRA C:2012 with relatively littlemodification.ECE: Are there any pre-approved/validated/ -certified MISRA C3 checker tools available?Burden: No, MISRA does not endorse toolsor provide certification services. However,TERA-Labs, a division of the University ofAntwerp, recently completed a comparativestudy of 8 MISRA C checking tools. Our product,QA C, was confirmed as the best codeanalysis tool for enforcing MISRA C2 complianceand we have continued to build on thislead in our enforcement of MISRA C3.ECE: So are PRQA tools ready to supportMISRA C3?Burden: Yes! We announced at EmbeddedWorld availability of our MISRA C:2012 compliancemodule for QA C and we were readyto start supporting customers as soon as theGuidelines were published. 23 April 2013

TOOLS & SOFTWAREDesign reuse – managing dataand processesBy Rob Evans, AltiumDesign reuse offers manyadvantages but the problem isguaranteeing the integrityof reusable design data.This article describes a newapproach, in which designcontent is released intoa secure storage vault asa unique, traceable revision,also containing any numberof child elements such ascomponents and sub-circuits,maintaining integrity downto the lowest level. In electronics design the need to reuse assetshas grown increasingly insistent as productdevelopment becomes more complex and projecttimelines reduce. The efficiency advantagesof reduced design time and lower costs, andthe potential safety net of harnessing designelements of a known origin and quality, makedesign reuse a compelling concept. To makepractical design reuse a reality one of the keyfactors, most difficult to achieve, is assuringthe integrity of reusable design data – withoutit, the risk is too high and we don’t have theconfidence to reuse that design data. Becauseof that doubt, designers and organizations areunderstandably reluctant to take the risk oftackling real design reuse at anything but ahigh-cost enterprise level.Yet at its most fundamental level, design engineerspractice design reuse in every hardwareproject through the use of integrated circuits –off-the-shelf ICs that have been rigorouslytested and used in countless other designs. ICsgenerally contain a complex collection of circuitry,but we have faith in the integrity ofwhat’s inside. This example points to the essentialconcepts of effective design reuse. Here,the reapplied collection of electronics and datais a known and trusted commodity. There’sno need to reinvent the wheel by designing itsinternal circuitry, since we have full confidencein the integrity of the ‘pre-assembled’ version.And secondly, we aim for a disciplined approachto establishing, storing and using thedesign data associated with that reusable element,by rigidly using a formalized source(such as company database libraries) that featuresstandardized naming conventions anddata structures. It highlights two clues to practicaland effective design reuse – maintainingdesign data integrity and a disciplined approachto how that data is created and applied.In practice, the main challenge when reusingcomponents tends to be further down the designpath where we commit to the final stagesof releasing a design for prototyping or production.At this point we need to be confidentthat the component data is up-to-date and relevant,or more specifically, that a part is stillavailable, still cost-effective in numbers required,and not superseded by a more suitablecomponent.Managing the integrity of collections of components– ensuring their reuseability in effect– can take on the form of locally approvedcomponent libraries right through to companydatabase libraries that hook into the organization’slifecycle management system. The practicaleffectiveness of these systems varies widely– higher level, more complex and intrusivedata management tends to restrict componentchoice and is disconnected from the designprocess, while an informal, local approach carriesa higher degree of risk but is an interactivepart of the environment where componentdecisions are actually made.It’s at the highest level of design reuse wherethings really become challenging and our confidenceunderstandably wanes. The ultimateaim of recycling design resources is the abilityto confidently apply whole sections of pre-existingdesign content in new design projects –reusing our hard-won and painstakingly developeddesign IP. This is design reuse at amuch higher level of abstraction, where thenumber of elements and variables included ineach saved design package can be huge. Here,each reusable section will represent the circuitryand sub-elements – components (includingmodels and parameters), nested circuitry andso on – that are needed to deliver the functionof that package.To date, this level of design reuse has beentackled using an ad hoc approach based oncopy-and-paste techniques, or at best, a systemto formally store reusable chunks of circuitry.This notional design reuse capability providesthe basic mechanisms to implement reusableelements, but does very little (or nothing atall) to mitigate the risk of using them. You justcan’t be sure that the source circuitry is the latestversion, its functionality is still viable, itApril 2013 24

TOOLS & SOFTWAREcan be fully managed as revisions, and incorporatelinks to real-time supplier data thatprovides up-to-date pricing and availabilityinformation. It means that released designpackages, and components, exist in a lockedand traceable form within the vault, wherethey can be managed and reused with accurateand up-to-date knowledge of their origin, historyand lifecycle state – in effect, their validityfor new designs.Figure 1. Formally storing a circuit diagram in a fully managed Vault allows its reuse in otherdesign projects that call for the same functionality. This applies to models of individual componentsjust as well as entire electronic devices.does not contain errors or undocumentedmodifications, or for that matter, if the componentsare still suitable, available and cost-effective.The risks of reusing design sections inthis way are cumulative and untenable, so providingthe design system features and functionsneeded to reuse design content is of little valuewhen the integrity of that content is in doubt.What’s needed is a practical and effective wayto securely store, share and manage locked revisionsof reusable design content, then managethe lifecycle of that content to define its suitabilityfor new designs. It involves separatingreleased design data from the fluidity of thedesign environment into its own fully managed,but accessible, repository. Taking this approach,design content can be released from the designspace itself into a secure storage vault as aunique, traceable revision, which can containany number of child elements (components,sub-circuits, etc). The child content will alsoexist in the vault as its own set of managed revisions,so the integrity of the parent contentis maintained down to the lowest level.A design section is released into the vault as areusable schematic sheet (or tree of sheets)and stored as a fixed revision, where its lifecyclestatus (prototype or production, for example)can be defined over time. If the design sourcedocuments are updated, a new sequentiallynamedrevision can be released to the vaultand its status set accordingly. A sheet of designcircuitry can be formally released into thevault, and then be reused in other design projectsrequiring that same functionality. In thesame way, components released to the vaultFurthermore, once all released items exist inthe vault, including full designs released forprototyping or production, the inter-relationshipsare easy to monitor and track. You canthen have an immediate view of what modelrevisions are used in a component, what componentrevisions are used in a sheet, what designsheet revision is used in a released design,and so on. When you choose a reusable vaultitem for a new design, you’ll have a full understandingof where it’s been used, as well as itsorigins and current lifecycle status.Based on server technology, the managed vaultsystem exists separately from the own projectdata storage of the design system, but can beaccessed easily through the design environmentitself or from the broader organization. Thisprovides secure, permission-based access toothers in the organization such as procurement,manufacturing and administration. Componentchoices, for example, can then become acooperative process with purchasing, and vaultbaseddesign resource data can be easily accessedby company data management systems.From a design reuse view it means that allreusable items have a high degree of data integrity.You can be sure that an item is thelatest revision, you know it has not changedsince it was released into the vault, and you25 April 2013

TOOLS & SOFTWAREcomponent models to complete assembliesready for production – even newly created designelements are released to the vault so theycan be sourced back into a design. The benefitsof this defined and structured approach, basedaround managed vaults and advanced designdata management, are substantial and self-perpetuating.Design productivity ramps up asmore design content is created, released to andsubsequently approved for reuse from the vault.Future designs become quicker to implementas the vault-based repository of design buildingblocks grows, and required circuit functionalitybecomes available for placement in a higherabstractedmodular fashion.Figure 2. An automated design release process validates a printed circuit board design, which isstored (as revision) in a secure vault where its life cycle status can be managed.can see where it’s used in other design resources.The lifecycle status (prototype, production,etc) sets the reusable item’s approval state andhow it can be used, and it’s clear when a subitem(such as a constituent component) is nolonger approved.Enabled by the described vault technology,the capability to store, manage and recyclehigh-integrity design IP brings meaningful designreuse to electronics engineers with theright tools and systems. A unified electronicsdesign system with powerful data managementtools can connect directly to the managedvault system for easy design data access andmanagement, allowing verified, tracked designelements and sections of circuitry to bedropped into new designs at will. With all thesystems and tools in place, this then opens theopportunity to practise design for reuse (asopposed to design reuse) at a fundamentallevel. The difference here is that all elementsof design are captured and configured so thatthey can be easily re-used across any newfuture designs. From components (and theirconstituent models and data), to sheets ofschematic circuitry and up to fully releasedmodular designs, all are released into a vaultto essentially create a repository of manageddesign building blocks. And this is where theprocess discipline needs to be applied, basedon the commitment to a design for reuse approach.From the ground up, standardizednaming systems, data storage structures anddesign methodology need to be instigated (andrigorously applied) to bring order and integrityto the design process, which is based around acommon set of secure, lifecycle- managedvaults. The vaults become the essential sourcefor released design data IP, from the lowestUltimately, the concept of releasing design elementsto a fully managed vault provides a robustsystem for implementing a design forreuse methodology. And it goes way beyondsimply providing the mechanisms to accesspredefined design elements. By addressing thekey issues of managing data integrity and implementinga disciplined design methodologyand structure, the approach eliminates therisks associated with reusing even high level,multi-layered design sections.In practice it means that valuable design IPcan, and should, be reused with full confidencein its integrity. Implementing design reuseduring electronic product development is nolonger an act of blind faith or risky bravado –you can now know everything about the contentand viability of a reusable element, andmost importantly, know that its veracity is assured.And above all, implementing a designfor reuse methodology dictates a shift in thinkingand approach. Design reuse moves frombeing a desired bonus, or addition to electronicsdesign, to become the core of how you design,based around fully managed vaults. JTAG: low-cost boundary-scan suitecovers all applicationsJTAGLive Studio is a comprehensive package ofJTAG/boundary-scan tools that enable designersand manufacturing test engineers alike to developcomplete test and programming applications ata low price level. The benefits offered by theJTAG Technology for debugging, testing and insystemprogramming are not limited to complexdesigns with many JTAG devices. Designs withonly a few, even just one or two, JTAG devicescan also greatly benefit from this technologyduring all stages of the life cycle. A toolsetcapable of handling even the most (very) complexboundary-scan designs, however, often is noteconomically feasible for a company that onlyuses a few JTAG devices in its designs.News ID 16889Product News ADI: simulation tool eases developmentof RF systemsAnalog Devices released a new version of itspopular ADIsimRF design tool. The free designtool is the software accompaniment toADI’s complete portfolio of RF-to-digitalfunctional blocks, allowing engineers tomodel RF signal chains using devices fromacross ADI’s RF IC and data converter portfolio.ADIsimRF Version 1.7 adds a numberof new device models along with enhancedsupport for inter-stage mismatch calculations.The design tool provides calculationsfor the most important parameters withinan RF signal chain, including cascaded gain,noise figure, IP3, P1dB, and total powerconsumption.News ID 16894 PRQA: sophisticated and collaborativecode inspectionsPRQA announces a significant upgrade toQA•Verify quality management solution.QA•Verify already leverages the broad industryadoption of QA•C and QA•C++, providingteam-sharing collaboration, sophisticated codingstandards compliance, metrics and reportingfacilities across multiple software projects. Theadoption of structured code inspections remainssurprisingly low, despite the fact that the benefitsare well documented and compelling. Inspectionshave historically been a manual and intensiveeffort, difficult to scale as code volumeand complexity increases, along with the inevitableschedule and resourcing pressures on adevelopment team’s most experienced resources.News ID 16919April 201326

MICROCONTROLLERSSafer household appliances withlow-cost ARM Cortex-M based MCUsBy Vincent Onde, STMicroelectronicsHardware parity checkadoption in the embeddedmarket for general purposeMCUs, combined with anever-increasing number ofsystem monitoring and safetyfeatures, makes applicationssimpler to be certified, safetyrelateddevelopment taskseasier to be implemented,and most important, makeshousehold appliances safer. Since 2007, household appliance manufacturershave had to adhere to the IEC60335safety standard for all new designs. This standardcovers everything from mechanical systemsto embedded electronics to ensure theequipment is safe and reliable, and more specifically,that a failure will not present a safetyhazard to the user.The electronics section refers to another standard,the IEC60730, which covers automaticelectronic control for a wide range of applications.In particular, Annex H is important forembedded systems developers since it focuseson programmable devices. Microcontrollers arecommon in white goods, often used in multiples:typically, one manages the dashboard while anotherone handles valve and motor control.The standard distinguishes three software classes,A, B and C, depending on the danger apiece of equipment presents if it fails. If thesafety of the appliance does not rely on software,it falls into Class A - room thermostats orlighting controls, for example. At the oppositeend of the spectrum, if the software is intendedto prevent special hazards such as an explosionin electronically-fired gas burners, it is evaluatedas Class C. Class C is not covered in thisarticle since most household appliances whoseelectronic controls must prevent unsafe operationbelong to Class B. Class B includes washingmachines for example, with the potentialissues related to electronically controlled doorlocks or to thermal cut-offs of motors. TheIEC60730 table H.11.12.7 in Annex H lists themicrocontroller components to be tested, thefaults to be detected, and the acceptable measures,for both software class B and C. It includesthe CPU (registers and program counter), interrupts(handling and execution), clock frequencymonitoring, checks on variable memory(RAM) and invariable memory (flash, EEP-ROM), external communications, and peripherals.These checks are first done exhaustivelyduring the MCU boot, even before the systemstart-up code execution takes place. Why? Themain reason is that the RAM test is ‘destructive’and would corrupt the initialized variables.What is asked for within a RAM check? ForClass B, the standard requires single-bit DCfault detection (for instance stuck-at or couplingfault) to be done periodically. Since mostof the entry-level MCUs do not have paritybits included in their SRAM, the test must beimplemented by software. March algorithmsdetect these faults with a limited number ofpasses: March C- fits perfectly (using 10.n operations,n being the number of locations tobe tested) but March X (6.n operations) isalso accepted by test institutes in particularcases. Once the test is complete, the RAMmemory is erased (thus the term ‘destructivetest’). Carrying out a March test following thereset does not present particular difficulties. Ithas no real drawback other than slowing downthe start-up procedure a little bit: given thesmall quantity of embedded SRAM, usuallythis is not even noticeable. On the other hand,it can be quite a challenge if repeated duringrun-time.Firstly, it must be made transparent: the applicationmust handle the RAM without particularprotocol, as if the test were not implemented.Practically speaking, this imposes the followingconditions. It must be implemented in an interruptservice routine (ISR), served with the highestpriority. This guarantees the data will not beaccessed by the application while testing is done.A memory buffer must be provisioned, so thatthe content of the RAM area being checked canfirst be backed up and finally restored before resumingthe applicative tasks. Obviously, thisbuffer must also be periodically verified.Secondly, it must not suspend the applicationfor too much time. The check is usually splitin a number of partial tests to limit the timespent in this top level task. Still, the numberof locations tested at once cannot be lowerthan 3 consecutive locations (this is mandatoryto have coupling fault coverage), which representsno less than 30 successive read/write accessesusing a March C- algorithm. Although27 April 2013

MICROCONTROLLERSFigure 1. Software for handling the partial RAM test during run-timeFigure 2. When the data is read, its parity is computed and checked against the reference value.this solution has proven to be effective and isnowadays a common industry practice, it hasa number of drawbacks. Let’s consider it fromthe software engineering standpoint first. Wewill not review the benefits of structured programming,but let’s look at the constraints relatedto this implementation. Encapsulationissues: the C modules must have part of theirinternal variables promoted as global and thusno longer subject to the sanity checks done bythe compiler against cross modules accesses.Low tasks isolation and poor modularization:the test structure imposes a test access to eachsafety critical software module and makes theaddition of new features more complex. Wecan also consider potentially higher risks ofdata corruption if we link its probability tothe number of read/write accesses. This is mitigatedby inverse redundant storage of safetycritical variables, but this in turn increases thesize of the area to be “Class B tested”.From the MCU resources standpoint, the testimplementation consumes ROM and RAM, aswell as CPU bandwidth: if the core is temporarilyunable to absorb the test burden ontop of its regular processing task, the test mighthave to be stopped during a computationallycritical operating phase of the appliance. Finally,a run-time RAM check affects real-time responsiveness(it can delay or even suspendany other ISR) and can conflict with low-latencyor emergency tasks requirements. Thelength of the test routine cannot be minimized:a minimum number of consecutive memorylocations must be evaluated for coupling faultscoverage. And the complexity increases if thesoftware has to manage address descramblingto be in line with the physical memory layout.How software handles the partial RAM testduring run-time is shown in figure 1. TheIEC60730 standard proposes an alternative solutionconsisting of a hardware parity bit. Althoughthis is standard procedure for DRAMmemories, this is quite unusual in general purposemicrocontrollers; advanced silicon processnodes have made such features more cost-effective.The solution consists of adding oneparity bit per memory location: the parity iscomputed at the time the memory is writtenand stored in parallel with the data. When thedata is read, its parity is computed and checkedagainst the reference value, as represented infigure 2. In case of a difference, either due todata or parity bit corruption, an interrupt orexception signal line is asserted.The core then handles the error in a dedicatedsafety ISR and shuts down the appliance properly.In a second step, the core may re-start theapplication (hot reset) or definitively stop theequipment with a maintenance code displayed.The benefits of this implementation are obvious.Class B RAM check is made completelytransparent: Software practices do not need tobe compromised, no MCU vendor specifictest routine has to be developed, other than aglobal fault handling function which must bepresent in any case, no specific RAM partitioningand linker script is needed, CPU bandwidthis fully available for the application (theparity computation does not increase the memoryreading latency), and real-time behavioris optimum. As a final benefit, this eliminatesthe need for the full RAM check at start-upand lowers the boot time, since the paritycheck is active right after the power-on reset.Brushless motors are used in appliances becauseof their high efficiency, silent operation androbustness, but complex control and dedicatedPWM peripherals are necessary. Particular careis needed for fault protection and safe shutdown.For this purpose, the RAM parity errorchecking mechanism improves reliability andresponse time. Rather than managing safeshut-down by software, the parity error signalis directly routed to the PWM peripherals totrigger an emergency shut-down automaticallyand avoid system clock and software-relateddelay. The block diagram in figure 3 presents apractical implementation.Care must also be taken to monitor other criticalsystem parameters. A power supply monitoringsystem can be programmed to issue aninterrupt if the Vdd voltage drops below a preprogrammedvalue. Similarly, a clock securitysystem verifies that the main clock is operatingproperly and issues an interrupt in case of ab-April 2013 28

MICROCONTROLLERSFigure 3. Block diagram of a practical implementationnormal operation. Additionally, the Cortexcore provides a signal at the chip level to indicatewhen the core enters lockup state, whichcan take place when a fault occurs inside thehard fault or the NMI handlers, or when a busfault occurs during the boot sequence. Thesethree events, together with the parity, aremerged for asserting an internal emergencyshutdown signal, which is itself OR’ed withthe external break input. A failsafe clock circuitryis also required by the norm. This ispartly achieved using a clock security systemperipheral (CSS) that automatically switchesthe main clock back to an internal high-speedoscillator in case of crystal failure. Additionally,it is necessary to provide a means to monitorthe external clock by comparing the expectedexternal frequency with an internal one. Thereal-time clock timer can be supplied by theLSI (low speed internal) internal RC oscillatorto measure the main system clock preciselyenough to detect a 50% change due to operationon the crystal sub-harmonics. At systemlevel, this can save the cost of circuitry able todo 50/60Hz mains zero-crossing detection.The norm proposes an independent time-slotmonitoring to prevent any CPU run-away incase of a program counter malfunction: this isthe duty of the watchdog timer, which is embeddedin most MCUs. Nonetheless, it is statedthat it must be fully independent. For this reason,the STMicroelectronics Cortex-M basedSTM32 family has two watchdogs: a regularwindow watchdog running on the main clocksource, and a second watchdog, using an independentinternal oscillator and started withan option byte located in flash memory. Thisensures that at least one watchdog will beactive in case of crystal failure and whateverthe clock circuitry configuration.Finally, the MCU embeds a 32-bit hardwareCRC calculation unit, which significantly speedsupthe flash content integrity check and reducesthe related CPU load (spend during run-time)to a negligible value. This peripheral can evenbe fed by the DMA controller. It gives the possibilityto have the flash integrity check doneas a background task during run-time. Product News Infineon: easy switch from 8-bit to 32-bitwith XMC1000 Industrial MCUsAt Embedded World, Infineon Technologies presentedsamples of its new XMC1000 industrial 32-bit microcontroller family which provides systemdesigners with strong incentive to switch from 8 to32 bit MCU architecture. With XMC1000, Infineonoffers a fully-featured 32-bit alternative for hitherto8-bit users by combining the ARM Cortex-M0processor core with powerful peripherals, high productivitydesign tools and costs typical of 8-bit devicesbased on production using state-of-the-art,65nm embedded Flash technology on 300mmwafers.News ID 16910 Holtek: Tinypower MCU for 3D Glassescomes in 16-pin SSOP packageHoltek’s new HT45FH3T MCU comes fully integratedwith the necessary high voltage circuitswhich are a requirement for 3D Glasses applications.In addition to including all the originalfunctions of the previous HT45F3T, this newdevice also includes a 3V low dropout voltage regulatorand four level shift functions. These featuresextensively reduce the need for peripheral components,resulting not only in reduced cost but alsoreduced PCB areas.News ID 1698829 April 2013

PRODUCT NEWS PRQA announces support for MISRAC:2012PRQA announces that its tools offer supportfor MISRA C:2012 (MISRA C3), with an updatedcompliance module for QA•C Version8.1, in anticipation of the new version of thecoding standard which will be published on18 March. The new standard contains a numberof improvements over previous versions andextends support to the C99 version of the Clanguage (ISO/IEC 9899:1999).News ID 16912 Freescale and ARM extend relationshipwith Cortex-A50 processor licenseFreescale is licensing the ARM Cortex-A50series of microprocessors for future versions ofits i.MX applications processor and QorIQcommunications processor product lines. Thisagreement is part of a new multiyear subscriptionlicense with ARM that demonstratesFreescale’s commitment to the ARM architectureand its intent to further expand its ARM Poweredportfolio – one of the industry’s broadest rangeof solutions built on ARM technology.News ID 16938 AdaCore and Wind River to offer jointproduct training services in EuropeAdaCore together with Wind River announcedthe availability of joint education and mentoringservices in Europe. A natural extensionto an already successful technology partnership,specialized training courses will allow customersto enhance the efficiency of their embeddedsystem development.News ID 16924 Express Logic and Cypherbridge team onsecure cloud device kitExpress Logic and Cypherbridge Systems announcethe integration of the Cypherbridgeembedded secure Cloud Device Kit for ExpressLogic platforms. This integrated solution enablesembedded devices to connect securely tothe cloud using JSON and XMPP. The solutionis targeted at vertical markets including grid,commercial and residential energy management,M2M, telemetry, metering, SCADA, payment,and gaming terminals.News ID 16895 Rohde & Schwarz: analyzing powersupply unitsThe R&S RTO and R&S RTM oscilloscopesfrom Rohde & Schwarz are the right tools foranalyzing power supply units. The frontendsof both instruments have outstanding featuresoffering clear advantages over other solutions.Their high dynamic range allows for precisecharacterization of the power on operationsof an embedded system. Power analysis requiresthat users measure voltage and current.News ID 16913 Elektrobit provides developmentplatform for Renesas’ infotainment systemThe runtime solution of Elektrobit’s developmentplatform for human machine interfaces,EB GUIDE Graphic Target Framework, hasbeen ported to the Renesas’ R-Car H1. This isthe latest member of the R-Car series of automotiveSoCs. The collaboration will enablecar manufacturers to use the high-end Renesaschip in combination with the EB GUIDE GTFto utilize the advanced graphical capabilitiesof the SoC. The carmakers will benefit by ahuge acceleration in development processesand will also be able to create cost effectiveprototypes of future HMI platforms.News ID 16939 IAR: Embedded Workbench for STM8adds new text editor and source browserIAR Systems launches a new version of its developmenttools for STMicroelectronics’ STM8.The new version 1.40 of IAR Embedded Workbenchfor STM8 adds user-friendly functionalityin the form of a new text editor and sourcebrowser, integration with the version controlsystem Subversion and new license managementfeatures. Also added is support for additionaldevices and a new debugging guide.News ID 17014 Berner & Mattner: improved changemanagement for IBM Rational StatematemodelsBerner & Mattner’s new PowerDiff version 9.1facilitates the development of complex systemswith IBM Rational Statemate. PowerDiff is theonly graphical diff tool for IBM Rational Statematemodels and ensures model consistencyas well as traceability of changes during thesystem’s entire life cycle. The new version forWindows XP and Windows 7 provides users ofthe defence, aeronautics and automotive industrieswith an improved graphical user interfaceand additional extended functions.News ID 16880 Enea Linux supports Xilinx Zynq-7000All Programmable SoCEnea Linux is now available for the XilinxZynq-7000 All Programmable SoC family,providing a comprehensive cross-developmenttool chain and runtime environment thatmay be combined with Enea and other proprietarytechnologies, depending on the specificuse cases and requirements. The Zynq-7000 devices combine the software programmabilityof an ARM Cortex-A9 MPCore withthe hardware programmability of an FPGA,resulting in unrivaled levels of system performance,flexibility, and scalability whileproviding system benefits in terms of powerreduction and lower cost with fast time tomarket.News ID 16953Advertisers IndexCOMPANYPAGEARM 31/43EBV 30Express Logic 39Lauterbach 47PLS 57Trinamic 37 LieberLieber: C-Code generator andgraphical debugger for UMLLieberLieber will provide a graphical UML debuggerfor the development of embedded systemsintegrated in Enterprise Architect of Sparx Systems.The code generation engine UML2C generatessimple and target independent ANSI C-code for State Machines and Activity Diagrams.The compiled code can be directly flashed intothe target device. Finally, LieberLieber`s EnterpriseArchitect Add-On AMUSE Embedded will beable to connect to the device and allow forgraphically testing and model debugging.News ID 17015 Swissbit and HCC demonstrate fail-safeembedded storage systemSwissbit and HCC Embedded will demonstrateda completely robust, fail-safe embedded storagesystem at the Embedded World. The system isbased on a combination of Swissbit’s IndustrialSD Card and HCC’s SafeFAT fail-safe filesystem. In order to achieve a truly fail-safestorage system, the behavior and requirementsof all layers of the system must be properly defined.The demonstration will use Swissbit’s S-200 Industrial SD Card, with intelligent powerfailprotection and recovery, in conjunctionwith HCC’s fail-safe SafeFAT file system.News ID 16887 MSC: 16 kbit FRAM in space-savingSON-8 packageMSC now offers the addition of a new smallerpackage to the MB85RC16, 16 Kbit FerroelectricRandom Access Memory, from FujitsuSemiconductor Europe. The new 16 kbit FRAMfeatures ultra low-power consumption. Thepackage dimension of the MB85RC16 is just 3mm x 2 mm. Compared with the older SOP-8package, the new SON-8 package reduces themounting space by up to 80 percent.News ID 16882April 2013 30

PRODUCT NEWS Toshiba: structured ASICs for EuropeancustomersToshiba Electronics Europe has announcedthe European availability of a StructuredArray technology. The technology providesan ASIC alternative to FPGA with lower costand power consumption - but still at significantlylower implementation and sample/productionturn-around time than standardASICs. Based on technology licensed fromBaySand, Toshiba’s Structured Arrays supportthe rapid creation of high-performance, lowpowerSoC devices.News ID 16999 Altera to build next-generation FPGAs onIntel’s 14 nm tri-gate technologyAltera and Intel Corporation announced thatthe companies have entered into an agreementfor the future manufacture of Altera FPGAson Intel’s 14 nm tri-gate transistor technology.These next-generation products, which targetultra high-performance systems for military,wireline communications, cloud networking,and compute and storage applications, willenable breakthrough levels of performanceand power efficiencies not otherwise possible.News ID 16978 Mouser and Altera sign worldwidedistribution agreementMouser Electronics announced the signingof a worldwide distribution agreement withAltera. Through this agreement, Mouser becomesan authorized global distributor ofAltera FPGAs, CPLDs, development tools,intellectual property cores and developmentkits. Mouser gives design engineers fast, easyaccess to the widest range of semiconductortechnologies.News ID 16932 ADI: prototyping kit simplifies A/Dconverter-to-FPGA connectivityAnalog Devices unveiled the newest additionto its line of FPGA development platformcompatibleFPGA mezzanine cards incorporatingJEDEC JESD204B SerDes technology.Digital and analog designers can use theAD9250-FMC-250EBZ kit to simplify and rapidlyprototype high-speed JESD204B A/D converter-to-FPGAplatforms. The AD9250-FMC-250EBZ features two AD9250 dual 14-bit highspeedJESD204B data converters providingfour 14-bit A/D converter channels at 250MSPS in an FMC-compliant form factor.News ID 16906 Reflex CES: 25-million gates or moreASIC prototyping platform withpartitioning softwareReflex CES introduced FPP25, a fast ASIC/SOCprototyping platform for emulating designsof up to 25-million ASIC gates using a standalonesystem. Based on Xilinx Virtex-7 2000TFPGAs, FPP25 exploits Reflex CES’ collaborationwith Flexras and Adacsys, to offer designengineers an easy-to-use, next generation platformto speed up validation and verificationof complex, high density digital designs.News ID 16927 MEAS: 1.8 V digital humidity sensor in asmall packageMeasurement Specialties now offers theHTU21D, a compact, low power digital humidity/temperaturesensor. The self-containedsensor interfaces directly with a micro-controllerensuring a better signal path as well asreducing costs, space requirements and powerconsumption. The HTU21D, which requiresonly 1.8 V for operation, offers an adjustableresolution for humidity and temperature of8/12-bit or 12/14-bit, depending on neededresponse time.News ID 16970 Rohm: dedicated PMIC to support“Bay Trail” platformROHM has announced the development of adedicated system power management IC tosupport Intel‘s latest Atom-based platform,code name “Bay Trail”. A highly integratedpower management solution with industryleading power efficiency, ROHM’s PMIC istargeted towards ultra-thin form factor tabletand convertible devices.News ID 16967 Silica: ArchiTech initiative for designand development toolsSILICA has launched a major engineeringsupport initiative called ArchiTech. With ArchiTech,the semiconductor distributor aimsat providing a full solution and single-pointof-contactfor all requirements related to designtools. ArchiTech solutions will help customersto bring new designs to market on time and inthe most efficient possible way. The distributorbrings together robust development tools, engineeringand software expertise, in-depthtraining and extensive documentation.News ID 16955 GOEPEL upgrades ChipVORX for Bit ErrorRate TestsGOEPEL electronic‘s IP-based ChipVORXtechnology has been extended to execute BitError Rate Tests (BERT). The highly automatedsolution enables FPGA Embedded Instrumentsutilization in the form of specialsoftcores for the test and design validation ofhigh-speed I/O. Users can now evaluate thetransmission channel quality via measurementof the bit error rate. A graphical evaluationvia eye diagram is possible to support designvalidation.News ID 17017EditorsJürgen Hübnerphone +49(0)8092-2477413fax +49(0)8092-2477429jh@iccmedia.comWolfgang Patelaywp@iccmedia.comTony Devereuxdevrex@teyboyz.freeserve.co.ukFor Reader Inquiries and Address Changesplease contact:info@iccmedia.comSales & Marketing DirectorManfred Blumoserphone +49(0)8092-2477411fax +49(0)8092-2477429mb@iccmedia.comClaudia Melleincm@iccmedia.comChristiane Locknercl@iccmedia.comSales Office - UK and USA, Benelux,ScandinaviaBlue Sky CommunicationsMalcolm Cameron21 Cliffe AvenueWestbrook,Margate, Kent CT9 5DU, UKphone +44 (0)77 88-10 84 11fax +44 (0)80 82-8010 57mc@blue-sky-communications.comSales Office - AsiaJean Cheng, jean@i-media.com.twVivian Hung, vivian@i-media.com.twInnovative Media Information & Services7F-3, No. 26, Sec. 2, Ming-Quan East Rd.Taipei 104 Taiwanphone +886 2 2563 1186Head OfficeICC Media GmbHRauwagnerstr. 585560 Ebersberg / GermanyEditorial Office UK36a Blackacre RoadTheydon BoisEssex, CM16 7LUCopyright© All rights reserved.No part of this publication may be reproduced or transmittedin any form or by any means without the prior express writtenpermission of ICC Media.Although we make every effort to present up-to- date, accurateinformation, boards&solutions will not be responsible for anyerrors or omissions or for any results obtained from the use ofsuch information. The magazine will not be liable for any losscaused by the reliance on information obtained on this site.Furthermore, ece does not warrant the accuracy orcompleteness of the information, text, graphics in this magazine.The opinions expressed in the articles are those of theauthors and not necessarily the opinions of the publisher.31 April 2013