GPU Performance Analysis and Optimization - GPU Technology ...

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Memory Parallelism• Achieved Kepler memory thoughput– As a function of the number of independent requests per SM– Request: 128-byte line© 2012, NVIDIA10
Exposing Sufficient Parallelism• What hardware ultimately needs:– Arithmetic pipes:• sufficient number of independent instructions– accommodates multi-issue <strong>and</strong> latency hiding– Memory system:• sufficient requests in flight to saturate b<strong>and</strong>width• Two ways to increase parallelism:– More independent work within a thread (warp)• ILP for math, independent accesses for memory– More concurrent threads (warps)© 2012, NVIDIA11
Page 2: Goals of This Talk• Give insight
Page 6 and 7: Topics For Ninjas• Topics relevan
Page 8 and 9: EXPOSING SUFFICIENT PARALLELISM© 2
Page 12 and 13: Occupancy• Occupancy: number of c
Page 14 and 15: Exposing Parallelism: Grid Configur
Page 16 and 17: Threadblock SizingToo fewthreadsper
Page 18 and 19: Case Study 1: Threadblock Sizing•
Page 20 and 21: Tail Effect• Tail underutilizes G
Page 22 and 23: Tail Effect: Large vs Small Threadb
Page 24 and 25: General Guidelines• Threadblock s
Page 26 and 27: Kepler Memory HierarchySM-0Register
Page 28 and 29: Blocking for L1, Read-only, L2 Cach
Page 30 and 31: Global Memory Operations• Memory
Page 32 and 33: Read-only Loads• Go through the r
Page 34 and 35: Read-only Loads• Go through the r
Page 36 and 37: Caching Load• Scenario:- Warp req
Page 42 and 43: Caching Load• Scenario:- All thre
Page 46 and 47: Memory Throughput Analysis• Two p
Page 48 and 49: Two Ways to Investigate Address Pat
Page 50 and 51: Pattern Category: Offset Access•
Page 52 and 53: Case Study 2: Offset Address Patter
Page 54 and 55: Case Study 2: Remedy• Looking at
Page 56 and 57: Pattern Category 2: Large Inter-thr
Page 58 and 59: Case Study 3: Diagnosis• Double-p
Page 60 and 61:
Case Study 3: Result• Naïve impl
Page 62 and 63:
Case Study 4: SoA vs AoS• Global
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Case Study 4: Cause• Array of Str
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Case Study 5: Assigning More Thread
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Case Study 5: Cause and Remedy• E
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Pattern Category 4: Irregular Addre
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Summary of Pattern Categories and t
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Having Sufficient Concurrent Access
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Optimizing Access Concurrency• Ha
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Summary: GMEM Optimization• Striv
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Shared Memory• On-chip (on each S
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Kepler 8-byte Bank Mode• Mapping
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Kepler 4-byte Bank Mode• To visua
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Case Study 6: Kepler 8-byte SMEM Ac
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SMEM Access ExamplesAddresses from
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Case Study 7: Matrix Transpose• S
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Summary: Shared Memory• Shared me
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Execution• Instructions are issue
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instructionsControl Flowif ( ... ){
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instructions / timeExecution diverg
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Instruction Throughput: Analysis•
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Instruction Throughput: Summary•
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Kepler Architecture Family• Two a
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Level of Parallelism• Parallelism
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Increased Shared Memory Bandwidth
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Case Study 8: More Registers Per Th
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In Conclusion• When programming a
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