Smart grids and IoT convergence turns more ... - EE Times Europe

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Delivering the collective powerof Home Energy Managementkonewsof-Things (IoT) where M2M communicationsare key and oftentransit via the cloud.Ijenko’s cloud-based energymanagement solution allowsthird parties (utilities, telcos, andservice aggregators) to deploytheir software and offer energyefficiency and demand responseservices to their residentialconsumers. This helps utilitiesoptimize the balance betweendemand, micro-generation andstorage (includingIJENKOthe use of54 rue de Billancourtsmart hybrid 92100 cars Boulogne-Billancourtas backupenergy storage). FranceLooking at defining the mostappropriate and intuitive userinterfaces for end-users towww.ijenko.comconsume the energy-relateddata, the company co-financesthe Modelec project from utilityprovider Direct Energie (formerlyGroupe Poweo Direct Energie).The project includes a trialwith 2000 customers equippedfor half of them with the Linkysmart meter, and for the otherhalf with another model of smartmeters. These experiments alsoinvolve sociologists who will tryto interpret the end-customers’perception of their own meteringdata and energy consumptionprofile (and maybe how to raisetheir energy awareness).The idea is to define the beststrategies (the most convincingones) for these customers toopt-in for self-effacing low-energyconsumption behaviours atpeak times (to reduce the stresson the grid), most probablythrough tariff incentives.Some suggested programscould allow the utility provider toremotely turn-off a selected listof appliances or to lower thermostatsettings during peak times.As well as providing personalizedtips for better energy-efficiency,the end-user interface could encouragedwellers to participatein individual or collective challengesor to share their experiencewith their community andlearn best practices on socialnetworks.It is expected that these guidedinteractions with their end-userswould allow utility providers to improvetheir forecasting and profitability throughadvanced analytics and behaviouralprofiling.EngageIjenko’s cloud-based energy management solution.Home Technology’s smart home gateway enables dwellers tomanage their home remotely.Embix provides energy-management services to so-calledeco-districts such as the IssyGrid project in Issy-les-Moulineaux near ParisIjenko’s Home Energy ManagementServices have also been demonstratedon the new Intel Puma 6 Multi ServicesGateway, but the company also manufacturesits own energy gatewaysand smart metering plugsto monitor electrical appliancesconsumption and control themremotely. Other smartgridrelateddevices include remotelycontrollable thermostats, temperatureand hygrometry sensorsor motion and open/closeswitch detectors that can sendSMS alerts in case of intrusionsuspicion.Home Technology – www.home-technology.eu – was alsoexhibiting a so-called smarthome gateway together withvarious sensors and actuatorsenabling dwellers to managetheir home locally or remotely,either via a broadband connectionor through the mobile GPRSnetwork (thanks to an integratedSIM card).On a larger scale, numeroussmart grid projects are underway in the form of so-calledeco-districts, specifically designedas experimental groundsto develop optimised energymanagementsolutions.A 50/50 joint venture createdin 2001 between Alstomand Bouygues, Embix providesenergy-management servicesfor such eco-districts, liaisingdirectly with local authorities andbuilding owners, managers ortenants to optimise smart gridresources at district level.The company intervenesearly in the district’s developmentphase and then pilotsthe energy optimization at theneighbourhood-level through itsUrban Power platform, deliveredvia the cloud as SaaS (Softwareas a Service). The platform integratesall accessible real-timesmart-metering data togetherwith local energy production andstorage fluxes.One such project is IssyGridin the Seine Ouest businessdistrict in Issy-les-Moulineauxnear Paris. Jointly supported byMicrosoft, Bouygues Immobilier,Bouygues Telecom, SchneiderElectric, Total, Alstom, ERDF,ETDE and Steria, the project initiated in2012 now covers the needs of nearly10,000 people in a 160,000 square-meterarea. It is expected to include nearby6 Electronic Engineering Times Europe July/August 2013 www.electronics-eetimes.com

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esidential buildings in 2013.At the European level, the Grid4EUlarge-scale demonstration projectbrings together a consortium of six Europeanenergy distributors (ERDF, EnelDistribuzione, Iberdrola, CEZ Distribuce,Vattenfall Eldistribution and RWE)to test the potential of smart grids in areassuch as renewable energy integration,electric vehicle development, gridautomation, energy storage, energyefficiency and load reduction.Six demonstrators will be testedover a period of four years (ending in2016) in each of the European countriesrepresented in the consortium.One of the demonstrators currently inprogress is Nice Grid (in Carros, Southof France), regrouping 1 500 end-customers.It explores renewable energygeneration with 200 solar rooftops,integrates 100 batteries equivalent to2MWh of storage capacity, and implementsload curtailment with smarthome equipment. Such large-scaleprojects help utility providers to testnew forecast algorithms and figure outways to reduce consumption levelsduring peak demand.Founded in 2011 and spun-off fromMinatec, Vesta-System markets its analyticalsoftware solution, VestaEnergy,to help office and residential buildingpromoters anticipate future energymanagement needs. The dynamicsoftware solution not only addresses thedynamics of real time energy meteringand smart home connected sensors, italso brings into the equation weatherconditions and predictions, energy pricefluctuations and availability (distant,local and ultra-local sources in the caseof connected buildings) to offer moreaccurate and individualized energy optimisationchoices (not just routine energyprofiles). The tool will be a central pieceof the urban project Lyon Confluence2 which will include 16000m² of privateapartments and social housings. All thenew occupants will be given access totheir energy-consumption data througha digital tablet in order to better controltheir energy consumption according totheir comfort zone (with the usual incentivesfor self-effacement).A dedicated communicationnetwork for the IoTNow to communicate their data,most of the smart meters and sensorsspread out in these buildings could relyon ZigBee, an Ethernet connection to alocal broadband access, sometimes aVesta System’s dynamic software solution for interconnectedbuildings provides accurate and individualized energyoptimisation choices.as a dollar per year for thecollection of IoT-emitteddata (from any smart objectequipped with the Sigfoxradio) and for processingand routing it via thecloud to any third partyapplication. One examplethe company gives is itspartnership with MAAF Assurances,a leading Frenchinsurance company whichwill rely on the Sigfoxnetwork to offer fire and/or intrusion alert servicesto its customers directlythrough SMS. For now,Sigfox’ network coversFrance, but the companyhas big plans for expansionin Europe. By operatingseparately from traditionalcellular networks, this IoTnetwork infrastructurehas the potential to savehundreds of megawatt/hour in a world with billionsof connected objects, saysthe company.Power Line Communication link, a GSMmodule, an existing WiFi spot or someother proprietary RF link.For low data throughput applicationssuch as sensor messaging and remotesmart metering, these technologies areoverkill according to Ludovic Le Moan,CEO of Sigfox, a company that recentlycelebrated the first anniversary of what itclaims to be the world’s first low-powercellular infrastructurededicated to the Internet-of-Things.Sifgfox’technology builds uponultra narrow band radio,combined with softwaredefined radio techniquesperformed at base stationslevel to achieve avery high sensitivity forvery long distance communications(from and 3to 10km in urban areas,30 to 50km in rural areasand over 1000km foroutdoor objects sendingmessages in line of sight).Sigfox’ low data throughput IoT network infrastructureThe company offers itscould prove more economical than traditionnal carriers.network services for as little8 Electronic Engineering Times Europe July/August 2013 www.electronics-eetimes.com

Multicore challenge conferenceMulticore systems face the tools challengeBy Nick FlahertyThe move to more heterogeneous multicore systemsis going to fundamentally change the way code is developedin mobile, says a leading IP supplier. “This is the most excitingdecade I have seen for computing,” said Tony King-Smith, executivevice president of marketing at Imagination Technologies,talking at the Multicore Challenge Conference run by verificationexpert TVS. “There are opportunities to lead this global changehere in the UK.He points to the increasing split in the mobile market betweenARM and other processor architectures all running differentversions of Google’s open source Android operating system.Intel has started to have some success with x86-based Atomprocessors in mobile handsets and tablets, while Imaginationhas acquired the MIPS processor line and is combining this withits PowerVR graphics and video technology and its programmableradio front end. Coupled with the move to technologiessuch as ray tracing, this creates a widely varying set of requirements,he says.“We have three architectures in the Android world but theapps have to be able to traverse CPUs in the same way they doacross GPUs and radios. We have to break this dependency onthe CPU instruction set architecture and this is part of the futurefor heterogeneous processing,” said King-Smith. “Google iswell aware of this problem,” he said.There are different ways to tackle this issue, he says, includingnew capabilities in the LLVM tool chain (see box). “We arequite excited about LLVM and the portable binary format withbinary translation,” he said. Another exciting approach actuallychanges the way systems are developed. Instead of downloadingan app for a particular ISA, a generic app is downloadedthat investigates what hardware resources are available. This‘discovery’ app could be written with LLVM’s binary translationcapability or a higher level language such as Java.Once the discovery app determines the hardware available, itdownloads different optimized blocks for the different hardwareelements, creating the optimal software. This is not simple todo. “Discovery will be a fertile area for research and innovation,”said King-Smith.More importantly it also changes the way the software isdeveloped, he says. Instead of starting off with the data structures,you start with the discovery app. That provides the basesoftware that is already available, and the developer then fillsin the gaps in the software ecosystem, concentrating on theadded value rather than re-inventing software for multiple differentplatforms.Putting all this together with the right balance of memory andperformance determines the power consumption and performanceof the system. “This is a very key area,” he said. “Attentionto detail makes a huge difference. I’ve seen four to fivetimes the performance difference using exactly the same set ofIP, so getting the balance is utterly key in making these systemswork.”The tool issue is the main reason why multicore computinghas been slow to take off, says Prof David May at the Universityof Bristol. He points to homogeneous architectures where theprogramming is significantly easier. This was the approach hetook with the multicore system used by XMOS Semiconductorwhere he is a founder.Fig. 1: Imagination Technologies sees a discovery tool that looks at the hardware and downloads the relevant optimized code tobuild the code base for heterogeneous multicore devices.www.electronics-eetimes.com Electronic Engineering Times Europe July/August 2013 9

Multicore challenge conferenceHe also points to older languages such as Fortran whichinclude more support for parallel operation than modern day Cand C++. However, there is a lot of focus on the parallel capabilitiesbeing added to these languages. Paul Keir of developerCodePlay in Edinburgh points to the C++ AMP 1.0 specificationthat is available for asymmetcric multiprocessing, with aMicrosoft implementation included with Visual Studio 2012. TheCommittee Draft (CD) of C++14 is out for Public Review, whileOpenMP 4.0 is expected this summer with Release Candidate 2now available for public comments.The next OpenCL, OpenCL HLM, will include C/C++ syntax/compiler extensions, and there are even a new version of Fortran,Fortran 201x, in development. Combining the debuggingand profiling tools pays dividends, says David Lecomber, COOof Warwick-based high performance computing tool vendor Allinea,who demonstrated the tools at the Multicore Conference.“Scientists, students, and developers learn once and wintwice as they profile and debug their code with two tools thatlook and feel the same,” said Lecomber.With the release of version 4.1, developers and scientists canuse Allinea DDT and Allinea MAP interchangeably. “This jointlicensing option is a natural progression that brings value to ourcustomers. HPC centers are already telling us that adoptingone part of the tool-suite encourages the adoption of the otheramongst their users.”“We’ve noticed fluidity in the workflow. A developer uses AllineaDDT to get the code right, then Allinea MAP to understandits performance, and then flicks back into Allinea DDT to uncovera performance issue’s root cause,” says Mark O’Connor,Allinea’s VP of Product Management. “We wanted to supportthat.”Working between Allinea DDT and Allinea MAP is of particularinterest to organizations like Cenaero, an applied researchcenter in Belgium that develops simulation methods and softwaretools.Last year, it was appointed by the Wallonian Minister of Researchto operate a Tier-1 supercomputer, which will extend itscurrent cluster of 3,000 cores to more than 10,000 cores.One of the missing aspects of HPC storage is the analysisand understanding of the I/O patterns of applications. AllineaMAP now provides key metrics, such as the rates of read/writecalls and uncached data transfer, making it easy to spot anddiagnose lines of code with slow I/O performance in serial andparallel applications.“But scientists and developers, who face a combination ofsoftware problems and pressure to advance their research, oftenopt for the false economy of trying things without taking thetime to log them,” said O’Connor. Allinea DDT 4.1 automatically,records actions taken and the variables seen so developers cancheck the current code against the behavior of a previous versionor even run it on a different system.Allinea DDT 4.1 has also brought version control right into thecode display, showing the age of different lines of code alongwith messages people wrote to describe their changes.“When you’ve got this information, it’s much easier to fix theroot cause of problems,” says O’Connor. “It’s a powerful debuggingaid and there is nothing else like it on the HPC market.”GCC vs LLVM: It’s all about the skillsas $99 supercomputer shipsSouthampton-based tool chainprovider Embecosm has developed afull GNU Compiler Collection (GCC) toolchain for a new low power multicore processorthat raised its development moneyon the Kickstarter startup web site.US-based Adapteva raised nearly $1mfrom supporters on Kickstarter to developa 2W, 64 core, 100GFLOP device on28nm, and the $99 board started shippingin June. Embecosm has one of the earlydevelopment boards for working on thetool chain. “It’s a 5 stage, dual issue pipelineand each processor has its own localmemory and we un-roll the code loopsto get the performance,” said Dr JeremyBennett, founder and CEO of Embecosm.“We have a version of GCC that givespipeline occupancy of over 70%, and thatcomes from a deep knowledge of GCCwith the loop unrolling. There are probably50 good GCC engineers in the world andwe have one of them.” The demonstrationshows a 512 matrix calculation handledin 68ms rather than seconds. “This is thelevel of performance we need for SoftwareDefined Radio,” he said.There are three other companies workingon Low Level Virtual Machine (LLVM)for the Adapteva part. “What we see withLLVM is, as a compiler it is good, takingthe 30 years of experience since GCC,”said Bennett. “What I see as a difficultyis the big players driving it, ARM, Qualcomm,Intel. There are 8 architecturesin the standard distribution compared toover 40 in GCC.”One reason for going to LLVM is theless restrictive license conditions. “TheGPL license forces GCC to be kept together.LLVM makes it easier for people todo their own thing and not come togetherand that’s a weakness,” he said.But that also means there are moreengineers working with LLVM. “WithLLVM a good software engineer can beup to speed in a year or so,” said Bennett.“Having them both means there’srivalry and that incredibly healthy for theecosystem.The Adapteva Parallella developmentboard – a $99 supercomputer withEmbecosm’s GCC tool chain.10 Electronic Engineering Times Europe July/August 2013 www.electronics-eetimes.com

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eport: lopecOrganic electronics another stepcloser to commercialisationBy Christoph HammerschmidtOrganic and printed electronics has been a promise forthe future - over ten years or more. But now the technologyis ready for commercialization, believes Wolfgang Mildner,president of industry association OE-A (Organic and PrintedElectronics Association). At the LOPE-C organic electronicstrade fair recently held in Munich, he claimed that this technologyalready became commonplace in a number of applications,in particular in automotive pharmaceuticals and packagingindustries.Mildner cited printed antennae and seat occupancy sensorswhich are said to be already in use in the automotive industry.The next steps will be the availability of touch sensors and displaysfor deployment in vehicles. At the fair, the OE-A also distributeda brochure with printed batteries and LEDs integratedinto the front cover - upon the push of an equally printedbutton, the LEDs were lit – see figure 1. In order to drive commercialviability, “it now is necessary to refine the technology,but also to rethink it at some points where the dynamics of thistechnology and its markets have changed,” Mildner said.Towards this end, the industry association also introduced amodified roadmap for the further development of this technologyand its commercialization. The roadmap breaks thetechnology down into five segments - organic photovoltaics,flexible displays, OLED lighting, electronics and components,and integrated smart systems – see figure 2. At the presentlevel, the technology is at a stage where relatively simpleproducts are possible - for example, portable chargers in thefield of organic photovoltaics, or garments with integrated sensors,or anti-theft products in the segment of integrated smartsystems. The state of OLED technology only permits designstudies.The roadmap now states the goals in the short, mediumand long term. In the segment of organic photovoltaics,Fig. 2: From simple to complex functions and applications - the new roadmapfor organic electronics.these goals include, forexample, customizedmobile power; in the segmentof flexible displays,the companies organizedin the OE-A intend todevelop bendable OLEDdisplays, plastic LCD, orrollable colour displays.In OLED lighting, they aregoing for transparent anddecorative lighting modules.Short term refers tothe time span from 2014to 2016.Long-term goals (year2021 and beyond) includebuilding integration andgrid connection for thesegment of organic photovoltaics,rollable OLEDTVs and telemedicineapplications in the segmentof flexible displays,while OLED lighting willbe part of the generallighting technology. Inthe field of electronicsand components, thescientists regard directlyprinted batteries as longtermgoals, and in theintegrated smart systemssegment, OLEDs will beintegrated into garments, and health monitoringsystems will be made of organic electronic parts -to name just a few goals.During a presentation at the fair, Audi discussedits “Swarm” study of an OLED-lit car body – seefigure 3. While the mock-up offers a spectacularlook, the technology is not quite ready for realworlddeployment, particularly not for automotiverequirements. “OLED is the right technology, butit is not yet up to automotive standards”, saidStephan Berlitz, Head of Lighting Innovations atAudi.The main challenge remains the lifetime of thedelicate electronics. The curved OLEDs don’twithstand bad weather conditions, and also atvery high or low temperatures they tend to fail.Another issue is cost, Berlitz admitted. Nevertheless,he insisted, OLED will have a great future.“The entire automotive industry has already begunto integrate OLEDs into their cars,” he saidFig. 1: Printed electronics in real-worldapplications - the LEDs on the cover ofan OE-A brochure can be lit by the pushof a button.Fig. 3: Impressive lighting effects fromAudi - longevity is still a challenge.www.electronics-eetimes.com Electronic Engineering Times Europe July/August 2013 11

Single die MEMS oscillator hits the mainstreamBy Nick FlahertySilicon Labs has ported the low temperature MEMstechnology it acquired with startup Silicon Clocks in 2010 toChinese foundry SMIC. This allows a SiGe structure to be builton top of the passivation layer of a CMOS logic chip using theexisting CMOS production line and eliminatesthe drift problems of dual die devicesas the materials are specifically chosen tocounteract thermal drift.The programmable oscillators run up to100MHz with frequency stability down to20ppm and are aimed at cost-sensitive, lowpowerand high-volume industrial, embeddedand consumer electronics applications suchas digital cameras, storage and memory,ATM machines, point-of-sale equipment andmulti-function printers. Higher speed devicesare planned, says Mike Petrowski, vice presidentand general manager of Silicon Labs’timing products.The CMOS MEMs (CMEMS) technology enables guaranteeddata sheet performance with 10 years of frequency stabilityincluding solder shift, load pulling, VDD variation, operatingtemperature range, vibration and shock. This guaranteed operatinglife performance is 10 times longer than typically offeredby comparable crystal and MEMs oscillators. The oscillatorstightly couple the MEMs resonator with CMOS temperaturesensor and compensation circuitry, ensuring a highly stablefrequency output in the face of thermal transients and over thefull industrial temperature range. The end result is a predictable,reliable frequency reference over thelong operating lifespans of industrial andembedded applications.The Si50x CMEMS oscillators supportany frequency between 32 kHz and 100MHz. Frequency stability options include±20, ±30 and ±50 ppm across extendedcommercial (-20 to 70°C) and industrial(-40 to 85°C) operating temperatureranges. The CMEMS oscillators also offerextensive field- and factory-programmablefeatures including low-power and lowperiodjitter modes, programmable rise/falltimes and polarity-configurable outputenablefunctionality.Using CMOS MEMs rather than a crystal frees customersfrom supply chain problems that are typical for traditionalquartz-based solutions. Because CMEMS oscillators are integrated,monolithic ICs, they are packaged in widely produced,molded-compound 4-pin packages, again ensuring a predictableand reliable supply chain.Printing microbatteries could unravelnew designs in medical applicationsBy Julien HappichA team based at harvard university and the University ofIllinois at Urbana-Champaign, has demonstrated how 3D printingcan now be used to print lithium-ion microbatteries the size of agrain of sand, which could be small enough to fit in tiny devices formedical or communications applications.In recent years engineers have invented many miniaturized devices,including medical implants, flying insect-like robots, and tinycameras and microphones that fit on a pairof glasses. But often the batteries that powerthem are as large or larger than the devicesthemselves, which defeats the purpose ofbuilding small. To get around this problem,manufacturers have traditionally depositedthin films of solid materials to build theelectrodes. However, due to their ultra-thindesign, these solid-state micro-batteries donot pack sufficient energy to power tomorrow’sminiaturized devices.The scientists realized they could packmore energy if they could create stacks oftightly interlaced, ultrathin electrodes thatwere built out of plane. For this they turned toThe interlaced stack of electrodes,printed layer by layer, create the workinganode and cathode of a microbattery -Source and top image: Harvard3D printing. 3D printers follow instructions from three-dimensionalcomputer drawings, depositing successive layers of material—inks—to build a physical object from the ground up, much likestacking a deck of cards one at a time. The researchers havedesigned a broad range of functional inks—inks with useful chemicaland electrical properties. And they have used those inks withtheir custom-built 3D printers to create precise structures with theelectronic, optical, mechanical, or biologicallyrelevant properties they want.The researchers created an ink for theanode with nanoparticles of one lithium metaloxide compound, and an ink for the cathodefrom nanoparticles of another. The printerdeposited the inks onto the teeth of two goldcombs, creating a tightly interlaced stack ofanodes and cathodes.The electrodes were then packaged into atiny container filled with an electrolyte solution.The electrochemical performance is claimedto be comparable to commercial batteries interms of charge and discharge rate, cycle lifeand energy densities.12 Electronic Engineering Times Europe July/August 2013 www.electronics-eetimes.com

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Imagination tips ‘Warrior’ MIPS coresBy Peter Clarkeimagination technologies Group plc (Kings Langley, England)has announced that is planning to launch a generation of32/64-bit MIPS processor cores under the codename Warrior.The Series 5 MIPS processors are described as an updateto the Aptiv generation but Warrior has equivalents across threeperformance profiles. The Warrior generation includes 32- and64-bit variants with a focus on performance efficiency acrossthe high-end, mid-range and entry-level/microcontroller CPUs,Imagination said.Imagination said it will introduce next-generation Warriorcores later this year and has begun to share details withcustomers. The company also said that Warrior would providebinary compatibility with legacy 32-bit and 64-bit MIPS code.Some of the Warrior CPUs will include the MIPS SIMD Architecture(MSA), which is designed to provide single-instructionmultiple data support for handling multimedia codecs from highlevel programming languages and APIs such as C and OpenCL.Imagination said that other features include: technologyfor trusted execution environments within mobile and embeddedsystems and hardware virtualization for both MIPS32 andMIPS64 processor designs. Imagination has also announced ithas extended its Aptiv generation of cores, adding a small-footprintsingle-core version to the interAptiv family and a floatingpoint version to the microAptiv family.“The industry is longing for a choice in the CPU market, andwe are making MIPS a clear and superior alternative,” saidHossein Yassaie, CEO of Imagination, in a statement. “We havean outstanding range of cores available today and that will becomplemented by our forthcoming Warrior cores, which willprovide levels of performance, efficiency and functionality thatgo beyond other offerings in the market.”Scott Gardner, senior analyst with The Linley Group, said: “IfImagination does as great a job with the new MIPS generationas it has done with PowerVR GPUs, then the industry will haveanother strong player in the CPU IP space.”Direct semiconductor wafer bondstarget next-gen solar cellsBy Julien Happichthe fraunhofer institute for solar Energy SystemsISE today has joined forces with EV Group (EVG) to developequipment and process technology to enable electrically conductiveand optically transparent direct wafer bonds at roomtemperature. The new solutions, developed in partnership withFraunhofer ISE based on EVG’s recently announced ComBondtechnology aim to enable highly mismatched material combinationslike gallium arsenide (GaAs) on silicon, GaAs on indiumphosphide (InP), InP on germanium (Ge) and GaAs on galliumantimonide (GaSb).Direct wafer bonding provides the abilityto combine a variety of materials withoptimal properties for integration intomulti-junction solar cells, which can lead tonew device architectures with unparalleledperformance.“Using direct semiconductor bond technologydeveloped in cooperation with EVG,we expect that the best material choices formulti-junction solar cell devices will becomeavailable and allow us to increase the conversionefficiency toward 50 percent,” statedDr. Frank Dimroth, Head of department III-VIII-V multi-junction concentrator solarcells on 4-inch diameter wafer. (c)Fraunhofer ISE.– Epitaxy and Solar Cells of Fraunhofer ISE. “We are excited topartner with EVG, a leading supplier of wafer bonding equipment,to develop industrial tools and processes for this application.”Fraunhofer ISE has developed III-V multi-junction solarcells for more than 20 years and has reached record deviceefficiencies of up to 41 percent with its metamorphic triplejunctionsolar cell technology on Ge. Higher efficiencies requirethe development of four- and five-junction solar cells with newmaterial combinations to span the full absorption range of thesun’s spectrum between 300-2000 nm. Integration of III-V solarcells on silicon opens another opportunity to reduce manufacturingcost, especially when combined with modern substratelift-off technologies. Direct wafer-bonding is expected to playan important role in the development of next-generation III-Vsolar cell devices with applications in space as well as in terrestrialconcentrator photovoltaics (PV).EVG’s ComBond technology has beendeveloped in response to market needs formore sophisticated integration processesfor combining materials with different latticeconstant and coefficient of thermal expansion(CTE). The process and equipmenttechnology enables the formation of bondinterfaces between heterogeneous materials—suchas silicon to compound semiconductors,compound semiconductors tocompound semiconductors, Ge to siliconand Ge to compound semiconductors—atroom temperature, while achieving excellentbonding strength.The ComBond technology will be commercially availablelater this year on a new 200-mm modular platform currently indevelopment, called EVG580 ComBond, which will include processmodules that are designed to perform surface preparationprocesses on both semiconductor materials and metals.14 Electronic Engineering Times Europe July/August 2013 www.electronics-eetimes.com

Toyota connects navigation systemsto the cloudBy Christoph Hammerschmidta new traffic information system for Toyota driversblends a variety of parameters including vehicle location data,current speed, road conditions and even disasters. The concurrentutilization of these data helps optimizing routes and traveltimes.The “Big Data Traffic Information Service” gathers traffic flowdata from several telematics services. These swarm data arecollected, stored and enriched by contributed data from specificcommercial user groups such as emergency services or forwardagencies. From all these data a live traffic flow map is generatedand made accessible to users. The purpose of the service is toimprove overall traffic flow and enable trade-specific navigationservices. In addition, the service is designed to enable fasteremergency services in the case of catastrophic events suchas earthquakes. Besides Toyota drivers, also subscribers ofToyota’s G-BOOK telematics service for smartphones can accessthese data and use them to optimize their travel route.This cloud-based service allows theuse of traffic information gathered byToyota and provides information onroutes and traffic density on specific trajectories.All data are fed into the in-carnavigation systems, but they also canbe accessed through computers, tabletsor smartphones. The service displaysa great variety of additional informationfrom the authorities; it also displays thelocation of emergency services and vehicles.Users can add their own data.Information about facilities ownedor operated by local governments andbusinesses and locations of commercialvehicles can be shown on the map,while information and images can be submitted by users viasmartphones.In disaster situations, information about evacuation sites,shelters, and other facilities can be shown, with the location ofrescuers (equipped with smartphones) and emergency and reliefvehicles also indicated on the map.To facilitate damage assessment and relief efforts duringtimes of emergency, rescue personnel can submit damageinformation and make relief requests via smartphone, with thisinformation being shown along with T-Probe traffic information,route history, and hazard maps provided by local governments.At other times, the service can be used for traffic and logisticssystems. Suitable processing of T-Probe traffic informationenables map-based route planning for effective guidance tomultiple destinations, along with location tracking and travelhistory management.The service will be available initially in Japan, Toyota said.Intel joins A4WP wireless charging groupBy Peter Clarkeintel has joined the alliance for Wireless Power (A4WP)consortium and taken a seat on the board of directors alongwith Broadcom, Gill Industries, IDT, Qualcomm, Samsung Electronicsand Samsung Electro-Mechanics.The move will put weight behind A4WP which is a rival standardsorganization to the Wireless Power Consortium (WPC),seeking to provide wireless charging for portable consumerelectronics devices, including, smartphones, tablet, netbookand laptop computers.WPC was the first to market and claims as many as 8.5million products have shipped using its Qi technology, somebased on chips announced last fall by Texas Instruments. Inteldemonstrated its own technology.A4WP, which specifies the use of magnetic resonance technology,is capable of simultaneous charging of multiples devicesand the flexible positioning of devices and a charging platter.“Intel believes the A4WP specification, particularly the useof near field magnetic resonance technology, can provide acompelling consumer experience and enable new usage modelsthat make device charging almost automatic,” said NavinShenoy, general manager of the mobile client platform divisionat Intel, in a statement issued by A4WP.The A4WP mission includes development of industry specificationsfor submission to national and international standardsdevelopment organizations, management of an A4WP certificationprogram, including consumer-recognizable certificationlogo and the coordination with national and international regulatoryagencies regarding policy and compliance.www.electronics-eetimes.com Electronic Engineering Times Europe July/August 2013 15

Embedded Linux kernel tuned forvirtualization and determinismBy Nick FlahertyWind River has tackled one of the main objections to usingvirtualization in networking and communications applications byoptimizing the embedded Linux kernel for RealTime performance.The Open Virtualization Profile is an add-onsoftware profile for Wind River Linux developedby optimizing open source Kernel-Based VirtualMachine (KVM) technology. This providesa real-time deterministic KVM solution, withvirtual machine management to allow hypervisorand virtualization technology to reducehardware costs and provide software intelligenceportability across the network.The Open Virtualization Profile allows the deployment ofnetwork services on virtual machines without the performanceloss associated with using traditional, propriety IT-like virtualizationproducts. This real-time approach enables products thatcan flexibly run intelligent services anywhere on the network,from access right to the core, driving up network efficiency andsubstantially lowering operational network costs.The profile includes low latency with less than 3 microsecondsminimum latency, flexible provisioning of virtual machines,live migration of virtual machines and CPU Isolation for advancedsecurity application. It is open source-based and compatiblewith frameworks such as the Yocto Project, OpenStack,OpenFlow, oVirt and others, with broad support for a variety ofguest operating systemsThe kernel is integrated with Intel DataPlane Development Kit (Intel DPDK) and supportsIntel DPDK Accelerated Open vSwitch“As networks are pushed to their limits,virtualization is becoming an increasinglyimportant approach. Operators are lookingtoward NFV to support the transitionto scalable platforms that enable flexibledeployment of network services,” said JimDouglas, senior vice president of marketingat Wind River. “With Wind River Open Virtualization Profile, weare delivering a real-time virtualization solution that will supportthe rigorous SLAs of a carrier network and enable them to gainthe flexibility, scalability, and cost and energy benefits clouddata centers already enjoy.”“By moving from a distributed hardware environment to aflexible and virtualized environment or cloud, operators canrapidly deploy new applications and services where and whenthey are needed instead of updating individual central officelocations or hardware,” he said. Wind River Open VirtualizationProfile will be available in Q3 2013Non-volatile CBRAM memory blockoperates at less than 1VBy Julien HappichAdesto Technologies has presented a paper on theultra-low power operation of its proprietary CBRAM (ConductiveBridging RAM) memory at the 2013 Symposia on VLSI Technologyand Circuits in Kyoto, Japan. The paper explores the useof the non-volatile memory technology embedded in a bodysensor, a device developed to operate without a battery in thesystem, through the use of energy harvesting.The paper follows the successful completion of a project incooperation with a team of technologists from the Universityof Virginia to create a low energy device to acquire physiologicaldata from the human body, process that data, and transferit through wireless communication. The project was partiallyfunded by DARPA through the US government’s program toinvest in and award small business innovation research (SBIR).CBRAM is an emerging, disruptive memory technology whichcan be integrated in standard CMOS processes, function as adiscrete memory device or be embedded in microcontrollers,System-on-Chip (SOC) or Field Programmable Gate Arrays(FPGA). The paper demonstrates the ability of a non-volatileCBRAM memory block to operate at less than 1V supply voltagefor read, program and erase functions without the need forcharge pumps. This low-power functionality translates to 3xlower write voltage and approximately 10x lower write energycompared to other low energy non-volatile memory devices.“We have built some exciting wearable wireless body Sensorsthat run completely without batteries from body heat, butone key missing piece was non-volatile memory (NVM). ExistingNVM devices are way too power-hungry for our aggressivepower budgets,” said Ben Calhoun, associate professor at theUniversity of Virginia, “This integrated ultra-low-power CBRAMfrom Adesto is an important advance for self-powered systems.”“Ultra-low energy non-volatile memory like CBRAM is essentialto the development of energy starved technologies thatrequire stored instructions and data collection over an extendedperiod,” said Shane Hollmer, VP of Engineering at Adesto.“These devices must preserve data even in the event of powerinterruptions and failures. CBRAM is a natural fit for these applications.”16 Electronic Engineering Times Europe July/August 2013 www.electronics-eetimes.com

EDA & DESIGN TOOLSVersion control in EDAfor optimum hardware designBy Robert HuxelAs a typical practice, most largeEDA vendors conduct a costly on-sitecase study of a prospective client’sexisting system at a cost that can runinto the millions of dollars. In the nextstep of the scenario, they deploy a FieldApplication Engineer (FAE) on site tomanually produce code. The objective:an integrated design solution. Instead,the result produces a lengthy and costlyprocess that often fails to integrateeven a majority of the prospect’s desiredfunctionality, especially for versioncontrol.Unfortunately, electronic engineeringeducators typically do not teach versioncontrol. Version control actually evolvedas a software best practice methodology.It became an absolute necessity forsoftware developers because programsgrew to such large sizes that they requiredever larger design teams. Trying to manage the volumesof code without an effective version control system provides anexcellent definition of hell. Version control allows multiple teammembers to be simultaneously working on a software programwithout risk of losing or overwriting another member’s code.Unless a company’s sole business is to design boards, mostpeople in the electronic products industry understand thatsoftware teams considerably outnumber their hardware counterparts.Because hardware design teams generally tend to besmaller, they have typically adopted document control typesof systems with revision numbering schemes. Team membersshare folders on a server or even from a filing cabinet! Thesesolutions fall into the “organize-it-into-a-box” approach. Whichraises the question: is that really version control?Complexity in software developmentOver the past 20 years, software programs have grown rapidlyand become more complex. With each new software release,the code needed to be regularly updated to incorporate new orimproved features and bug fixes. To cope, the software industryimplemented modular design practices, a form of design reuse.However, modular design and reuse of code segments led toother challenges.Companies found that reusing software modules deliveredmany benefits. Modules resulted in increased dependability becausereused software has already been tested in working systems.Reuse also reduced process risk, since the functionality,risk, and cost of existing software was already known. In addition,reusable software makes effective use of specialists, sinceRobert Huxel is responsible for the care of Altium’s customers inEurope in his role as Industry Specialist - Enterprise Solutions -www.altium.comFig. 1: Aberdeen Group’s research report, “Need to Save PCB Design Time?” establishedthree categories of survey participants; best-in-class, average, and laggards.the software embodies their knowledge. Perhaps most compelling,design teams realized that reuse resulted in accelerateddevelopment, reducing the time spent in coding and validation.As a result, they could meet accelerated time-to-market objectivesand produce new iterations of product versions faster.However, implementing software design reuse did not comewithout its challenges. Generalized application of software modulesdoesn’t just happen. First, the modules must be maintainedand development processes adapted in subsequent releases.Reused modules may also become increasingly incompatiblewith system changes in subsequent releases, resulting inincreased maintenance costs. To actually have value, reusedelements must be discoverable in the library, understood, andsometimes adapted. In subsequent versions, new or upgradeddesign elements will likely impose prerequisites and dependenciesto which the reused elements must comply. Perhaps mostchallenging in the IP ecosystem, many companies believe theycan and should rewrite components because they believe theycan improve or own them.Software complexity leads to team approachIn a development team environment, multiple people touch thesame code. To manage the team, engineering managers needvisibility of their team’s work. As a first requirement, the teamneeded a single secure storage repository for their variousdesign modules. Once established, the design team neededan incremental history of changes made to the source code.To achieve effective reuse in a team environment therefore alsorequired an effective method to check-in and check-out designsources.Over the past 20 years or so, software design teams realizedthat an effective design management system must facilitatecollaboration between team members. As suggested above, thesystem must also create and maintain an incremental history ofwww.electronics-eetimes.com Electronic Engineering Times Europe July/August 2013 17

EDA & DESIGN TOOLSAdjusting hardware design best practicesHardware design practices need to change due to competitivepressures as noted in the Aberdeen Group’s research report,“Need to Save PCB Design Time?” The report is based oninterviews and surveys of 133 electronics companies. Oncethe research team gathered all of the data, they assembled acompetitive assessment of the surveyed companies. They establishedthree categories of survey participants; best-in-class,average, and laggards.As shown in the survey, each of the three categories ofcompanies exhibited common performance levels for five keyparameters:Fig. 2: Version control basics.changes made to the source code in real-time. This also meantthat the system captured metadata for each change, includingwho made the change. This facilitated full traceability, meaningthe ability to document which team member worked onwhich module, made what changes, and when. It also enabledimproved reporting and monitoring so engineering managerscould track productivity and design progress. All of these advancesresulted in accountability by all team members.Version control for hardware designPCB design teams can typically range from one to 20 designerswith an average of approximately five for mainstream designfirms. Large semiconductor companies may employ FAE teamsnumbering in the hundreds who do reference design work.Commonly, small to medium hardware design teams maintainelectronics design data on each designer’s individual harddrives. Unfortunately, no one then actually knows where all thedata for the design is located.As companies have realized this shortcoming, they havecommitted to maintaining their corporate knowledge in adedicated database. Electronics hardware design teams havehad some difficulty implementing version control because theprocess and tools are still largely based on software engineeringprinciples. Without an integrated version control system intheir EDA tools, hardware designers have tried freestandingversion control programs with check-in and check-out capabilities.However, non-integrated solutions fall down becausethe individual designer and/or the manager can make no visualcomparisons to the schematic and the PCB from one version tothe next.In EDA software with fully integrated version control, teammembers see the status of all templates, updates to relevantregulatory standards, and changes to any designs. As a resultall team members are automatically notified when a changeoccurs. In software, a manager or team member can run a “differencingtool” in the software under development to identify,resolve and commit changes between versions.However, EDA tools produce binary and graphical output, nottext based output as in software code. This makes identifyinghardware changes via a text-based, non-integrated tool extremelydifficult and error-prone. Managers and designers needto see the changes graphically, merge them into the design, andcommit to the change. Simply put, none of these capabilitiesare possible with non-integrated version control systems.Process (the approaches they take to manage PCB data)Organization (who data is exposed to)Knowledge Management (how the knowledge in the PCBdata is managed)Performance Management (the ability of the organization tomeasure its results to improve its PCB data managementpractices)Technology (the appropriate tools used to support PCB datamanagement)Version control, as noted in the Aberdeen report, falls into thecategory of “Knowledge Management”. Note that the “Knowledge”category in figure 1 cites three items:Schematics and PCB layout are synchronizedSchematics and BOM are synchronizedAnd there is version control for each data element on thePCBAny stand-alone version control software can performbasic check-in and check-out. However, design teams quicklydiscover that they can’t automatically lock a checked-out item.This results in either overwritten or lost design work. Teamparticipants are also unable to visually compare revisions in theschematic or the PCB. They also painfully learn that the solutionlacks built-in data management functionality. Merging collaborativework performed on different parts of the project posesfurther time-consuming challenges.EDA tools with an integrated version control system (VCS)deliver full check-in and check-out functionality including lockingof checked-out items. Like their software counterparts, anintegrated VCS establishes a single repository for all projects.All design modules and components are checked into the VersionControl Repository.Each individual file contains extensive meta data including arecord of design changes, the designer, date of change, etc seefigure 2.When two (or more) team members simultaneously check outan item, the file is formally checked out to the first user. Dependingon the actual version control backend, the user eitherautomatically or manually locks the file from any other teammembers. When a second user checks out the same file, thisdesigner can work on it only as a copy. Once the first designercompletes work on the file and saves it to the repository, thataction releases the lock. When the second designer reopensthe now unlocked file, his work will be marked “out of date”.He or she can review the changes made by the first designerand merge the work previously done as a copy into the file andcheck it back in if appropriate.To establish an Incremental history, the project’s engineeringmanager performs the initial check-in and labels the project asREV 0. This becomes the starting point for the design.18 Electronic Engineering Times Europe July/August 2013 www.electronics-eetimes.com

Company AnnouncementGeneration 10Portfolio from AlteraUltra high definition broadcastequipment, 400G Ethernet systems andcomputer data centres – all feast on vastquantities of data. Consuming andprocessing that level of data with anyelectronic system is difficult. You willneed to be at the leading edge oftechnology, both with the architectureyou use to process the data and themanufacturing process you use togenerate the device.FPGAs have for many years been at thisforefront of technology, Moore’s law has beenkind to FPGAs - with the right process/architecture design decisions you can reducepower, increase performance and reduce cost/increase density at each generation. Eachgeneration of FPGA captures more applicationsthat previously would have had to be designedwith ASICs, and opens a new market due to theperformance, fl exibility, power or cost thatcouldn’t be reached with the older technology.There are three key aspects to consider whencreating an ideal modern FPGA.• Leading-edge manufacturing processestechnology• Investments in innovative architecture and IP• High-performance integration of processorswith programmable fabricFigure 1: Tri-Gate Process TechnologyAdvanced process technologies are key for nextgeneration FPGAs. For example, a new 3Dtransistor technology known as Tri-Gate orFinFET transistor technology is a breakthroughchange in process technology. It halves leakagecurrent of transistors, which enables highperformance or low power capabilities.Figure 2: 28 Gbps Operation on 20 nmProcess Technology from AlteraMost process-technology foundry suppliers arein the early test chip stages of fi nFET. At thetime of writing, Intel is the only manufacturerwho has production quality products shippingusing a 3D (Tri-gate) transistor technology.Customers looking and asking for performanceimprovements will not get this from 3Dtransistor technology alone, but they will alsoneed a process shrink. The recently announced14 nm Tri-Gate process from Intel providesthis process technology. Altera’s future Stratix10 FPGAs will be built using Intel’s 14 nmTri-Gate process.Process is only part of the story; Altera iscurrently developing a new architecture whichis capable of astonishing core speeds of up to1 GHz. The enhancements to the digital signalprocessing (DSP) architecture delivers adramatic improvement to DSP capabilityenabling over 10 TFLOPs of single precisionfl oating point operations. Transceiverperformance also gets a boost with the abilityto run at up to 56 Gbps data rates.Within the Generation 10 portfolio Arria 10FPGAs use a 20 nm planar transistor processto implement sixteen 28 Gbps transceiversfor next-generation multi-100G opticalinterfaces. With enhanced signal conditioningtechniques, such as adaptive decision feedbackequalizers (DFE), and hardened forward errorcorrection (FEC), high loss backplaneapplications can be addressed.Processor IntegrationFPGA integration of discrete components on aboard has reduced the complexity and cost ofmany customer systems, but one of the mostimportant changes has been the recentintegration of an ARM-based hard processorsub-system (HPS). Altera Arria 10 SoCs offerenhanced dual core ARM Cortex-A9 HPS,this is a boost for customers wanting tighterintegration between CPU and FPGA fabric. Thenext generation HPS is shown in Figure 3.Figure 3: Second-Generation HPSBlock with ARM Cortex-A9 ProcessorNext-Generation FPGAs andSoCs Are ComingAltera uses a tailored innovative approach toportfolio design, coupling new architectures tothe latest process technology to bring togetheran exciting suite of FPGAs. It’s fair to say theGeneration 10 portfolio will have the largestleap in capabilities that hardware architectsand system designers are yet to see thus far inan FPGA.Visit www.altera.com for more information

EDA & DESIGN TOOLSpoint in the main development line. If V1.0 is released, branchingallows for minor fixes. Branching allows for these fixes,if appropriate, to be incorporated into subsequent productreleases. Design teams using EDA tools with a fully integratedversion control system experience many benefits, the first ofwhich is a reduction in errors.Accountability and productivity improve because eachengineer can view who is making changes in the design andsee that engineer’s work. Each team member can then readilyask questions of that designer regarding that specific change.Further, because all team members can see each other’s work,productivity improves.Fig. 3: Collaborating, comparing and merging hardwarebuilding blocks in Altium Designer.All changes are subsequently only maintained incrementally.Since repeatedly saving the complete design as a new revisionnumber takes up enormous volumes of data storage space, thesystem only saves the incremental changes.One potential source of design changes is a process referredto a “branching”. Branching allows the design team to explore“what-if” scenarios as a branch of the main line of development.Any authorized team member can establish a branch at anyAfter implementing an integrated VCS, documentation andreporting also improve. Each time a team member checks a fileback in, he or she must add a comment. This facilitates projectmanagement, QA, and standards compliance to get productscertified to current relevant industry standards. Further, with fullgraphic and onscreen visual comparisons between two differentrevisions, team members can view highlighted changes sideby-side.Altium Designer answers the version control needs of hardwaredesign teams. It delivers the only fully integrated EDA versioncontrol system. All design data are maintained in a singlerepository and the data remain fully synchronized. The systemdisplays changes in up to four panels on screen. This advancedcapability further highlights all changes in both the schematicand the PCB – see figure 3. All changes are also documentedas text to enhance management oversight.Timing closure highlights the challengesof 45nm silicon design and belowBy Chi-Ping HsuInnovation is the cornerstone of the semiconductorindustry and has been responsible for massive changes in allparts of the industry, from design through fabrication, assemblyand test. The foundational requirements of innovation in designare changing; they are expanding in scope. Point solutions thatlocally optimize a single design process by some metric, suchas power, are more often than not proving to be a net disruptionto design closure, rather than a benefit.The necessarily expanded scope of innovation, especiallytrue for advanced node design, means that the most significantinnovations will come from large organizations that are willing tomake bold investments.We estimate that the EDA investment for the move to 20nmand 14nm FinFET to be in the $1B range. For the size of ourindustry, this is indeed a bold, albeit necessary, investment.We can regard the issue of timing signoff as a microcosm ofthe way in which innovation in EDA has changed and how it isevolving now and into the future.Chi-Ping Hsu is Senior VP, Research and Development, SiliconRealization Group at Cadence Design Systems –www.cadence.comCadence Design Systems has responded with the recentintroduction of its Tempus Timing Signoff Solution, a new staticand timing analysis closure tool that yields up to an order ofmagnitude faster than traditional timing analysis solutions.Although start-ups have developed new technologies thatsolve individual parts of the signoff problem, those innovationssometimes do not make it through to the implementation flowsused by system-on-chip (SoC) engineering teams because theydo not solve the overarching problems.Over the past decade and a half, the physics of nanometertechnology have taken an increasingly firm grasp on the designprocess and created a much more complex situation for signoff.The shift from ASIC to SoC design that began in earnest atthe start of this millennium accompanied a dramatic changein methodology and also the way in which innovative designtechnologies came to the market.Just 15 years ago, signoff for digital logic-dominated designswas relatively straightforward thanks to the use of widely acceptedapproximations. Gate delay strongly outweighed wiredelay, which could be treated as practically negligible. Signoffwas largely a matter of performing timing analysis based onthe results provided by the ASIC vendor’s ‘golden’ gate-levelsimulator.20 Electronic Engineering Times Europe July/August 2013 www.electronics-eetimes.com

65nm because the line pitch was much tighter and the tracesthemselves became taller in order to keep parasitic resistanceunder control. As a result, the lines began to behave more likethe parallel plates of a capacitor.At 45nm, the variation in metal thickness became a keyconcern, increasing the range over which designs needed to besimulated to provide best-case and worst-case delay values.Below 45nm, lithographically-induced variations in transistor,gate and local interconnect structures became significant, leadingto the introduction of larger margins to accommodate thedifference across the process variability range.Other, more subtle, effects of the shift to nanometer dimensionshave led to an explosion in the effort needed to achievetiming signoff.Fig. 1: Temperature inversion.Design teams gradually took on more of the responsibilitiesof signoff work from the ASIC vendors as they moved productionto foundries. At the same time, layout-dependent effectsplayed an increasing role in the performance of design. Gatedelay moved to become less important on critical paths. Wiredelay took over as the key issue to solve. This called for a newgeneration of layout-aware tools developed by both large,broad-based EDA tools suppliers and start-ups.Start-ups played a crucial role with their technology. Eachcould tackle a hole in the offerings of mainstream suppliers by,very often, recruiting a small and select group of ‘teaching customers’who could feed back vital information on tool performancefrom real designs. Engineers from these start-ups wouldoften engage in close collaboration with the design teams insidethe customers responsible for benchmarking and working withtheir software.In recent years, many of the nanometer effects with whichSoC design teams must engage have become closely interconnected.Just ten years ago, a timing violation on a critical pathcould easily have been solved by the insertion of a buffer, or themovement of some of the gates to reduce the wire distance andwith it delay. A point tool optimized for this analysis and solutioncould easily be inserted into a broader design flow.Analysis was often optimized for capacity rather than accuracy.As designs moved to millions of gates, runtime overheadwas often the primary issue. Parasitics could, to a large extent,be abstracted out except for paths that were extremely closeto the timing margin. At 130nm, for example, the gap betweenmetal interconnect lines were such that their coupling capacitanceswere overshadowed by ground and pin capacitance. Forthe inter-track coupling capacitance, it was generally easier andfaster to add a small margin.The number of timing runs was also quite limited. In general,it was sufficient to analyze a best-case, nominal and worstcasescenario for three of the key parameters: process, voltageand temperature. This would effectively encompass all therealistic operating points for the design on its target process. Itwas reasonable to make the assumption that delay would beat maximum temperature, lowest voltage and worst processconditions.As process dimensions shrank, assumptions that previouslyheld up well began to break down. The coupling capacitancebetween metal interconnect became much more significant atThe overarching issue is the interaction between global andlocal effects. Since the beginning of the past decade, behaviorunder temperature changes became more difficult to predict, asituation that has been given the name “temperature inversiondependence”. The issue is caused by the use of lower supplyvoltages in order to provide greater energy efficiency – seefigure 1.Instead of running faster than a ‘hot’ corner, the circuitrymay run more slowly under a certain threshold voltage as thetemperature falls – and the effect is dependent on the thresholdvoltage used in the devices that lie along the path beinganalyzed. The reason for the effect is that two effects combineto determine the delay through a logic gate. At the higher voltagesused traditionally, mobility controls the drain current of anactive transistor. But as voltages drop, the threshold voltage hasa much larger role in determining drain current. As a result, oldassumptions break down and demand that a larger number ofanalyses are needed to check properly for variations.In nanometer processes, variability is more localized than itwas on older processes. Metal line widths have become smallenough to impact the resistance of the wire with just a smallamount of variation. Given that metallization is a separateprocess from base layer processing, engineers cannot assumethat process variations will move in the same direction for bothbase and metal layers. Therefore, at 45nm and to a larger extentat 28nm, multiple extraction corners were required for timinganalysis and optimization.Double patterning provides further source of variability insub-28nm processes. Because lithography under double patterningcalls for two masks for the same layer, the masks mustbe precisely aligned such that the spacing between patterns isconsistent across the die. Although foundries are working hardto minimize the effect, there will always be some phase shift inthe masks relative to each other and it may not be possible topredict what that phase shift is – see figure 2. Timing views arerequired that reflect the impact of phase shifts in different direc-Fig. 2: Mask shift occurs with double patterning.www.electronics-eetimes.com Electronic Engineering Times Europe July/August 2013 21

EDA & DESIGN TOOLSFig. 3: Trend of analysis views (MxC) at shrinking nodes.tions for a given combination of temperature, voltage and otherprocess variations.The focus on low-energy design adds a further layer of complexityin timing signoff. Designs that employ techniques suchas dynamic frequency and voltage scaling in order to optimizetheir energy efficiency will need to be analyzed at multiple operatingpoints to ensure that effects such as temperature dependenceinversion do not adversely affect the timing reliability ofthe SoC. These analyses should be performed against the othersources of variability, leading to a combinatorial explosion.With just eight different operating modes, it is easy to reachthe situation where more than 200 timing views need to beanalyzed. Through careful selection and pruning of the combinations– removing those that are unlikely to provide significantlydifferent results to other tests – it is possible to reducethe number. But the SoC implementation team is still left with alarge number of timing views to generate - see figure 3.The problem is not just confined to the leading-edge processes.Increasingly, low-power design techniques are beingapplied to designs aimed at older processes. Although theseprocesses will have fewer sources of variability, as voltages arereduced to take advantage of power savings, effects such astemperature dependence inversion become more apparent.The time it takes to generate each timing view is only a smallpart of the problem. Up to 40 per cent of the chip implementationflow is now consumed by the time it takes to act on the resultsof the analyses – see figure 4. Each timing view generatesa set of violations that need to be correlated with the resultsfrom the other timing views. Consolidating the data takes time,engineering insight and, for many teams today, custom scriptsto process the data. There is then the issue of implementing thechanges needed to close timing.Today’s signoff timers are not physically aware. Any changes,such as buffer insertion, are left to the implementation environmentas a post-processing step for engineering change order(ECO) generation. Often the placement of new cells is dramaticallydifferent from what is assumed by the optimization algorithmsbecause available vacant space is hard to find in highlyutilized designs.The result is a significant mismatch between the assumedinterconnect parasitics during the optimization steps and theactual placement and routing that result from the ECO. Changesmay affect the timing of paths that may have already met timing,causing them to violate timing in the timing views from thesubsequent iteration. What previously may have been a timingcleanview could potentially have many violations after placementand rerouting.One thing becomes clear from an analysis of the way inFig. 4: Aggregrate runtime with increasing views.which timing signoff has evolved over the past decade. Asimple technology update is not enough to solve the problems.Conventional wisdom holds that startups provide much of theinnovation for technologically driven markets. Startups have traditionallyused ‘teaching customers’ to help drive them towardsmarket-ready solutions. However, such solutions do not alwaysmake it to market because the need is no longer for narrowlydefined solutions but for a tool infrastructure that cuts acrossthe different pieces of the implementation flow.A more accurate implementation engine would reduce someof the overhead of dealing with multiple timing views. But agenuine solution requires attention to multiple points in thatflow, involving a more holistic approach.There are numerous actors in the SoC ecosystem who canand do provide essential knowledge and feedback on issuesthat affect design and implementation. It is extremely difficultfor a start-up with a more restricted set of partners to engagewith all of them in order to derive the best solution. Although thecore technology being delivered may have many strong pointsand provide better support for certain issues, the key today isto be able to bring all of the technology to build a more cohesivesolution. It involves input from foundries and IDMs, withtheir knowledge of the way that variability issues affect timing.Library vendors have their part to play in understanding the issuescaused by moves to smaller geometries and the impact oftechnologies such as double patterning. And there are the earlyadopter customers who can provide real-world designs thatexercise all parts of a design flow.Then there is the role of the EDA tools supplier to bring theinputs together and develop new ways of dealing with the influxof data. The supplier needs to have the scope to look at theflow in a holistic manner and understand which are the chokepointsthat limit design speed. A more accurate implementationengine for ECOs is one possible answer to the problem oftiming signoff. But a more effective approach may be to look atthe overarching requirements of signoff and to work out ways inwhich the application of timing fixes and ECOs are made so thatthey are more closely integrated with the timing signoff process.That requires a combination of new technology and attentionto detail in the architecture of the overall flow that a player withdecades of experience in implementation can bring.As a result, the industry is moving towards a new developmentpipeline that involves a matrix of partnerships rather thanindividual links between design and tools-development groups.By bringing these different views together, EDA tools developerscan react much more quickly to the needs of design and reflectthe pace of innovation that is taking place in product design andprocess engineering.22 Electronic Engineering Times Europe July/August 2013 www.electronics-eetimes.com

Modeling skew requirements forinterfacing protocol signals in an SoCBy Hans Kumar Jain, Gourav Kapoor and Babul AnunayA system on a chip (SoC) today consists of several differentmicroprocessor subsystems, memories and support for I/Ointerfaces such as JTAG, Ethernet, DSPI, SENT etc for communicationwith the outside world – see figure 1. All these areuniversally accepted and have some timing requirements whichmay be in form of input/output delay requirements or specialtiming requirements (like transition and skew requirements fordifferent signals), which need to be taken care of at the STAend. In this article, we will be focusing on one of these – maximumand minimum skew between two signals.Some of these protocols (like DDR) have requirement for afinite maximum skew (difference in delays) between the varioussignals of a bus. All data has to change within a very smalltiming window. On the contrary, minimum skew requirement isgenerally specified to prevent the race condition between twosignals. This is usually one sided; e.g. signal ‘a’ should follow ‘b’after some finite time. Until recently, these skew requirementswere modeled in a roundabout manner and had to be updatedregularly which adversely impacted the STA analysis time ofeach database as there were multiple iterations for IO constraintsmaturity. Also, the constrained signals’ timing may getdeteriorated during optimization in the absence of constraintson these signals. There can be different ways of implementingthis using multiple command combinations. Each has its ownmerits and demerits. Let’s look at three methods to achieve thispurpose:Hans Kumar Jain is Lead Design Engineer at FreescaleSemiconductor India - www.freescale.comGourav Kapoor and Babul Anunay also work at FreescaleCircularConnAd-EETimesEurope_Layout 1 6/25/13 4:41 PM Page 1Semiconductor India as Design Engineers.Fig. 1: SoC interfacing with the outside worldthrough I/O protocols.- Applying minimum/maximum delay constraints on datasignals- Modeling as input/output delays- Applying setup/hold checks considering one of the datasignals as reference signalApplying minimum/maximumdelay constraintsWe can apply min and max delay constraints on data signals sothat data changes only within a given window. This method canbe used to constrain multiple signals for skew requirement asdiscussed below. We are essentially assuming these signals tospecialtycircular connectorsemi filtered & unfiltered• Vertically integrated – we make our own planar and tubular capacitors, shells,shields, seals and grommets• Highest quality and the industry’s shortest lead times (8-10 weeks, std)• MIL and Hi-Rel connectors• Rapid mate “hot shoe” and mini-MIL circular connectors• Our EMI expertise gives you a better filtered connector• Harnessing products to IPC-A-610 and J-STD-001• 100% testing of all vital electrical parameters• Broad range of ITAR free filtered and unfiltered circularconnectors availableCall +49.9122.795.0 orvisit eis.apitech.comDownload our capabilitiesbrochure & videoEMI Filters • EMI Filtered Connectors • Ceramic Capacitors • Power Filter Capacitors • Magneticswww.electronics-eetimes.com Electronic Engineering Times Europe July/August 2013 23

EDA & DESIGN TOOLSFig. 2: Constraining signals to be within window by applyingmin/max delays.have some characteristic delay range, which is a pure assumptionor based on prior experience. The EDA command to applymin/max delay is:set_min_delay/set_max_delay signalA data bus can be constrained to be within a specific windowby constraining each bit signal with min and max delays(where max_delay > min_delay) – see figure 2.set_min_delay data_bus[*]set_max_delay data_bus[*]The maximum skew requirement window will then be:Max_skew_requirement = Max_delay_value – Min_delay_valueSimilarly, the timing requirement for minimum skew can bejustified by applying max_delay constraint to one signal (the onewhich is to occur first) and min_delay constraint to the other(the one which is to occur later – see figure 3).set_max_delay signal_1set_min_delay signal_2Where:Min_skew_requirement = Min_delay_value – Max_delay_valueThe application of min/max delays offers some advantages,the uncertainty values applied on path don’t need to be takeninto account and delays can be modified in any of the data signalpath as long as the above conditions are met. This method,however, faces some limitations as it takes a couple of iterationsto decide upon the values of the min-max delay.Fig. 4: Constraining signals to be within window by applyinginput/output delays.It is important to keep the values slightly pessimistic (comparedto the expected optimized value of delay) in the firstiteration so as to efficiently optimize the path delay as well. Thevalues need to be updated as well after such iteration based onhow much the tool was able to optimize the delay.Also, the values need to be updated at regular intervalsas we make transitions across the stages since delay valueschange. As delays of nets and cells scale across process, voltageand temperature variations, min/max path delays will be differentacross these. We have to calculate scaling factors acrosscorners and constrain these accordingly.Constraining IOs by modelinginput/output delaysIn this method, we define the relationship of interface signalswith respect to some clock. We may use it to implicitly defineskew requirement by defining input/output delays of differentsignals with respect to same clock such that they are constrainedto have the required skew. Basically, by defining inputand output delays, we are defining setup and hold timings ofthe signals in the SoC as seen from the outer world. The designerjust needs to constrain these by defining valid and invalidwindows. I/Os may be constrained in EDA tools using the followingcommands:set_input_delay/set_output_delay port_name –min/-maxTo constrain signals to be within a timing window (maximumskew requirement) using this technique, we need to definesetup and hold checks (min and max input delays) for all signalswith respect to the same clock such that all signals are allowedto change nowhere except the required window - as shown infigure 4.Considering both signals to be input signals,max_input_delay = clock_period –setup_requirementmin_input_delay = hold_requirementUnder the conditionsetup_check_for_signal1 + hold_check_for_signal2

Fig. 5: Constraining signals for minimum skew by applyinginput/output delays.We can, thus, write as shown below:set_input_delay signal2 –maxset_input_delay signal1 –minIn a similar way, we can constrain the output signals too forskew requirement by applying output delays as we constrainedby applying input delays in case of input signals.If the data signals are constrained like this, the constraintscan be applied at synthesis/implementation too as input/outputdelays are supported by all synthesis and implementation tools.Manual iterations are very few. On the other hand, for definingthese checks, we need to have one reference clock. If wedo not have a clock defined for the protocol, we cannot definethese. Also, since regular setup and hold checks are also to bemet, it becomes quite complex and confusing to calculate theamount of min and max delays to be applied.Although the range of input and output setup times is fixed,there needs to be made some adjustments within this range,based upon the path delays and placement of the protocol logicinside the SoC. As in min/max delay, due to delay variationsacross PVTs, these checks need to be adjusted for differentPVTs.Applying setup/hold checksThe most effective way for constraining the signals with respectto maintaining a skew between them is to apply data checksbetween them. According to the definition of data-to-datacheck, it is applied between two signals, neither of which is aclock. Here, we can consider one of the signals as a referenceand define other signal’s relationship with respect to it. The porthaving the reference signal becomes ‘reference port’ whereasthe other port, i.e. the port which is constrained, becomes the‘constrained port’. This method is different from the methoddescribed above in the sense that we do not need to define thereference data as a clock here.Data check is similar to normal setup/hold check. An importantdifference is that data check is performed on the sameedge as the launch flop (in normal setup check, capture edgeis one edge away from launch edge). That is why, data to dataFig. 6: Constraining signals for minimum skew requirement byapplying data-to-data setup check.Fig. 7: Constraining signals to be within a window by applyingdata-to-data checks.checks are known as ‘zero cycle checks’.A data-to-data check may be specified using ‘set_data_check’ command in EDA tools.set_data_check –from -to -setup/-holdTo constrain the signals for minimum skew requirement, wecan simply apply data-to-data setup check (to constrain referenceport to come later) or data-to-data hold check (to constrainthe reference signal to come earlier), since data-to-datasetup check is zero cycle – see figure 6.To constrain the reference signal to come later,set_data_check -from -to -setupTo constrain the reference signal to come earlier,set_data_check -from - to -holdOn the contrary, to constrain the signals to be within awindow, both setup and hold checks need to be applied – seefigure 7. Also, the values to be applied have to be negative. Inaddition, a multicycle of -1 for hold needs to be applied.The combination of commands to be applied is as follows:set_data_check -/2 –from -to -setupset_data_check -/2 –from -to -holdset_multicycle_path -1 –to –from -holdConstraining the signals for skew requirement using data-todatachecks has several merits. As mentioned above, it is thesimplest way to apply these types of constraints. Only relativeskew between the signals matters while the signals themselvesmay have any value of delay. Unlike input/output delay method,there is no need for a clock to be present and the windowrequirement does not need to be updated across corners.However, uncertainty and derate values need to be taken intoaccount, if applied.Though data-to-data checks provide a robust and efficientway to apply these constraints, still there is some scope ofimprovement. Like it does take into account the uncertaintiesand derate, whereas the requirements specified are without anyuncertainties and derates. So, we have to either make thesewindows larger taking into account uncertainties and derates;or we need to have support in EDA tools for path based deratesand uncertainties.www.electronics-eetimes.com Electronic Engineering Times Europe July/August 2013 25

EDA & DESIGN TOOLSSystem builder design tool targets ARM-basedSmartFusion2 SoC FPGAsMicrosemi’s System Builder is a new design tool within theLibero System-on-Chip (SoC) Design Environment version11.0 and is specifically targeted at accelerating customerdefinition and implementation of ARM-based systems usingSmartFusion2 SoC FPGAs. The output from System Builderis automatically generated and correct-by-construction, thuseliminating the errors that are created when the architectureis specified ‘by hand’ as in more traditional tool flows. Thus,System Builder dramatically shortens the design cycle timefor complex SoC FPGAs. Additionally, software-orientedengineers can easily create an embedded architecture andbegin code development all on their own. This simplifies theadoption of Microsemi SmartFusion2 devices and providesa much broader set of design engineers with access to SoCFPGA technology. System Builder users are guided step-bystepthrough each of the main SoC FPGA architecture blocks.The design process uses a high-level graphical Interface thatreacts to previous architecture selections and guides theuser through the process of selecting options and configuringonly the required embedded system blocks. The resultingsystem specification is automatically generated and correct–by-construction.It includes both the configuration andinterconnects of the ARM processor and its related peripheralsas well as other IP blocks implemented in the FPGA fabric.System Builder can also configure a growing set of IP blocksfor high-performance interfaces including DDR2/DDR3/LP-DDR memory controllers, and serial interfaces using 5GbpsSERDES for PCIe, XAUI (10 GbE) and SGMII. Additional fabricbasedparameterized IP functions available within SystemBuilder include I2C, SPI, Timers, UARTs and PWM blocks.SmartFusion2 integrates inherently reliable flash-based FPGAfabric, a 166MHz ARM Cortex-M3 processor, advanced securityprocessing accelerators, DSP blocks, SRAM, eNVM andindustry-required high performance communication interfaces.Microsemiwww.microsemi.comRevised IEEE 1149.1 ‘JTAG’ standard shouldreduce IC design costs through test re-useIEEE has released the revised IEEE 1149.1-2013 “Standard forTest Access Port and Boundary-Scan Architecture” (JTAG). Thisrevision is intended to dramatically lower electronics industrycosts by enabling test re-use across all phases of the integratedcircuit lifecycle via vendor-independent, hierarchical test languages.The revision of IEEE 1149.1, the first for the standard since2001, allows critical domain expertise for intellectual property(IP)—how to configure a serializer/deserializer (SERDES) forloopback testing, for example—to be transferred in a computerreadableformat from the IP designer to IC designers and, inturn, to designers of printed circuit boards (PCBs) and to testengineers, gradually magnifying industry cost savings along thesupply chain. The cost savings for the electronics industry thatIEEE 1149.1-2013 is intended to unlock are estimated to be in thebillions of dollars. IEEE 1149.1-2013 specifies a new hierarchicalProcedural Definition Language (PDL)—a standard test languagebased on Tcl, and hierarchical extensions to the original BoundaryScan Description Language (BSDL) to describe on-chip IPDebug probe supports Infineon’s single-pindebug interfaceSegger has added support for Infineon’s Single Pin Debug(SPD) Interface for Infineon’s XMC1000-series to the J-Linkfamily of debug probes. The J-Link is, Seggerasserts, the only commercial debug probe in themarket capable of connecting to a device with theSPD-interface. “Support for Infineon’s SPD-interfacemakes J-Link even more versatile”, accordingto Segger, “We are making sure our complete lineof J-Link debug probes support all major tool vendors,CPU architectures and target interfaces [and]the first vendor supporting Infineon’s XMC1000series singlewire debug Interface is just one morepoint of proof”. “The SEGGER support for theSPD-interface significantly improves the eco-system for theXMC1000-series. By working with SEGGER, the SPD-interfaceis now accessible from all popular tool-chains in the market,test data registers. Eight new optional IC instructions provide afoundation for configuring I/Os for board test, mitigating falsefailures when re-testing the IC at the board level and correlatingthe results back to wafer level test through an Electronic ChipID. Now, the IP provider can document the IP test Interface andhow to operate the IP in an English-like language—just once, forall ICs. Software tools then re-target this documentation at theIC and board level for tests. In revising IEEE 1149.1, the workinggroup focused on two things: lowering industry costs through thenew PDL language and enabling test re-use over the lifecycle ofan integrated circuit. IEEE 1149.1-2013 provides critical synergywith two other important industry standards. IEEE 1149.1-2013supports segmented on-chip test data registers that cross powerdomains specified by IEEE 1801-2013 “Standard for Design andVerification of Low Power Integrated Circuits”. IEEE 1149.1-2013enables descriptions and operation of IP accessible via IEEE1500-2005 “Standard Testability Method for Embedded CorebasedIntegrated Circuits” structures.IEEEwww.ieee.orgincluding the free DAVE development platform and other freeGDB-based development environments,” says Dr. StephanZizala, Senior Director, Industrial and Multimarket Microcontrollersat Infineon Technologies. The SEGGER J-Link debugprobe on the market is tool chain independentand works with commercial IDEs from: Atmel,Atollic, Coocox, Freescale, IAR, i-Systems,ImageCraft, KEIL, Mentor Graphics, Phyton,Rowley, Renesas, Tasking and others, as well asfree GDB-based tool chains such as emIDE andEmBlocks. J-Link supports multiple CPU families,such as ARM 7, 9, 11, Cortex-M0, M0+, M1, M3,M4, R4, A5, A8, A9 as well as Renesas RX610,620, 62N, 62T, 630, 631, 63N; there is typicallyno need to buy a new J-Link or new license whenswitching to a different CPU family or toolchain.Seggerwww.segger.com/jlink.html26 Electronic Engineering Times Europe July/August 2013 www.electronics-eetimes.com

8-bit PIC® Microcontrollers8-bit PIC® Microcontrollerswww.microchip.com/8bit

OverviewGet Ready to See a New World of 8-bit PIC® MicrocontrollersPIC microcontrollers are finding their way into new applications like solar battery chargers, advanced medical devices andsolid state lighting. Microchip provides solutions for the entire performance range of 8-bit microcontrollers, with easy-tousedevelopment tools, complete technical documentation, design-in and production support through a global sales anddistribution network.Scalability & MigrationTo provide customers a low-risk development environment,PIC microcontrollers offer seamless migration within thecomplete range of products. The 8-bit PIC microcontrollerfamily is pin-compatible within a given pin count as well ascode compatible between the architectures. Being able tomigrate easily between various PIC MCUs allows flexibilityto react to changing design requirements and featureenhancements. Maximize re-use for future developmentsand preserve the investment in hardware, software andtools by choosing Microchip.The Industry’s Broadest MCU OfferingThere are over 800 8-bit PIC microcontrollers ranging from6 to 100 pins and up to 128 KB Flash that are pin andcode compatible across the portfolio. PIC microcontrollerswith XLP technology feature the world’s lowest activeand sleep power consumption with flexible power modesand wake-up sources. MPLAB® X Integrated DevelopmentEnvironment (IDE) supports all PIC microcontrollers withXC Compiler support and common development boards.Peripherals, Performance, and Price Pointsfor any ApplicationPeripheral integration is key with communication andcontrol peripherals like SPI, I 2 C, UART, PWM, ADC,DAC, op amps, as well as specialized peripherals forUSB, LCD and Ethernet. In addition, Microchip offers theCore Independent Peripherals that provide even higherlevels of flexibility and integration which has never beenpossible in the 8-bit microcontrollers. These new CoreIndependent Peripherals include Configurable LogicCell (CLC), Complementary Output Generator (COG),Numerically Controlled Oscillator (NCO), Zero CrossDetect (ZCD) and Hardware CVD (Capacitive VoltageDivider). Customers have made PIC MCUs a worldwidestandard, with over one million development systemsshipped. PIC microcontrollers are quick and easy todesign into a wide variety of applications with a longhistory of dependable product delivery.Strength Through DesignIn an effort to meet the needs of embeddedsystem designers, silicon manufacturers continueto increase functionality and performance whiledecreasing the physical size and cost. This providesa significant benefit to both the embedded systemdesigner and end consumer, but as the demand forsophisticated consumer and embedded productscontinues to expand, so does the challenge ofproperly designing such applications.As semiconductor technology continues to evolveinto “smaller, faster and cheaper”, so does thechallenge to provide key features and attributesnecessary for embedded design. Microchip iscommitted to implementing technology advances thatnot only increase performance and reduce cost ofthe microcontroller, but do so without sacrificing keyfeatures such as:■ 5V: As an 8-bit leader, we understand the need for5V devices and will continue to support it.■ EEPROM: A key requirement for many embeddeddesigns, cost effective implementation is critical.■ Analog Integration: Having a rich Analog offeringavailable in a low cost MCU is a must have formany of today’s embedded challenges.■ High Voltage Variants: Allows for connection to anapplication that has high voltage rails, without theneed of an external regulator.■ EMC: Designed to minimize susceptibility toEMI/EMC, providing the most electrically durablesolutions in the industry.2 8-bit PIC® Microcontroller Solutions

Global SupportMicrochip provides 24/7 global technical support with on-lineand phone support, hundreds of dedicated field applicationengineers, more than 50 sales offices and our authorizeddistributor network. Microchip also offers standard codelibraries, reference designs, application notes and seminarson-line and at Microchip Regional Training Centers.www.microchip.com/8bitresourcesTrusted partnerWhile MCU core commonality is a trend, there are no “dropin” replacements. The reality of MCU selection is that youare entering into a partnership with your MCU supplier. Toensure success, technology leadership is critical, but it isequally important to work with a partner that is committedto strong business fundamentals such as:■ Financial security to weather any economic downturns■ Industry leading lead times■ Industry leading quality and reliability(ISO/TS-16949 qualified)■ Industry leading EOL policy8-bit PIC Microcontroller Key HighlightsCore Independent Peripherals■ Configurable Logic Cell (CLC)■ Complementary Waveform/Output Generator (CWG/COG)■ Numerically Controlled Oscillator (NCO)■ Programmable Switch Mode Controller (PSMC)eXtreme Low Power (XLP)■ Active current as low as < 30 µA/MHz■ Sleep current as low as < 10 nA■ Battery lifetime > 20 yearsIntelligent Analog■ Rail-to-rail op amps■ Fast comparators■ 12b/10b/8b ADC■ 9b/8b/5b DAC■ Zero Cross Detect (ZCD)■ Voltage referenceSmall Form Factors■ As small as 8-pin 2 × 3 UQFNand 28-pin 4 × 4 UQFN■ Many other package optionsavailable, e.g. 3 × 3 QFN, 5 × 5 UQFNEssential Features■ 5V+ operation■ EEPROM■ LCD, mTouchSensing Solutions■ USB, CAN, Ethernet■ Analog IntegrationFaster Time-to-Market■ Free software■ Pin and code compatibility, easy migration■ Pre-programmed parts via Quick TurnProgramming (QTP)Design Support■ Free MPLAB® X Integrated Development Environment■ Free C Compilers■ Comprehensive technical documentation■ World-class, 24/7 technical support and training8-bit PIC® Microcontroller Solutions3

Intelligent AnalogSummaryWith Microchip’s Intelligent Analog solutions, engineerscan reduce their component count, design smaller,more cost effective boards, and benefit from simplified,higher performance designs and easier procurement ofcomponents. In addition, designers benefit from increasedflexibility like analog topology agility, utilizing the MCU’sprogrammable analog interconnects and programmability.To simplify your next design, Microchip has integrated thefollowing Analog Peripherals.Op AmpsA basic building block in electronic design. Integrating opamps into the Microcontroller offers increased flexibilityand reliability while reducing BOM costs and board space.High Speed ComparatorsComparators have be in the PIC Microcontroller lineup formany years. We are now offering feature rich High Speed(50 nS) variants to enable faster responding/more efficientclosed loop feedback designs.Fixed Voltage ReferrenceFixed Voltage Ref provides an integrated stable voltagereference, independent of VDD.Analog to Digital Conversion■ 16, 12, 10 and 8-bit ADCs available in our 8-bit offeringDigital to Analog Conversion■ 9,8, and 5-bit DAC options available in our 8-bit offeringHigh Current Sink/Source PinsHigh Current Sink/Source pins with the ability to sink/source50 mA the high currents pins enable direct MOSFET drivefrom the microcontroller.Zero Cross DetectEnables the micro to be connected directly to the ACinput via a current limiting resistor. The ZCD will flag themicro when the Zero Cross is approaching so any requiredswitching can be synchronized to reduce power andeliminate any switching related artifacts/noise.Development ToolsF1 PSMC 28-pin Evaluation Board (DM164130-10)■ PSMC development platform usingthe PIC16F1783■ Break-out headers forapplication development■ Connect to any F1 motor control add-on■ Prototyping areaPICDEM Lab Development Kit (DM163045)■ Development platform for 6 to20-pin parts■ Work across differentarchitectures■ Includes comprehensive user guide,labs, and application examples■ Support for PICkit 3 and Expansion HeadersFeatured Intelligent Analog Product FamiliesFamilyPinsPIC16F527/570 20/28PIC16F75X 8/14PIC16(L)F170X 14/20PIC16(L)F171X 28/40/44PIC16(L)F178X 28/40/44Flash MemorySRAM (Bytes)1.5K–3K64–1321.75 KB–3.5 KB64–1283.5 KB–14 KB256 B–1 KB7 KB–28 KB512–2 KB2K - 16K256 - 2Kwww.microchip.com/intelligentanalogIntelligent Analog8-bit ADC (8),Comparator (2), Op amp (2)10-bit ADC (4), 5/9-bit DAC (1),Comparators (2), Op amp (1),High Current Pins (2)10-bit ADC (8-12), 8-bit DAC (1),Op amps (2), Comparators (2),Zero Cross Detect10-bit ADC (17–28), 5 & 8-bit DAC,Op amps (2), Comparators (2),Zero Cross Detect12-bit ADC (11–14), Comparators (3–4),Op amps (2–3), 8-bit DAC, 5-bit DAC (0–3)CoreIndependentPeripherals-CWG/COGCLC,COGCLC, NCO,COGPSMCAdditional FeaturesInternal Shunt:providing high voltageinput capabilityI 2 C/SPI, UARTI 2 C/SPI, UARTI 2 C/SPI, UART6 8-bit PIC® Microcontroller Solutions

PIC Microcontrollers with XLP TechnologyeXtreme Low Power (XLP) Technology■ Sleep currents down to 9 nA■ Active Mode currents down to 30 µA/MHz■ Execution Effi ciency with more than 80% PIC MCUsingle cycle instructions■ Execute code smarter, sleep longer, maximizebattery life■ Wake-up sources including RTC, WDT, BOR, Interrupts,Reset or PORLow Power Peripheral IntegrationMany of today’s low power products need advancedperipherals. Microchip offers low power devices withperipherals like USB, LCD and mTouch capacitive sensing.This eliminates the need for additional parts in theapplication, which saves cost, current and complexity.Low Power ReliabilityIn addition to peripherals, products with XLP have systemsupervisory circuits specially designed for batterypowered products.■ Watchdog Timer down to 200 nA, provides protectionagainst system failure■ Real-Time Clock/Calendar down to 400 nA, providesprecise timekeeping■ Brown-out Reset down to 45 nA, protects as batteriesare depleted or changedBattery Life EstimatorThe XLP Battery Life Estimator is a free software utility toaid you in developing eXtreme Low Power applications withMicrochip’s PIC MCUs featuring XLP technology.■ Profi le your application Run and Sleep time (duty cycle)■ Select operating temperature and operating voltage■ Pre-loaded with most common battery specifi cationswww.microchip.com/BLERun from a Single BatteryThe MCP1623/4 and MCP1640 Synchronous BoostRegulators enable single cell battery applications, ideal forsmall, portable and lightweight applications.■ Power any PIC MCU down to 0.35V■ Provides 2–5.5V fi xed/stable output voltageDevelopment ToolsXLP 8-bit Development Board (DM240313)■ Supports PIC16 and PIC18 devices■ LCD display and buttons■ Flexible power options■ Expansion connector■ Current measurement pointsFeatured XLP Product FamiliesDevice FamilyPinsFlash(KB)Sleep(nA)Active(µA/MHz)SpecialFeaturesPIC16F727 20–44 3.5–14 20 55 –PIC16F1509 20 7–14 25 30 CLC, CWG, NCOPIC16F1829 8–20 3.5–14 20 50 –PIC16F1947 28–64 7–28 60 55 LCDPIC18F46K20 28–40 8–64 50 138 –PIC18F87K22 20–80 8–128 20 190 –PIC18F47J53 28–44 16–128 9 197 USBPIC18F66K80 28–64 32–64 13 100 CANPIC18F87K90 64–80 32–128 20 180 LCDAll numbers are typical values, sleep numbers refer to the lowest power Sleep mode available on each family.www.microchip.com/xlp8-bit PIC® Microcontroller Solutions7

PIC Microcontrollers with mTouch TechnologyTouch SensingTouch sensing has become an alternative to traditionalpush-buttons and switches providing:■ Lower cost of manufacturing and assembly■ Elegant and stylish designs■ Increased reliability; with fewer moving parts■ Proximity-sensitive human interfacesMicrochip’s mTouch Sensing Solutions allow designers tointegrate touch sensing with application code in a singlemicrocontroller, reducing total system cost. Microchipoffers a broad portfolio of low power, low cost and flexiblesolutions for keys/sliders and touch screen controllers.Get to market faster using our easy GUI-based tools, freesource code and low-cost development tools.Keys, Sliders, Wheels and Proximity Detection■ Industry’s lowest power touch sense solutions• Capacitive sensing in less than 5 μA• Proximity sensing down to less than 1 μA■ No external component■ Works through plastic, glass and metal surfaces■ Water-proof designs for all weather conditions■ High noise robustness■ Integrated peripherals such as USB, segmented andgraphical LCD modules for true human interfacesystemon-a-chip■ Free software library simplifi es implementation andsource code puts you in controlCapacitive Voltage Divider (CVD)CVD is a charge/voltage based technique to measurerelative capacitance on a pin using only the ADC.■ Software implementation■ 8, 16, and 32-bit support■ Proximity support■ Low temperature dependence■ Low VDD Dependence■ Minimal hardware requirements■ Low-frequence noise rejection■ Metal over cap compatibleHardware CVDHardware CVD has been implemented on some of our newdevices providing automated capacitive touch sampling,thereby reducing code size and decreasing CPU usage.Development ToolsEnhanced mTouch Technology CapacitiveEvaluation Kit (DM183026-2)■ Features PIC16F, PIC18F, PIC24Fand PIC32F■ Includes 8 buttons, matrix andsliders daughter boards■ GUI for easy confi guration and realtime data monitoringmTouch Projected Capacitive Development Kit(DM160211)■ PIC16F707 controller board withfully functional fi rmware■ Sensor board with 3.5" projectedcapacitive 12 × 9 touch screen■ Royalty-free source code supportssensors with up to 32 channelsMetal Over Cap Accessory Kit (AC183026)■ For use with the DM183026-2■ 1 daughter board featuringstainless steel cover■ 1 daughter board featuring aplastic coverFeatured HCVD Product FamiliesDevice Family Pins Flash (KB) HCVD Voltage (V) Additional FeaturesPIC16(L)F1513 28 2–4 1.8–5.5 10-bit ADC × 17 channels, CCPWM, UART, I 2 C, SPIPIC12LF1552 8 2 1.8–3.6 10-bit ADC × 5 channels I 2 C, SPISoftware CVD available on all PIC MCUs with ADCwww.microchip.com/mtouch8 8-bit PIC® Microcontroller Solutions

PIC Microcontrollers with LCDSegmented DisplaysSegmented displays are used in a wide variety ofapplications, ranging from meters to portable medicaldevices to thermostats to exercise equipment. PIC MCUswith integrated LCD drivers can directly drive segmenteddisplays with letters, numbers, characters and icons. Themain features of Microchip’s LCD portfolio include:■ Flexible LCD segments• 28 pins: up to 72 segments• 44 pins: up to 116 segments• 64 pins: up to 184 segments• 80 pins: up to 192 segments• 100 pins: up to 480 segments■ Variable clock inputs■ Integrated voltage bias generation■ Direct drive for both 3V and 5V powered displays■ Software contrast control for boosting or dimming fordifferent temperature or lighting conditions■ Drive LCD while conserving power in Sleep mode■ Integrated real time clock and calendar for displayingtime and date information■ mTouch capacitive touch sensing capability■ Crystal-free USB 2.0 optionsDirect Drive for Segmented DisplaysThe LCD PIC microcontrollers support direct LCD paneldrive capability with no external components needed,lowering total system cost. They have integrated voltagebias generation which allows the MCU to generate thedifferent voltage levels that are required to drive the LCDsegment pins and provide good contrast for the display.The LCD MCUs support a range of fixed and variable biasoptions as well as variable clock inputs that enable theflexibility to work with many different glass vendors.Contrast ControlSoftware contrast control is a key feature using firmware toeither boost or dim the contrast of the display. Boost thecontrast up to VDD or beyond if you are using one of theMCUs with an integrated charge pump. Software contrastcontrol allows the designer to vary the contrast on theLCD to account for different operating conditions such astemperature, lighting, and humidity. Also, software contrastcontrol can be invaluable for portable applications. As thebattery level starts to drop, the firmware can apply a boostto the contrast helping extend the battery life while stillseeing a crisp image on the display.Development ToolsPICDEM LCD 2 Demo Board (DM163030)■ Illustrates and supports the mainfeatures of Microchip’s 28-, 40-, 64-and 80-pin LCD PIC microcontrollers■ LCD glass with icons, numbers,alphanumeric and starburst display■ Separate Processor Plug-in Modules (PIMs) areavailable to evaluate all of the LCD products■ Booster capability for contrast control and dimmingLCD Explorer Development Board (DM240314)■ Supports PIC24 & PIC18 LCD PICMCUs with XLP technology■ Current measurement terminals,mTouch sensing solutions &expansion connector■ Eight common LCD glass■ Support 1/3 biasing■ CTMU switch to showcase touch sensing■ Four switches implemented for software demonstration■ Power the board using 9V power supply, USB connector, twoAAA batteries or Connector for VBAT current measurementPIC18F97J94 PIM Demo Board (MA180034)■ Features 100-pin PIC18F97J94 for evaluationof all 100-, 80- and 64-pin PIC18F97J94LCD/USB/General Purpose MCUs■ Plugs into LCD Explorer Board(DM240314) for additional functionality■ Contains code examplesFeatured LCD Product FamiliesDevice FamilyPinsFlash(KB)MaxSegmentsVoltage(V)PIC16LF1907 28–40 3.5–14 116 1.8–3.6 10-bit ADC, EUSARTAdditional FeaturesPIC16(L)F1947 28–64 7–28 184 1.8–5.5 10-bit ADC, EEPROM, I 2 C, SPI, ComparatorsPIC18F87K90 64–80 32–128 192 1.8–5.5 10-bit ADC, EEPROM, I 2 C, SPI, RTCC, Comparators, ECCPPIC18F97J94 64–100 32–128 480 2–3.6 Crystal-free USB, VBAT, 12-bit ADC, ECCP, UART, I 2 C, SPI, Comparatorswww.microchip.com/lcd8-bit PIC® Microcontroller Solutions9

PIC Microcontrollers with Integrated USBUSBUSB communication is growing in popularity for remoteupgrades, downloading data and other portable serialcommunication applications. Microchip’s USB PICMCUs bring the benefits of full-speed USB to a broadrange of embedded designs that can operate in variousenvironments and locations, enabling easy access to otherUSB devices such as printers, handheld devices or PCs.Full-Speed USB 2.0 (Device)Microchip offers USB solutions capable of full-speed USBoperation with the PIC16 and PIC18 family of devices. IfUSB On-The-Go is a requirement we have solutions in our16 and 32 bit families.Crystal-Free USBUSB communication requires 48 MHz with 0.25%accuracy over temperature. This is typically done with anexternal crystal and an internal USB. We have recentlyimplemented technologies that allow a crystal-freeimplementation with the following benefits:■ Lower BOM cost■ Tiny PCB footprint■ Simplifi ed design■ More robust solutionFree USB SoftwareMicrochip has USB software to support USB on 8, 16 and32-bit MCUs. This software is royalty-free source code andalso includes sample projects. The 8-bit family supportsUSB device mode with full speed operation. Additionalsoftware support includes full C and RTOS developmentenvironments. Included within this USB Framework Libraryis Microchip’s USB Framework Configuration Tool.■ Generates confi guration fi les with just a few clicks■ Royalty-free source code■ Firmware projects and USB drivers for the PCAdd USB to any PIC MCU with UARTThe MCP2200 is a stand-alone USB to UART serialconverter that enables full-speed USB connectivity inapplications containing a UART interface. The MCP2200has 256 bytes of EEPROM and 8 general purpose I/O.It offers a simple “plug-and-play” solution, allowing USBconnectivity with very little design effort.Development ToolsLow Pin Count USB Development Kit(DV164139/DM164127)■ Development platform for 14 and20-pin USB MCUs■ For evaluation ofPIC18F14K50/13K50 20-pinUSB MCUs + 145X■ Contains hardware, software and code examples■ Self-directed course and lab materialsPICDEM Full-Speed USB Demo Kit (DM163025-1)■ Evaluation platform forPIC18F2X/4XK50 family ofUSB MCUs■ Full speed USB 2.0 device withoutthe need for an external crystal■ Populated with the PIC18F45K50PIC18F87J94 PIM Demo Board (MA180033)■ Features 80-pin PIC18F87J94 MCUfor evaluation of all 80- and 64-pinPIC18F97J94 USB/LCD/GeneralPurpose MCUs■ Can be used with PIC18 ExplorerBoard (DM183032) for additionalfunctionality■ Contains code examplesFeatured Crystal-Free Product FamiliesDevice FamilyPinsFlash(KB)Voltage(V)Crystal-FreeAdditional FeaturesPIC16(L)F1459 14–20 7–14 1.8–5.5 CWG, 10-bit ADC, DAC, I 2 C, SPI, UARTPIC18(L)F45K50 28–44 16–32 1.8–5.5 10-bit ADC, Comparators, ECCP, UART, SPI, I 2 CPIC18F97J94 64–100 32–128 2–3.6 VBAT, 12-bit ADC, LCD, ECCP, UART, I 2 C, SPI, Comparatorswww.microchip.com/usb10 8-bit PIC® Microcontroller Solutions

PIC Microcontrollers with EthernetEmbedded EthernetMicrochip addresses the growing demand for embeddedEthernet products with the ENC624J600, ENC424J600and ENC28J60 as standalone Ethernet controllers,and the PIC18F97J60 family, which are IEEE 802.3compliant and fully compatible with 10/100/1000Base-T networks. Microchip’s Ethernet solution alsoincludes: Free and robust TCP/IP stack optimized for PICmicrocontroller and dsPIC® digital signal controller families(www.microchip.com/tcpip).Development ToolsPICDEM.net 2 Development Board (DM163024)■ Supports ENC28J60 and PIC18F97J60devices■ Can be developed as web serverPICtail Ethernet Daughter Board (AC164121)■ Can be plugged to any of the PIC18demonstration boards■ Populated with ENC28J60■ Interfaces to RJ-45 female connectorFeatured Ethernet Product FamiliesDevice FamilyPinsMCU +EthernetIntegratedMAC + PHYInterfaceHardwareSecurityPIC Microcontrollers with CAN & LINPre-programmedMACAdditional FeaturesPIC18F97J90 64–100 (10 Base-T) – – – IEEE 802.3ENC28J60 28 – (10 Base-T) SPI – –compliant, Autonegotiation,ENC624J600 44–64 – (10/100 Base-T) SPI/Parallel Confi gurable bufferwww.microchip.com/ethernetController Area Network (CAN)Microchip offers a complete line of 8-, 16- and 32-bitMCUs to meet the needs of high-performance, embeddedapplications using the CAN bus. On-chip peripheralsinclude A/D converters, comparators, motor control PWMs,USART (RS485, RS232, LIN) and Master I 2 C/SPI.Microchip’s Enhanced CAN Module■ Supports CAN 1.2, CAN 2.0A and CAN 2.0B protocols■ DeviceNet data bytes fi lter support■ Standard and extended data frames■ 0–8 bytes data length■ Three modes of operation:• Mode 0: Legacy mode• Mode 1: Enhanced Legacy mode with DeviceNet support• Mode 2: FIFO mode with DeviceNet support■ Six buffers programmable as RX/TX buffersLocal Interconnect Network (LIN)Microchip offers a LIN compatible USART on a widevariety of microcontrollers. We have recently taken our LINoffering to a new level by offering microcontrollers withintegrated LIN transceivers.Development ToolsPICDEM CAN-LIN 3 Demonstration Board (DM163015)■ Demonstrates CAN module features■ Includes both firmware and PC softwarefor simulating a CAN network■ In addition, the board employs a LINsub-networkFeatured CAN & LIN Product FamiliesDevice Family Pins Flash (KB)CAN TXBuffersCAN RXBuffersLIN TX RX Voltage (V) Additional FeaturesPIC18F4685 28–44 16–96 3 2 – 2–5.5 LIN USARTPIC18F66K80 28–64 32–64 3 2 – 1.8–5.5 LIN USARTPIC16F1829LIN 14 8K – – Integrated 2.3–5.5 LIN USARTwww.microchip.com/canwww.microchip.com/lin8-bit PIC® Microcontroller Solutions11

SupportMicrochip is committed to supporting its customersin developing products faster and more efficiently. Wemaintain a worldwide network of field applicationsengineers and technical support ready to provide productand system assistance. In addition, the following serviceareas are available at www.microchip.com:■ Support link provides a way to get questionsanswered fast: http://support.microchip.com■ Sample link offers evaluation samples of anyMicrochip device: http://sample.microchip.com■ Forum link provides access to knowledge base andpeer help: http://forum.microchip.com■ Buy link provides locations of Microchip Sales ChannelPartners: www.microchip.com/salesTrainingIf additional training interests you, then Microchip canhelp. We continue to expand our technical training options,offering a growing list of courses and in-depth curriculumlocally, as well as significant online resources – wheneveryou want to use them.■ Technical Training Centers: www.microchip.com/training■ MASTERs Conferences: www.microchip.com/masters■ Worldwide Seminars: www.microchip.com/seminars■ eLearning: www.microchip.com/webseminars■ Resources from our Distribution and Third Party Partnerswww.microchip.com/trainingSales Office ListingAMERICASAtlantaTel: 678-957-9614BostonTel: 774-760-0087ChicagoTel: 630-285-0071ClevelandTel: 216-447-0464DallasTel: 972-818-7423DetroitTel: 248-538-2250IndianapolisTel: 317-773-8323Los AngelesTel: 949-462-9523Santa ClaraTel: 408-961-6444TorontoMississauga, OntarioTel: 905-673-0699EUROPEAustria - WelsTel: 43-7242-2244-39Denmark - CopenhagenTel: 45-4450-2828France - ParisTel: 33-1-69-53-63-20Germany - MunichTel: 49-89-627-144-0Italy - MilanTel: 39-0331-742611Netherlands - DrunenTel: 31-416-690399Spain - MadridTel: 34-91-708-08-90UK - WokinghamTel: 44-118-921-5869ASIA/PACIFICAustralia - SydneyTel: 61-2-9868-6733China - BeijingTel: 86-10-8569-7000China - ChengduTel: 86-28-8665-5511China - ChongqingTel: 86-23-8980-9588China - HangzhouTel: 86-571-2819-3187China - Hong Kong SARTel: 852-2943-5100China - NanjingTel: 86-25-8473-2460China - QingdaoTel: 86-532-8502-7355China - ShanghaiTel: 86-21-5407-5533China - ShenyangTel: 86-24-2334-2829China - ShenzhenTel: 86-755-8864-2200China - WuhanTel: 86-27-5980-5300China - XiamenTel: 86-592-2388138China - XianTel: 86-29-8833-7252China - ZhuhaiTel: 86-756-3210040ASIA/PACIFICIndia - BangaloreTel: 91-80-3090-4444India - New DelhiTel: 91-11-4160-8631India - PuneTel: 91-20-2566-1512Japan - OsakaTel: 81-6-6152-7160Japan - TokyoTel: 81-3-6880-3770Korea - DaeguTel: 82-53-744-4301Korea - SeoulTel: 82-2-554-7200Malaysia - Kuala LumpurTel: 60-3-6201-9857Malaysia - PenangTel: 60-4-227-8870Philippines - ManilaTel: 63-2-634-9065SingaporeTel: 65-6334-8870Taiwan - Hsin ChuTel: 886-3-5778-366Taiwan - KaohsiungTel: 886-7-213-7828Taiwan - TaipeiTel: 886-2-2508-8600Thailand - BangkokTel: 66-2-694-135111/27/12Information subject to change. The Microchip name and logo, the Microchip logo, dsPIC, MPLAB and PIC are registered trademarksand PICDEM, PICtail and mTouch are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. All othertrademarks mentioned herein are property of their respective companies. © 2013, Microchip Technology Incorporated.All Rights Reserved. 5/13. DS30009630J. ML2052Eng05.13www.microchip.comMicrochip Technology Inc.2355 W. Chandler Blvd.Chandler, AZ 85224-6199

EDA tool optimises cell librariesfor processor cores in SoCsSynopsys has announced a physical-IP design kit optimisedfor SoC processor cores; the DesignWare HPC Design Kityields superior performance, power and area for CPU, GPUand DSP Cores Synopsys has announced an extension toits DesignWare Duet Embedded Memory andLogic Library IP portfolio specifically designed toenable the optimised implementation of a broadrange of processor cores. The new Design-Ware HPC (High Performance Core) Design Kitcontains a suite of high speed and high densitymemory instances and standard cell librariesthat allow system on chip (SoC) designers tooptimise their on chip CPU, GPU and DSP IP cores for maximumspeed, smallest area or lowest power – or to achieve anoptimum balance of the three for their specific application.Synopsys developed in collaboration with partners includingImagination Technologies, CEVA and VeriSilicon. The tool operatesin conjunction with the synthesis stage of a design flow(in a flow where the synthesis is aware of floorplanning issues),and is in part empirical; based on studies of “what works best”when implementing logic structures typical of processor cores,it selects and lays down specific standard cell variants whenit recognises certain features of processor logic,improving speed, power and silicon area. Itincludes around 125 new cells and memory elements.Initially focused on TSMC’s 28-nm HPMprocess, Synopsys says it will produce variantsfor other processes at that node, including lowpowerversions; 16-nm fin-FET processes are afurther possible target, and the company “may”look back at 40-nm processes if demand exists. The optimisationpackage uses standard “Liberty” syntax.Synopsyswww.synopsys.com/hpc-ipAutomated software-driven verification toolVayavya Labs has released SOCX-Verifier, claimed to be theEDA industry’s first software-driven verification tool that automaticallygenerates verification test software and relevant testbenchcomponents from a system-level scenario specification.With SOCX-Verifier, SoC designers cannow bridge and greatly accelerate thearduous hardware-software co-designprocess. While there are flows that arebased on virtual platforms and emulationplatforms, there is still a hugeamount of effort and cost involved in developingembedded software for SoCs.SOCX-Verifier provides all the necessarybuilding blocks for driver-model generation,scenario specification and virtualizing test-bench interactionto give verification teams a speedier closure and effectivesystem-level verification. Further this also enables the softwaredevelopers to deliver production ready software drivers at a10x efficiency level, according to Vayavya Labs. Softwaredrivenverification methodology harnesses the embeddedSystem planner tool automatically generates3D mechanical constraintsZuken has released new versions of its System Planner andDesign Gateway engineering solutions that accelerate andstreamline product planning and logical design for engineers.System Planner includes new functions that allow designarchitects to study behaviour, signal quality, and 3D spaceconstraints. Design Gateway includes improvements for hierarchy,rule checking, and an Intel Schematic Connectivity Format(ISCF) format for Intel design review. Zuken has streamlined thedesign flow for real-world engineering design, embedding multiboardSI analysis into System Planner. This permits engineers tostudy behaviour and signal quality of system-level interconnectionsduring the early design planning stage. It also facilitates“what-if” analysis to capture optimal topology and terminationschemes earlier in the design process. Additionally, by importingaccurate 3D enclosure and component models, engineerscan create board outlines, see component profiles, and automaticallygenerate mechanical constraints(such as height restrictions) formulti-board floor planning. Enhanceddesign reuse supports drag-and-drop oflogical and physical data from the reuselibrary directly in System Planner. Thesecan be fed directly into the design flowwith Design Gateway (logical design) and Design Force (physicaldesign). Design Gateway’s Circuit Advisor, part of Zuken’sschematic engineering environment, includes new rule checksto support multi-board design for physical connector mismatches,I/O checks to ensure proper continuity between boards, andchecks for duplicate references throughout the system. Simplifiedclassification of nets and constraint entry allow users todefine complex spacing requirements for High-Speed interfacessuch as PCI Express and DDR2/3/4.Zukenwww.zuken.comprocessor core’s power to verify the SoC from “Inside-Out.”SOCX-Verifier provides verification designers with the requiredinfrastructure and building blocks for driver-model generation,scenario specification and virtualizing test-bench interactionfor a speedier closure and effective system-level verification. Itconsists of two main components: SOCX-Specifier and SOCX-Virtualizer. SOCX-Specifier brings the canvas for capturingthe scenario specifications and generates Ctest cases from this specification. The C testcases execute on the embedded processorcore(s) in the SoC and access the designunder-test(DUT) components (design IPblocks) and the test-bench. SOCX-Virtualizervirtualizes access to the DUT componentsas well as the test-bench across various verification platforms.It achieves this by means of a “verification aware” lightweightoperating system (OS) and the DDGen tool which automaticallygenerates device drivers for the DUT components.Vayavya Labswww.vayavyalabs.comwww.electronics-eetimes.com Electronic Engineering Times Europe July/August 2013 27

EDA & DESIGN TOOLSMultiprocessing software tools targetthe CommAgility DSP board3L Ltd, a provider of software tools to simplify multiprocessing,has released the 3L Diamond suite for use with the CommAgilityAMC-2C6678high performance DSP/FPGA card. 3L Diamondauto-magically handles the interconnection managementwhen tasks are moved to different cores or devices. Engineersare free to focus on the application instead of the irritatingminutiae of the connectivity. This freedom helps maximise thebenefits of the C6678 multicore DSPs from Texas InstrumentsIncorporated (TI), built on the KeyStone architecture. The AMC-2C6678 is a single-width, full-sized AMC card powered by twoof TI’s latest TMS320C6678 DSPs, each with eight 1.25GHzC66x cores. The board also includes a Xilinx Virtex-6 FPGA anda 20Gbps per port Serial RapidIO infrastructure. The CommAgilityAMC-2C6678 is the latest of many pre-installed hardwareplatforms supported within 3L Diamond. Each licence includesaccess to all supported devices and boards. Copious royaltyfreeexamples and tutorials demonstrate the creation andsimple movement of tasks around available hardware.3L Ltd,www.3l.comIntegrated development environment allowsto record and display instruction trace dataAtollic’s release of the TrueSTUDIO v4.1 integrated developmentenvironment incorporates many new features, includingthe ability to record and display instruction trace data. Otherfeatures include the addition ofautomatic software unit testingwithin the optional TrueVERIFIERadd-module, and a test casedebugger within the optionalTrueANALYZER add-on module.The new instruction tracing function records the executionflow in real-time for later analysis. In this way, should an erroroccur it is possible to interrogate the trace logs and ascertainexactly what the processor was doing before a softwareerror occurred. TrueSTUDIO v4.1 support ETM tracing usinga Segger J-Trace JTAG probe, and ETB tracing for compatibleARM Cortex devices using any of the supported JTAGprobes, such as the Segger J-Link. The recorded instructiontrace log can be displayed in either C mode, mixed C andassembler mode, as well as in pure assembler mode. Thetrace log has graphical annotations on execution branches,and can be exported to a file for offline analysis. Integratingseamlessly with TrueSTUDIO, the optional TrueVERIFIERmodule now has an automatic software testing function thatcan check return codes and affected global variables foreach C function in the project. By examining your sourcecode, TrueVERIFIER can automatically generate a test suitethat is compiled, downloaded and executed on the targetboard automatically. On completion the test results and measuredtest quality data is transferred and visualized within theTrueSTUDIO IDE. The test engine and user Interface havealso been updated within this new release. In addition, andideally suiting test driven development, TrueVERIFIER nowalso supports a test scenario mode, where more complextest scenarios can be designed.Atollicwww.atollic.comIn-circuit programmer for ARM Cortex devicesconnects via Ethernet, USB or Serial PortComputer Solutions has released an in-circuit programmerthat supports ARM Cortex devices from Freescale, STMicroelectronics,Texas Instruments, and NXP. Once the Cycloneis configured, programmingoperations may be completedin one touch with or without aPC, says the manufacturer. TheCyclone and the target beingprogrammed may be local tothe PC or connected remotely via Ethernet. Multiple Cycloneson the network can easily be detected and controlledfrom the same PC. In addition, the Cyclone for ARM deviceshas been specifically designed with features like voltageprotection technology in order to withstand the rigors of aproduction environment. In Stand-Alone Mode, the Cyclonefor ARM devices is configured and loaded with one or moreprogramming images. Control of the Cyclone may then beautomated using a PC (e.g., for large production runs), orthe Cyclone can be operated independently of the PC (e.g.,forfield updates). An LCD screen facilitates configuration andoperation of the unit. The display’s menu-based navigationallows the user to easily select the image to be programmedwhen the Cyclone for ARM devices contains multipleprogramming images. The unit works with the FreescaleKinetis (K, L), STM32, TI-(Stellaris - LM3S, LM4F), NXP (M0,M3, M4) ARM families. It supports 10 and 20 pin JTAG andSWD modes and works with 1.8V-5V targets. The unit alsoincludes software for flash programming on chip memory ofall supported CPUs and external Flash devices.Computer Solutionswww.computer-solutions.co.ukOnline simulation tool helps designers evaluateTI’s InstaSPIN-FOC motor controlTexas Instruments has released a free, interactive online simulationtool that enables motor designers to assess the company’sInstaSPIN-field-oriented-control (FOC) technology. This onlinesimulation allows users to fullyevaluate the software-sensor-based“sensorless” control for variablespeed and load applications usingthree-phase, synchronous orasynchronous motors. Users canselect from a library of motors,customize speed and load profiles and obtain simulation resultswithin minutes. The simulation viewer enables users to vieweach waveform with a variety of zoom and pan options, performnumerous waveform analyses (e.g., period calculations, RMS,average) and print results. The entire experience is intendedto give users confidence to proceed with motor designs usingTI InstaSPIN-FOC motor technology. InstaSPIN-FOC removesthe need for a mechanical motor rotor sensor, reduces systemcosts and improves operation using TI’s new software encoder(sensorless observer) algorithm, FAST (flux, angle, speed andtorque), embedded in the read-only-memory (ROM) on TI’s 32-bit C2000 Piccolo microcontrollers. The InstaSPIN-FOC onlinesimulation tool is freely accessible.Texas Instrumentswww.ti.com28 Electronic Engineering Times Europe July/August 2013 www.electronics-eetimes.com

100G Ethernet packet parser reference design kitusing Tabula’s ABAX2P1 3PLDTabula now makes available a 100G Ethernet packet parser reference design kit basedon its new ABAX2P1 3PLD and supported by its Stylus revision 2.6.2 compiler. The100 GbE packet parser represents a novel approach to this class of network functions,delivering a unique combination of programmability and low latency. It provides supportfor multiple L2 accesses and trunk frame formats and is easily scalable to supportL3 and L4 parsing. It also benefits from a very small footprint – less than 2K LUTsfor a single 100G stream, making it an extremely cost-effective and power-efficientprogrammable solution that can be extended to support multiple 100G streams on asingle chip. Tabula’s Spacetime architecture enables designers to co-optimize performanceand density. Combining programmable fabric in which all components canoperate at 2 GHz with multi-port high-performance memories. In this 100 GbE packetparser reference design, these capabilities are used to parallelize the processing ofmultiple fields of an entire 100 GbE packet header, enabling the parsing function to becompleted in a record 17ns latency and making the parser software configurable tohandle different L2 formats or extended to L3 and L4 parsing.Tabulawww.tabula.comSoftware version management system boosts distributed teamsPerforce Software has released version 2013.1 of its Software Version Managementsystem, featuring enhancements to support globally distributed teams and scalableAgile development practices. The 2013.1 release focuses on two critical areas forsoftware developers, codeline task management for greater workflow flexibility andadvanced replication to support distributed teams. Advanced replication optionsin Perforce 2013.1 provide enhanced support, out of the box, for highly distributedteams to control exactly what is replicated in each location. Now every team gets highperformance access to exactly what they need, when they need it. Perforce replicationoptions are also tuned for high-performance build, test and release environments,enabling organizations to reach their goals for continuous delivery. Task Streams offerflexibility for managing tasks in progress. Task streams can also be archived uponcompletion of the task to de-clutter the stream graph. Along with task streams, shelvingprovides a flexible way to work on, review and promote shelved changes withquick approval. Shelves can be submitted directly or un-shelved to another branch.All Perforce products are provided free of charge for up to 20 users.Perforcewww.perforce.comCompiler qualification suite can be addedinto safety critical development toolsDutch developer ACE Associated Compiler Experts has launched a compiler qualificationsuite for use in OEM software tool qualification kits and services. Safetystandards like ISO 26262 require that adequate confidence and quality levels aredemonstrated in software tools. C/C++ compilers translate software to hardwarearchitectures and are complicated tools by nature thus requiring qualification andvalidation when used for safety critical applications. For this purpose, ACE has developedthe SuperTest qualification suite which provides a unique level of compilertest coverage and can find hazardous problem cases in compilers. Using the newSuperTest qualification suite, system integrators and application developers usinga tool chain can achieve the appropriate qualification and confidence levels for thecompilers that are used when producing their applications. Developers of safetycritical systems and applications can now have confidence in their compilers bytesting these for their specific use cases using the SuperTest qualification suite.The SuperTest qualification product is available as an OEM product to be integratedinto compiler specific qualification kits for tool vendors and through servicecompanies.ACEwww.ace.nl- searches allelectronics sites- displays onlyelectronics results- is available onyour mobilewww.eetsearch.comwww.electronics-eetimes.com Electronic Engineering Times Europe July/August 2013 29

FLEXIBLE ELECTRONICSPredictive modeling approach boosts thedevelopment of thin-film organic electronicsBy Alexander Mityashin, David Beljonne, Jérôme Cornil, Claudio Zannoni,and Paul HeremansImec (Belgium), University of Bologna (Italy) and University ofMons (Belgium) have developed a unique multi-scale methodologyto model the development cycle for thin-film organicelectronic materials and devices. This predictive approach hasbeen applied in different case studies demonstrating its practicalapplication. The new methodology will boost the developmentof organic electronics by providing a strong modeling helpto experimental optimization.The need for a new modeling methodologyOrganic molecules have been exploited in a large variety ofelectronic and optoelectronic applications, such as organiclight-emitting diodes (OLEDs), thin-film transistors (OTFTs),organic solar cells (OPV) and sensors. Several of these applicationsare currently making their first all-out attempts to enterthe market. For many others, however, the technology is not yetthere. Today, both the limited electrical performance and theenvironmental instability of molecular materials require majorbreakthroughs in their fundamental understanding. Amongmany strategies to facilitate the technology development,theoretical models are being sought to provide guidelines formaterial design and device architecture.In this context, we have recently developed a new theoreticalmethodology for the predictive modeling of organic molecularsemiconductors. Compared to existing instruments for molecularmodeling, its conceptual novelty consists in integrating severalstate-of-the-art techniques into one multi-scale workflow.With the pivotal incentive of providing a comprehensive physicaloutlook, the proposed methodology covers various steps ofthe development cycle - from chemical design of new organicmolecules to their thin-film assembly and electronic propertiesin devices.Principle of the new modeling approachThe scheme of a typical modeling study is shown in figure 1 andincludes three major steps. First of all, for every new molecularmaterial that we would like to model, the physicochemical andAlexander Mityashin is a member of the Large Area Electronicsdepartment at imec and a PhD candidate at the K.U.Leuven- imec.be –He can be reached at Alexander.Mityashin@imec.beDavid Beljonne and Jérôme Cornil are Research Directors ofthe Belgian National Fund for Scientific Research (FNRS) at theUniversity of Mons – They can be reached atDavid.Beljonne@umons.ac.be andJerome.Cornil@umons.ac.be, respectively.Claudio Zannoni is Professor of Physical Chemistry at theUniversity of Bologna - Claudio.Zannoni@unibo.itPaul Heremans is Professor in Electronic Engineering at theK.U.Leuven, Fellow at imec and Technology Director at HolstCentre – He can be reached at Paul.Heremans@imec.beelectronic properties of individual molecules are parameterizedby rigorous ab-initio modeling. These properties are essentialto understand how these molecules interact together in solids,and how their interactions influence the thin-film morphology, itscrystal structure and possible defects. Conjugating this understandingwith molecular dynamics modeling, we construct molecularfilms of several thousands of molecules, with thicknessup to a few tens of nanometers. These dimensions are appropriatefor characterizing device-relevant electronic processes. In asimilar way, one could model molecular deposition and thin-filmgrowth processes, imitating the industrially-relevant fabricationtechniques that we like to elucidate. Finally, electronicand electrical properties of the obtained films are revealed bycombining micro-electrostatics and charge transport modeling.Micro-electrostatics is first applied to study the energy levellandscapes for the charge transport. Later on, these landscapesare populated with mobile charges, identical to those injectedfrom metal electrodes in thin-film devices. The motion of thesecharges is monitored by the charge transport modeling toreveal their speed and transport efficiencies; these propertiesare responsible for the material conductivity and charge carriermobility.To make this thorough integration possible, a certain technicalinnovation was required. Among many things, the most crucialone was to work out the communication protocols to enableindividual methods to “talk” to each other. The smooth matchingof characteristic scales, accuracies and computationalcomplexities of different methods is assured by optimized andnewly-developed data-exchange protocols. Once such frameworkis established, the work-flow of figure 1 is only an exampleof a possible modeling realization; many more techniques canbe integrated as new modules, as illustrated in the figure by thestacks of candidate techniques available for every modelingblock. Such integration results in a unique configurable platformfor predictive modeling from nano-scale of individual moleculesto macro-scale of thin-film devices.Revealing the mechanism of moleculardoping in organic semiconductorsThe multi-scale methodology enables new strategies to tacklescientific challenges at scales and complexities that previouslywere not accessible by conventional modeling techniques orexperiments. For example, we have applied this approachto unravel the mechanism of molecular doping in crystallineorganic semiconductors. Monitoring the doping-associatedelectronic processes offered the first assessment of the dopingmechanism at the molecular scale and of its efficiency.The main steps of this study are summarized in the top partof figure 1. For the convenience of the experimental validation,we selected a well-known semiconductor-doping combination:p-type semiconductor pentacene and its complementarydopant F4TCNQ. After ab-initio parameterization of individualmolecular properties of the host and doping materials, films30 Electronic Engineering Times Europe July/August 2013 www.electronics-eetimes.com

Fig. 1: A typical modeling study includes three major steps: looking at the molecular material level, experimenting with devicefabrication and assessing device operation.with different doping concentrations were constructed by introducingF4TCNQ molecules in the vacancies of the host crystal.To make this structure physically realistic, molecular mechanicswas used to find the most likely orientation of doping moleculesin the host crystal. Energetics for the doping-host chargedonation and transport of these donated charges were modeledusing micro-electrostatics and charge transport simulations.The ability to monitor these doping-associated electronicprocesses at the molecular scale provided several new insightsinto the efficiency of the doping mechanism and its sub-events.It allowed, for example, to complement the existing vision ofcharge donation with information about how the chemical andstructural properties of doping and host molecules impact thecharge donation efficiency. Even more importantly, the previouslyobscure process of free-charge generation has been clarifiedmicroscopically as a function of the doping concentration.These findings were compared to the experimental measurementsshowing excellent qualitative agreement.The overall mechanism of molecular doping in organicsemiconductors has been found to differ strongly from the conventionalwisdom of inorganic materials. In organics, a strongcorrelation between the dopant efficiency and its concentrationis demonstrated along with the threshold concentration ofthe doping activation. Strategies towards the design of moreefficient doping involve a proper tuning of the host-dopant geometricand electronic interfaces.Outlook to further applicationsTo give an outlook to further applications of the multi-scalemethodology, it is important to notice that similar models canbe used to investigate the influence of impurities or effects ofenvironmental degradation of organic materials, for exampledue to oxygen or water penetration into organic films. Generallyspeaking, one can envisage many more applications ofour methodology for in silico optimization of hetero-interfacesin organic optoelectronic devices or, alternatively, for de novomolecular design of interfaces with tailored properties.For example, we are currently studying how charge generationin organic solar cells depends on the material selectionand nano-architecture of their donor-acceptor interfaces; weperform similar modeling for dielectric-semiconductor interfacesin organic thin-film transistors.We also foresee multiple avenues for the further developmentof the multi-scale toolbox of methods. A natural leap in developmentwill be done towards easier integration of new materials.Comparing different materials is the primary practical dutyof the developed methodology. An easy, modeling-friendly procedureis therefore required to automate the integration of newmolecules into simulations. Given the skyrocketing progressin the chemical engineering of new organic molecules, rapidmaterial succession is likely to be the case, and will probablyeven accelerate in the future. Therefore, modeling tools mustbe capable of quick and reliable integration and testing of new(maybe even not-yet-existing) materials.We anticipate that this new approach to modeling will assistthe progress of experimental and theoretical work on theaforementioned problems, and many more of those we have not(yet) conceived of. We established evidence that this methodologyprovides a computationally efficient framework to link themolecular properties of the constituent material to the resultantelectronic device performance. This should fuel further studiesof electronic processes in the heart of OTFT, OPV and OLEDdevice operation, with the long-term goal of becoming an instrumentto facilitate the development of materials and devices.Multi-scale modeling can inform the rational design of optimizedmolecular materials for organic electronics, eventually advancingbetter performance and more durable materials. Applicationin device building may also lead to improved electrical performanceand perhaps even to novel device concepts and architectures.It will ultimately facilitate the experimental validationcycles that are needed to improve on existing organic electronicmaterials and devices.www.electronics-eetimes.com Electronic Engineering Times Europe July/August 2013 31

FLEXIBLE ELECTRONICSA new class of flexible semiconductorsenters the marketBy Mike CowinRecent reports by HSBC GlobalResearch and by IHS predicting globalshipments of flexible displays to hit800M units by 2020 coupled with recentannouncements that LG plans tolaunch a flexible OLED product by Q42013 show the flexible display marketis at a tipping point and 2014 is set tobe an important year for the industry.This new class of semiconductormaterials eliminates such issues bydesigning into the inks the preferredfeatures of chemically stable, highmobility, single-crystal organic semiconductorsand combining this withamorphous semiconducting polymersand the uniform processing characteristicsthat these binders offer.It is clear that significant technologygaps existed in the evolving supplychain for flexible semiconductors inboth inorganics and organic materialofferings. Inorganic semiconductor materials pose serious concernsfor manufacturers with the need for vacuum processes,high-temperature procedures - a key barrier for use with flexibleplastic backplanes and most significantly unproven flexibility infinal form. Historic concerns regarding organic semiconductorwere low carrier mobility, temperature resistance and controllableuniformity in TFT (Thin-Film-Transistor) performance.Nevertheless the compelling benefits over inorganics offeredby organics such as inherent flexibility and the potentialfor solution processing with a wide range of substrates, printprocesses and device architectures meant that if these prior artissues could be resolved a real enabling product would exist forthe flexible market.To meet these requirements SmartKem’s approach was todevelop a new class of semiconductors called p-FLEX. Thesesemiconductors use high mobility small molecule materialswith proprietary binder matrix materials to yield exceptionallyhigh performance solution-based semiconductors that canbe processed in air, offer highly uniform films, are stable up toand above 250°C and are fully compatible with a range of printprocesses.Fig. 1: Typical morphology of the SmartKem p-Flex.When looking at prior art, solutionprinting of semiconductors has tendedtowards either solution printing ofsingle-crystal films or printing smallmolecule semiconductors in polymer blends. Printing singlecrystalorganic semiconductors such as substituted benzothienobenzothiophenesin solvents has managed to yield impressivecarrier mobility’s of up to 30 cm 2 V -1 s -1 , but with the seriousdisadvantage of the yielding very poor device to device uniformityand mobility values ranging between 1 to 32 cm 2 V -1 s -1 -great in the lab and for headline results but not practical for realworld applications. Whereas the printed small molecule-polymerblend approach afford good device uniformities that are becomingindustrially interesting, but with very low mobility’s of onlyaround 1 cm 2 V -1 s -1 and an inability to control the performance ofthe formulated blend in top gate and bottom gate TFTs.SmartKem’s semiconductor approach overcomes thesetechnology roadblocks by carefully engineering chemicalimprovements into its material molecular framework. Theseinks incorporate polycrystalline small molecules that have beendesigned with the highest levels of pi-pi overlap and minimuminter-planar pi-pi distances when deposited with the optimumcrystal packing in the printed semiconductor layer. The key toachieving this effect in printed layers is to use the small moleculein combination with a new class of patented “matched”The development of organic semiconductors (OSCs) generally falls into two main categories of materials: polymeric anddistinct molecular materials. A common feature is that boththese types of materials are conjugated systems, that is to saythey consist of alternating single and double bonds. Key considerationalso has to be given to matching the highest electronenergy level of the OSC to the work function of a metal contactto ensure efficient device operation.For high performance TFTs, high charge carrier mobility isrequired and this favours crystalline small molecule semiconductors.While close packed and regular arrangement of themolecule crystal lattice give rise to good π-overlap and efficientcharge carrier mobility these materials on their own tend todemonstrate anisotropy.Mike Cowin is Head of Product Development at SmartKem -www.smartkem.comFig. 2: SmartKem’s formulation facility at Technium OpTIC inSt Asaph, UK.32 Electronic Engineering Times Europe July/August 2013 www.electronics-eetimes.com

Fig. 3: Product positioning of p-FLEX for flexible displays.Table 1: Comparing potential semiconductors for flexible displays.semiconducting binders. These binders are specifically designedto control the phase separation of the small moleculesuch that it deposits in its high performance microstructure atthe desired device interface.These inks enable top gate devices having a high concentrationof the polycrystalline material at the air interface and bottomgate devices with a high concentration of the high mobilitysmall molecule at the dielectric interface. The p-FLEX rangeof semiconductor inks now consist of a range of high mobilitypolycrystalline small molecules in combination with seven distinctchemical classes of customised semiconducting polymers,these are the subject of a series of unpublished patent applications.When it comes to performance, these inks have been rigorouslytested both internally and externally at centres of excellencesuch as CPI in the UK and by industrial partners (andoffers (for TGBC TFT’s) charge mobility in excess of 5 cm 2 V -1 s -1 ,threshold voltages near zero and on-off ratios of the order of10 5 for un-isolated devices. These solution-based semiconductorsthus outperform a-Si and are comparable to most oxides,but with the key advantage of inherent flexibility and ambienttemperature processing - a “must have” for most flexible plasticsubstrates. In addition, initial pilot line trials are exhibitingexcellent levels of TFT uniformity due to ability to control filmformation at a molecular level.The electrical and physicalspecifications of this new range ofsemiconductors already meet therequirements for both EPD andOLED and can be processed ona wide range of material surfaces,such as glass or plastic usingprint processes such as ink jet,slot die or roll-to-roll. Critically thisoffers the end user the potentialto make the transition to continuousprint techniques and reducedcost of production as these systemscome online.In the short term, new curvedform factor product in the nextsix to twelve months will mostlikely incorporate low mobility,high temperature inorganics onglass via a legacy of traditionalkit and materials. However whilstinorganics are a quick fix to the very immediate need for newproduct, the medium to long term needs of the flexible displayindustry will inevitably move towards low temperature, solutionbasedorganics where the material performance and processadvantages are just too compelling to ignore. For instance anorganic front plane coupled with an organic back plane makessense, especially when you throw into the mix the potential forcontinuous roll to roll production.Fig. 4: SmartKem p-Flex (spin coat) solutions.www.electronics-eetimes.com Electronic Engineering Times Europe July/August 2013 33

FLEXIBLE ELECTRONICSPrinted electronics opens up large flexiblesensor design opportunitiesBy Laurent JametCompared to traditional electronic solutions,printed electronics offers several differentiatingfactors which make them particularly well suited tosensing application. Most printing processes arecompatible with large area substrates, which enablethe design of large area sensors with sensing capabilitiesacross surfaces of up to 500x500mm. This ata very competitive cost per area ratio (compared toamorphous silicon or CMOS technologies).A pioneer in printed electronics applied to opticalsensors, Isorg addresses several markets and functionalities.This includes scanning surfaces for X-raydigital imaging with the co-integration of organicphotodiodes with transistors on amorphous silicon,fully integrated in printed electronics with organicphotodiodes combined with organic transistors onplastic substrate.In the future, substituting amorphous silicon technologywith organic electronics will increase costcompetitiveness and enable new products developments(for lighter and more robust portable equipment).The first demonstrator of such a full organicimage sensor is being fabricated as a collaborativedevelopment between Isorg and Plastic Logic. More particularly,the collaboration focuses on the deposition of organicprinted photodetectors onto a plastic organic thin-film transistorbackplane, to create a flexible sensor with a 40x40mm activearea, 375um pitch (175um pixel size with 200um spacing) and a94x95 = 8 930 pixel resolution – see figure 1.Biometrics applications using fingerprint and palmar surfacerecognition could use printed electronics to substitute the typicalCMOS-based sensors with thinner and lighter organic solutions.Current developments yield a pixel resolution of 50um.Such approaches could also enable the design of large scanningsurfaces to substitute CCD line scanners in office equipment,yielding faster, lighter and thinner document scanners. Sofar in this field, a pixel resolution of 80um has been achieved fora 300 dpi document scanning resolution.Printed electronics also finds its way in temperature sensorsin printed electronics (figure 2), applying its large area sensingcapabilities to the detection of hot spots, for example to monitorthe power distribution and heat dissipation in power electronicscircuit boards.Fig. 1: Plastic image sensor prototype (Isorg / Plastic Logic)Thin and flexible: a system-on-foil approachUsing PET as a substrate, it is now possible to design systemon-foilsensing solutions that combine optical sensors, discretecomponents such LED and flexible interconnections. In thisway, contactless user interfaces can be built using organicphotodetectors, offering functionalities such as hand proximitydetection and gesture recognition for power on/off or linear control(slider and vertical distance detection). These conformablesystem-on-foil user interfaces can even be integrated in smarttextiles products. The optical solution relies on the detection byorganic photodetectors of the reflected infra-red light emittedby IR-LEDs directly mounted on a flex circuit, as shown in figure3. For this purpose, the organic semiconductor materials canbe tuned to operate both in visible and near infra-red bands.Being very thin and easy to glue to other substrates such aspaper, these new sensors can easily turn plastic and paperLaurent Jamet is co-founder and business development directorof ISORG - www.isorg.fr - he can be reached atlaurent.jamet@isorg.frFig. 2: Printed temperature sensor (Isorg).34 Electronic Engineering Times Europe July/August 2013 www.electronics-eetimes.com

Fig. 3: Flexible proximity detection and gesture detection byorganic photodiodes (Isorg)into interactive surfaces for merchandising and smart packagingsolutions or to detect nearby motion. Another use casefor such optical sensors is to integrate NIR emitting LEDs andorganic photodiodes at the periphery of a surface so that anyobject left on the surface can be spotted through the detectionof light path occlusion – see figure 4. Such applications areunder development for industrial products and multi-touch userinterfaces and displays.Retrofit sensorsBecause flexible and printed electronics foil sensors are easy toglue, they can easily be fitted to existing equipment. For example,Isorg is investigating the use of optical sensors for spatialFig. 4: Object detection by organic photodiodes arrays (Isorg).spectroscopy as an in-line process control for the pharmaceuticalindustry. These sensors could be stuck to the windows ofexisting equipment. The same would apply for temperaturesensor arrays used in power distribution appliances (by gluingthe sensing plastic foil directly on the equipment door). Objectdetection sensors could find their way in logistics.All these new developments require the cooperation ofnew players from the printed electronics and conventionalelectronics industries. System-on-foil approaches call for newsubstrates (PET, PEN), new attach materials (low temperatureconductive glue), new conductive materials (printable copperand silver inks, TCO Transparent Conductive Organic materials)as well as new assembly and inspection equipment (pick-andplacemachines, visual inspection, oven).Large-area fully-organic flexiblephotodetector array ready for x-ray imagingAt this year’s International Image Sensor Workshop, imecand Holst Centre presented a large-area fully-organic photodetectorarray fabricated on a flexible substrate. The imageris sensitive in the wavelength range suitable for x-ray imagingapplications.Because of their very high absorptioncoefficient, organic semiconductorsallow extremely thin active layers(10 to 50nm). Also, given their lowprocessing temperature, they canbe processed on foils. As a result,organic imagers can be more robustand light-weight compared to theirtraditional counterparts and may beused for conformal coating of randomlyshaped substrates. Moreover,the wide variety of organic moleculesavailable ensures that the propertiesof the active layer can be tuned to applications requiring specificwavelength ranges.The presented imager is sensitive in the wavelength rangebetween 500 and 600nm, making it compatible with typicalscintillators and therefore suitable for x-ray imaging applications.It was fabricated by thermally evaporating an ultrathin(submicron) photosensitive layer of small organic molecules(SubPc/C60) on top of an organic readout circuit.A semi-transparent top contactenables front-side illumination. Thereadout backplane was manufacturedon six inch foil-laminated wafers.It consists of pentacene-basedthin-film transistors (TFTs) in arraysof 32x32 pixels with varying pitch (1mm and 200 µm). To prevent degradationof the organic semiconductorsin the air, the photodetector array isencapsulated.The imager was characterizedunder illumination with a calibratedgreen light-emitting diode (LED),yielding a linearly increasing photocurrent from the incidentpower of 3 µW/cm 2 . Dark current density is below 10-6 A/cm 2 ata bias voltage of -2V.www.electronics-eetimes.com Electronic Engineering Times Europe July/August 2013 35

FLEXIBLE ELECTRONICSFully instrumented sock integrates smartfabrics sensors to provide fitness dataWashington-based startup company Heapsylon has launchedan USD87,000 crowdfunding campaign on Indiegogo to finalizeproduct development and manufacturing of its SensoriaFitness system. This includes smartsocks with smart fabrics sensors, anelectronic anklet for communicatingthe data with the user’s mobilephone, and a virtual coach mobileapp. The sock shaped Sensoriadevice is able to tracks everythingfrom foot landing and stride cadenceto activity level and altitude gain. Thespecially chemically-treated fabricSensors are able to measure pressurepoints for a detailed analysisof the foot’s contact with the sole. With these socks on, everytime you walk, run and exercise you are generating valuabledata that can be processed to produce meaningful views ofyour activity and the way you use your whole body (in this instance,the way you articulate your feet onto the ground). Thesensor filled sock is comfortable, washable and designed forrunners. The smart fabrics Sensors send pressure data to theSensoria Anklet. The Sensoria Ankletuploads data wirelessly either viacomputer or through a smartphone.The data is then added to a dashboardfor either retrospective analysisor instant coaching. After over twoyears of research and developmentthe Heapsylon Sensoria wearabledevices are now at prototype stage,with appropriate funding, the devicescould be commercialized in 2014 forabout $150.Heapsylonwww.heapsylon.comTranslucent flexible antenna filmis only 130 to 185 microns thinPulse Electronics’ mLUX Translucent Flex antenna is an invisible antenna concept that allows light and colour to shinethrough the translucent device cover, offering multiple optionsfor industrial design. When integrated into the display, the antennaenables increased use of metal on the back cover of thehandset. The mLUX flex antenna provides state-of-the-art RFperformance and can be placed as far away as possible fromthe ground plane and the user’s hand, improving performancesignificantly. The device thickness can be reduced whileachieving the same performance as standard flex antenna solutions.The antenna can be assembled to the display, covers,or a separate carrier with adhesive or, alternatively, it can bemoulded between clear and opaque plastics.When the antenna is placed near the display, smaller feedingelements can be used, reducing the total volume neededfor the antenna. Total thickness of the flex is 130-185µmwith a copper (Cu) thickness of 12µm. Non-pattern areas arefilled with mesh to achieve a surface that is equally reflectiveTouch screen technologygoes behind the displayPeratech has used its recently launchedQTC Ultra sensor to create a touch screensolution for OLED displays for phones,monitors and large interactive displays.The QTC Ultra sensor is so sensitive thatit can be placed behind the OLED displayand still detect finger touches on the frontof the display to create a touch screeninterface. By positioning the touch screensensor behind the display, there is no lossof light from the display enabling the batterylife to be longer. Currently, Sensorsgo over the display and absorb light whichhas to be compensated for with a brightersetting for the display and that uses up more battery life. TheQTC Ultra sensor works best with OLED and e-paper type displays,which are becoming increasingly popular, although it canbe used with other display technologies providing they can bepressed. The Sensors rely on Peratech’sQuantum Tunnelling Composite (QTC)anisotropic material which changes itsresistance at the point where pressure isapplied. A deflection of a micron or so isneeded for QTC Ultra to sense the touchthrough the layers of glass and display.The solution provides not only multi-touchx and y co-ordinates but also z accordingto the amount of pressure applied enablingnew gesture inputs to be created.The layer of QTC material is printed asa QTC ink on the back of the display asrequired by the product designer.Peratechwww.peratech.comthroughout. The Cu mesh line-width is 12-20µm with 300µmpitch and the flex transmittance is typically around 80%.These RoHS compliant antennas are customized for eachapplication and design and are available and ready for volumemanufacture.Pulse Electronicswww.pulseelectronics.com36 Electronic Engineering Times Europe July/August 2013 www.electronics-eetimes.com

NAVIGATION & GEOLOCATIONEfficient geolocation usingswarm radioBy Gunter Fischer, Thomas Förste and Frank SchlichtingIn wireless sensor networks the concept of a swarm is used to illustrate howindividuals in a group interact. Individuals in a swarm need to know their position relativeto each other. Nanotron has added location-awareness to wireless sensor networksso that the swarm members can measure the distance between each-others,and are able to make decisions using this information. Communication and locationawareness together are enabling a whole new category of geolocation applications.Collision avoidance (CAS) - to mention just one of them – is introduced in this articleto illustrate the benefits of an extended swarm approach.The swarm platform technologyLow power swarm radios – autonomous 2.4 GHz Chirp Spread Spectrum wirelessnodes – are the basic swarm building blocks – see figure 1. They are able to broadcastand exchange messages while monitoring distances to other individuals in theswarm which are the key capabilities that allow for coordinated swarm behavior.Each individual in a wireless swarm consists of a swarm radiothat is controlled by a host through its application interface(API). There are several categories of API commands – seefigure 2.The RangeTo command for instancereturns the distance to another node.The quality of location-awareness depends ontwo basic criteria: accuracy and latency. Accuracyis the difference between measured and trueFig. 1: The swarm radio mini fromnanotron.distance. Usually it could be characterizedby a fixed off-set and the spread of results asshown in figure 3. Latency specifies the timerequired to obtain a ranging result. It has a strong impact on the real-time character ofthe application. Short messages and quick responses help to minimize latency thusmaximizing throughput. A typical swarm radio requires 1.8 milliseconds of air timefor executing a SDS-TWR cycle, nanotron’s patented Symmetrical Double-Sided TwoWay Ranging. To broadcast its ID it only requires 350 microseconds.The maximum obtainable range of the swarm radios determines how far apartindividuals in the swarm are still able to interact. Maximum range is highly dependenton the application environment.Under ideal line-of-sight conditionsrange might exceed 500 meters;however, in reality it often will be muchshorter due to obstacles, reflections,interference from other radio signals,antenna miss-alignment etc.Figure 4 shows a real world examplewith one swarm radio inside acar and the other carried by a person.Range could be extended by placingthe antenna on the outside of a car orby having the antenna installed on ahard-hat instead of on a belt.Fig. 2: Overview of nanotron’s swarm APIcommands.Dr. Gunter Fischer is Field Application Engineering Manager responsible forapplication support for nanotron’s swarm business.He can be reached at g.fischer@nanotron.com.Dr. Thomas Förste is Vice President of Sales and Marketing at nanotron Technologies.His email address is t.foerste@nanotron.com.Dr. Frank Schlichting is Director of Product Management for the swarm product line atnanotron. He can be reached at f.schlichting@nanotron.com.Surface Mount(and Plug In)Transformers andInductorsSee Pico’s full Catalog immediatelywww.picoelectronics.comLow Profile from.18"ht.Audio TransformersImpedance Levels 10 ohms to 250k ohms,Power Levels to 3 Watts, Frequency Response±3db 20Hz to 250Hz. All units manufactured andtested to MIL-PRF-27. QPL Units available.Power & EMI InductorsIdeal for Noise, Spike and Power FilteringApplications in Power Supplies, DC-DCConverters and Switching RegulatorsPulse Transformers10 Nanoseconds to 100 Microseconds.ET Rating to 150 Volt Microsecond, Manufacturedand tested to MIL-PRF-21038.Multiplex Data BusPulse TransformersPlug-In units meet the requirementsof QPL-MIL-PRF 21038/27.Surface units are electrical equivalentsof QPL-MIL-PRF 21038/27.DC-DC ConverterTransformersInput voltages of 5V, 12V, 24V And 48V.Standard Output Voltages to 300V (Specialvoltages can be supplied). Can be used as selfsaturating or linear switching applications. All unitsmanufactured and tested to MIL-PRF-27.400Hz/800HzPower Transformers0.4 Watts to 150 Watts. Secondary Voltages 5V to300V. Units manufactured to MIL-PRF-27 Grade 5,Class S (Class V, 155 0 C available).Delivery-Stock to one weekfor sample quantitiesPICO Electronics, Inc.143 Spar ks Ave. Pel ham, N. Y. 10803E Mail: info@picoelectronics.comwww.picoelectronics.comPico RepresentativesGermanyELBV/Electronische Bauelemente VertriebE mail: info@elbv.dePhone: 0049 (0)89 4602852Fax: 0049 (0)89 46205442EnglandGinsbury Electronics Ltd.E-mail: rbennett@ginsbury.co.ukPhone: 0044 1634 298900Fax: 0044 1634 290904www.electronics-eetimes.com Electronic Engineering Times Europe July/August 2013 37

NAVIGATION & GEOLOCATIONCollision avoidance solution (CAS)There is a need for automatic collision avoidance in mining. Inorder to prevent accidents a reliable alarm is required whenevervehicles come too close to people, assets or other vehicles. Theswarm geolocation technology is well-suited for implementingsuch collision avoidance solutions (CAS).A simplified set-up with vehicles, assetsand people – a total of three node types – isused to illustrate the essential outline of theapplication. In the worst case scenario twoobjects move towards each other at maximumspeed – see table 1. The system needsto react faster than the time necessary forthe objects to traverse the respective safetyzone for the shortest path collision course.In our example the shortest time is 2.2 seconds;therefore latency of the CAS systemmust be kept short and the whole group ofnodes needs to complete the full locationawareness cycle faster than in 2.2 seconds.For reliable operation one might decide toaccelerate the sequence in order to executeit several times within this interval.Figure 5 shows the steps of the locationawareness cycle and how they are supportedby the swarm radio:- Get IDs (4): As a first step the swarmradio makes itself visible by broadcastingits own ID. SetBroadcastIntervall=01for example sets the blink interval to 1second. After activating the broadcast bySetBroadcastNodeID=1 the swarm radiobroadcasts its ID every second. Node IDs ofother participants are automatically storedin the NodeID list when received. The hostapplication can read the NodeID list by usingthe GetNodeIDList command. This way neighbors are identifiedto the CAS application.- Range to IDs (5): As a second step the swarm radio measuresthe distance to all neighbors. This is accomplishedby subsequently executing the RangeTo command. Resultingdistance values are communicated backto the host application.- Evaluate distances (6): In a third stepthe CAS application needs to decidewhether any of the measured distancesviolates a safety zone requirementFig. 4: Range measured between apedestrian with a swarm radio mini andanother swarm radio mounted onto thedashboard of a passenger car.Fig. 3: Ranging accuracy is characterizedby offset and spread. The actual distancesare 50, 100 and 150 meters respectively.Table 1: Travel time through various safety zones on a straightFig. 5: Collision avoidance application flow chart.Example: RangeTo command.collision course.and needs to take action if it does. It mayinvolve a simple audio alarm on approach orexercising the brakes of a truck to prevent animminent collision.As part of designing the CAS application itis now possible to estimate the time requiredto execute one location awareness cycle andtrigger an alarm if required. The sequence inour example takes less than 30 milliseconds;hence the time constraint mentioned abovecan be easily met.All swarm radios share the same airinterface. The CAS application works in anentirely asynchronous fashion and packetcollisions may occur. Several location awarenesscycles instead of just one increase theprobability of a successful sequence. At thesame time traffic through the air interfacemust not exceed channel capacity. Broadcastingthe node ID together with a full rangingcycle takes about 2.2 milliseconds of theair time. This is just 0.1% of the 2.2 secondcycle time for the CAS application. As a ruleof thumb no more than 17% of the availableairtime should be used as a good trade-offbetween success rate and throughput. Thisis important when scaling the application byadding more swarm radios.In real swarm applications safety zonescould be designed to be dynamicallyadjusted to the actual speed of the moving object and the lastmeasured distance on a potential collision course. This waythe total number of alarms can be minimized and the numberof swam radios that can be used in the system before channelsaturation occurs,can be maximized.Nanotron’sswarm platform iswell-suited to buildgeolocation applicationsquickly.Swarm radios arelocation awaresince they areable to measuredistances amongstthemselves and exchangethe results.Range, rangingaccuracy, latencyand throughput areimportant designcriteria for geolocationapplicationsbased on theswarm platform.38 Electronic Engineering Times Europe July/August 2013 www.electronics-eetimes.com

Global navigation satellite system enginesupports fully concurrent GLONASS, GPS, QZSS and SBASCSR has debuted the SiRFstarV 5e, a Global Navigation Satellite System (GNSS)engine optimised to enable highly accurate location positioning for devices includingmobile phones, cameras, and health and fitness products. By supporting fullyconcurrent GLONASS, GPS, QZSS and SBAS from ROM, the highest accuracyand fastest time-to-first-fix (TTFF) are ensured. Wireless solutions specialist TelitCommunications plc will be using the device for its Jupiter SE868-V2 module,which was launched at CTIA Wireless 2013 in Las Vegas. The 11x11mm QFNpackaged receiver module integrates 5e, TCXO, SAW and RTC oscillator into asmall convenient package, accelerating time-to-market and reducing productdevelopment risks. SiRFstarV 5e offers a range of features to increase accuracy,improve time to first fix and preserve battery power to enable a better user experience.These include InstantFix Extended Ephemeris (EE) with autonomouslyforward predicting EE for three days locally. The GNSS chip can connect directlyto a Lithium battery supply, enabling system cost reduction and increased powerefficiency.CSRwww.csr.comTelematics test platform addresses in-vehicle testingWith cars increasingly incorporating telematics functions and features, testing oftelematics devices becomes an issue for OEMs and tier ones. RF testing expert companyIZT GmbH has developed IZT RecPlay, a platform for RF receiver design validationof analog and digital radio, video and global navigation satellite systems. Theplatform features a portable monitoring RF recorder for mobileand telematics applications for accurate phase-synchronousrecording of diversity signals from multiple antennas. Customersbenefit from the lightweight Recorder with a 30-cmhigh-resolution touch screen as a turnkey solution for invehicletesting. The integrated GPS receiver serves as a highlyrobust time and location reference. RecPlay’s signal generatorIZT S1000 combines 31 virtual signal generators in a single platform for testing radioreceiver and for creating complex mixed signal RF scenarios. The system receives, records,and replays up to 20 MHz bandwidth in a frequency range from 9 kHz to 3000MHz. It supports practically all radio broadcast standards.IZTwww.izt-labs.de/en/home/GPS tracking module takes less than 29sfor cold-start time to first fixSkyTraq Technology’s next generation Venus 8 platformsupports GPS, GLONASS, Beidou2, Galileo,QZSS, and SBAS, doubling the search engine capabilityand reducing more than half the power consumption from its previous generation.The Venus 8 integrates high performance GNSS signal-processing engine,low-power 32-bit RISC, IEEE-754 compliant FPU, cache memory, real-time clock,backup RAM, LDO regulator, switching regulator, GPIO, UART, SPI, I2C, ADC andall the necessary program ROM and data RAM on-chip for direct PVT solutionwith NMEA output in stand-alone GNSS applications. Using high-performancesearch engine and track engine architecture, the Venus 8 is capable of acquiringand tracking 167 satellites simultaneously, achieving fastest signal acquisition andTTFF in the industry, according to the manufacturer. It achieves cold-start TTFFof less than 29 seconds and hot-start time of 1 second. Having -165dBm trackingand -160dBm reacquisition sensitivity, the module allows continuous navigation innearly all environments. It draws 6mA under continuous navigation and comes in a5x5mm QFN40 package.SkyTraq Technologywww.skytraq.com.twPICO for AC-DCPower FactorCorrectedModules85 to 265VRMS,47-440 HzNew800HzInputFor FrequencyDesignsConsultFactoryto 2000 Wattsaccepts threeor singlephase inputFull BrickModel HPHA1, HPHA2Full Brick Model PHA 1250/500 WattsHalfBrickModel HPHA1• Universal AC Input, 85-250 VAC• Operates from 47-440Hz Input Frequency• 0.99 Power Factor• Use with PICO’s DC-DC Converters from3.3 to 5000VDC out, or otherDC-DC Converters• Meets EN61000-3-2 for Low HarmonicDistortion• Thermal Protection200 WattsOne Module for IsolatedPower Factor CorrectedAC-DC Applications• Universal 85-265 input 5 to 48VDC Isolated Regulated• Outputs to 200 Watts• Full Brick (UAC Series)INDUSTRIAL• Universal Input• Single and Dual Outputs 20 & 50 WattsNew 300 Watt Power Factor CorrectedOPTIONS • 20 0 C/-40 0 C Operating Temp.Selected Environmental Screening Per Mil-Std 883PICO Electronics, Inc.143 Sparks Ave. Pelham, N.Y. 10803E Mail: info@picoelectronics.comwww.picoelectronics.comPico RepresentativesGermanyELBV/Electronische Bauelemente VertriebE mail: info@elbv.dePhone: 0049 (0)89 4602852Fax: 0049 (0)89 46205442EnglandGinsbury Electronics Ltd.E-mail: rbennett@ginsbury.co.ukPhone: 0044 1634 298900Fax: 0044 1634 290904www.electronics-eetimes.com Electronic Engineering Times Europe July/August 2013 39

Battery-free switch tag tracks open/close statusWireless, battery-less Sensors can now be embedded in productsto track open/close status with the new X1GLADIO passive switchfrom Farsens S.L. The battery free RFID switch is compatible withcommercial EPC C1G2 readers and communicates a unique IDand the associated switch status datawithout the need of battery supply onthe sensor tags. The tag comes in avariety of antenna designs and sizes toadapt its performance to the requiredapplication. The reading distance forthe battery-free pressure-sensor tag isaround 2.5m and it can be embedded in a wide variety of materialssuch as plastics or concrete. The device features one of three differentConnectors for users to connect their switch: a 2.00mm pitchSIL latched vertical pin header, a 2.00mm pitch male 1x2 headeror just the 1x2 header footprint (pitch 2.00mm). The X1GLADIO issuitable for use in applications where monitoring of open/closed orconnected/disconnected components is needed.Farsens S.L.www.farsens.comRadar chipset makes ADAS more affordableIn the automated driving scenarios of the future and in many othersafety-oriented advanced driver assistance systems (ADAS), Radaris one of the central sensor technologies. Chipmaker Freescale nowhas introduced a comprehensivesystem-level solution for automotiveRadar based advanceddriver assistance systems. Thenew Qorivva MPC577xK Microcontroller(MCU) and MRD200177 GHz Radar transceiver chipsetprovide the embedded technologynecessary for affordableRadar based ADAS solutions withfewer components, helping increase the adoption of such features inmainstream vehicles. The Qorivva MPC577xK MCU, built on PowerArchitecture technology, provides high-level digital and analog integrationin a single-chip solution for Radar applications, removing up tofour additional major printed circuit board (PCB) components andreducing system-level cost, PCB space and software complexity. TheMCU also provides high performance for intense computational taskswith key integrated digital accelerators and features a state-of-the-artsignal processing toolbox that contains all of the hardware modulesrequired for processing sampled signals from short-, medium- andlong-range Radar applications. Performance data from the EuropeanNew Car Assessment Programme (Euro NCAP) suggests that safetysystems, such as Autonomous Emergency Braking (AEB), can reduceaccidents by up to 27% and can lead to a considerable reduction inroad injuries. Euro NCAP plans to incorporate the AEB assessmentfor cars sold in Europe into its five star rating scheme beginning 2014.Using Freescale’s new Radar transceiver chipset, automakers canimplement long-range and mid-range frontal Radar for adaptive cruisecontrol and autonomous emergency braking systems, as well as manageblind spot and side-impact detection – all through a single, scalable,multi-channel solution. Designers can pair the Radar transceiverchipset with the Qorivva MCU to achieve a total system solution forboth low-end and high-end Radar modules.Freescalewww.freescale.com50mm diameter ring type encoderfor dial-type controlsAlps Electric Europe has developed the “EC50A Series”ring type encoder for use in controls for car air conditioningand audio systems or major home appliances.Dial-type devices have oftenbeen used in the past for carair conditioning and audiosystem controls. Thesedevices are often designedto enable embedding of acontrol switch or a small LCDin the center of the dial. But design freedom cannot beenhanced without widening the device’s inside diameter(central opening). Space around the control panel islimited, hence, opening up the inner diameter is one wayto make some room for an extra switch, LEDs or a smallLCD, while retaining the same external dimensions. TheEC50A Series is claimed to be the industry’s first 50mmring type encoder, with a large 37mm inside diameterthat provides a central opening around twice as large asAlps’ earlier product. The EC50A Series also has a guideformed on the inner wall to reduce rattle when the customerattaches a knob. Furthermore, original mechanicaldesign and precision processing technologies were appliedto achieve a premium operating feel.ALPS Electricwww.alps.com350mW GaN on silicon LEDs operatefrom 350mA to 2A in pulse applicationsPlessey has announced that samples of samples of itsPLB010350 350-mW LED products are now available.The entry level lighting devicess are manufactured onPlessey’s 6-inch MAGIC (Manufactured on GaN I/C)line at its Plymouth, England facility. The new LEDproducts are aimed at a variety of solid state lightingand entertainment-type lighting products includingaccent lighting, wall washing, wall grazing, striplightingand a variety of pulse lighting applications.Barry Dennington, Plessey’s COO, said: “The MAGICLED product range is expanding in both light outputand efficacy. The PLB010350 is our first, high currentdevice operating at anywhere from 350 mA throughto 2 A in pulse applications. We have also been ableto demonstrate the versatility and the potential of thePlessey GaN on Si technology by constructing anLED with a relatively large die area. This new 350 mWproduct demonstrates the inherent flexibility we havefor the manufacture of LEDs with a 6-inch GaN onsilicon substrate in an integrated circuit manufacturingline. We are seeing continual improvements in outputefficiencies in the lab which means we will continue tolaunch new products in line with our product releaseplan.” The use of Plessey’s MAGIC GaN line usingstandard semiconductor manufacturing processingprovides yield entitlements of greater than 95% andfast processing times providing a cost advantage comparedwith standard LEDs of similar quality.Plesseywww.plesseysemiconductors.com40 Electronic Engineering Times Europe July/August 2013 www.electronics-eetimes.com

Smart-meter SoC supports Meters-and-Moreopen communication standardSTMicroelectronics has announced a smart-meter IC with builtinsupport for the Meters-and-More open communication standard,which enables widespread interoperability among smartmetering equipment usingPower Line Communication(PLC). The ST75MM is claimedto be the first to embed hardwareand communication protocolsupport for Meters-and-More, simplifying meter designto ultimately enable faster,lower-cost and reliable deployments.The IC enables designers to benefit from the protocol’sstrong features for smart meter and advanced metering infrastructureapplications, such as short messages, robust encryptionand authentication features, support for network configurationand management, and retransmission management. Firstsamples of the ST75MM, in the 7x7mm QFN 48 package, willbe available to selected customers by October 2013.STMicroelectronicswww.st.comLong-range RFIC platform has a range of upto 15km for M2M deploymentsWith a range of up to 15km, the SX1272 RFIC from Semtechenables metering, control and sensor applications. Thisdevice integrates Semtech’s new LoRa (long range) modulationtechnology to enabledrastic range improvementsover alternativemodulation methods. Incomparison, the maximumdistance today of asmart meter transceiverin Europe using FSKmodulation is betweenone and two kilometers.The additional range provided by LoRa will eliminatethe need for repeaters in these applications, significantlysimplifying the system design and lowering the total costof deployment. The range extension provided by LoRa alsomakes the device suitable for emerging smart city, Internetof things (IOT) and machine-to-machine (M2M) applications.The SX1272 achieves receiver sensitivity up to -137 dBmusing a low-cost crystal. This compares to today’s stateof-the-artFSK devices that can achieve sensitivity of -115dBm with a comparable crystal or -125 using an expensivetemperature controlled crystal oscillator (TCXO). Additionally,the SX1272 has a 25 dB improvement over FSK devices forrejecting in-band interfering signals. The SX1272 supportsGFSK, FSK, GMSK, and OOK modulation in addition to LoRaand is designed to support WMBus, IEEE 802.15.4g (SUN),FCC 15.247, ARIB T96/108, EN 300-220 as well as otherworldwide standards and regulations. Operating from a 1.8to 3.7V supply range, the SX1272 draws 9.7 or 10.8mA forthe receiver, 28mA for the transceiver at +13dBm, and has asleep current of 100nA. It supports bit rates up to 300 kbps.Semtechwww.semtech.comPCB terminations enable flexible powerdistribution in lighting and control systemsHarting’s new Han-Fast Lock PCB termination systemprovides simple solder-free push-fit single-wire connectionto printed-circuit boards, greatly enhancing the easeand flexibility of powerdistribution for entertainmentequipment such aslighting dimmers, PowerSupplies and winch/hoistmotor controllers. Powerlineterminations can nowbe taken from any pointon the printed-circuitboard without the need fortracks to be extended toone specific connectionarea. As a result, costsare reduced because ofthe simplified design andsavings in real estate. Thisapproach also eliminatesthe possibility of concentrated “hot spots” and thereforeallows higher currents to be handled. The easy “push/click”Han-Fast Lock PCB termination fits securely in the standardplated-through hole with pad and can handle up to 60A for discrete wire stranded conductors from 4 to 10 mm 2 .Undamaged contacts can be extracted and re-fitted up toten times, simplifying equipment maintenance. In addition,during the production assembly process the connection forthe external power wiring can be done after the soldering ofthe sensitive electronic components.Hartingwww.harting.com125°C, ROHS compliant multilayeredpolymer capacitorsCornell Dubilier’s Type CS multilayered polymer capacitors aredesigned for 125 °C applications with 6/6 ROHS compliance.Terminated with multiple pin connections, Type CS capacitorshave low equivalent series resistance making them an excellentchoice for switching power supplies, DC to DC Converters andother high ripple current applications. Available in capacitancevalues ranging from 2.0 µF to 10.0 µF, voltage ratings of 50, 100,250, 400 and 500 Vdc, and current ratings up to 18A rms, TypeCS capacitors cover a broad range of applications in powerelectronics where high capacitance and high current are neededfor DC filtering. Type CS capacitors have multiple pin leads, upto 18 on the larger sizes, and UL94V-O rated epoxy exterior withthe ability to pass 85 °C/ 85% RH requirements for demandingapplications in military vehicles and aerospace.Cornell Dubilierwww.cde.comwww.electronics-eetimes.com Electronic Engineering Times Europe July/August 2013 41

Optical jack sockets offer immunityto signal noiseCliff Electronics’ optical jacks are virtually unaffected by electricalnoise when transmitting and receiving digital signals. Sevendifferent models are available that conform to the EIAJ/JEITArectangular standard CP-1210 andalso RC-5720 and JIS C5974-1993F05 standards for digital audiointerfaces including fibre-optic interconnections.Matching mouldedoptical lead assemblies are alsoavailable for use with all them. Theoptical jacks operate with a supplyvoltage of -0.5 to 7.0V maximum,they take an input voltage of -0.5to +0.5V maximum and operate in the -20 to +70ºC temperaturerange. Insertion force is 5.9N minimum to 39.2N maximum,withdrawal force is 5.9N minimum to 39.3N maximum. Bodymaterial is PBT +30G, ABS 94-V-O (depending on model) withthe shutter made from nylon PA66. The optical jacks are availableas single or dual optical transmitter/receiver versions withright-angle PCB mounting and a self-tapping screw hole forpanel mounting. Removable and hinged and hinged shuttercovers are available depending on individual connector type.Cliff Electronicswww.cliffuk.co.ukTransmissive optical sensorstarget encoder applicationsVishay Intertechnology introduced two new AEC-Q101-qualified surface-mount transmissive optical Sensors forautomotive and industrial applications. Designed for harshlow- and high-temperature environments, the single-channelTCPT1350X01 and dualchannelTCUT1350X01feature a wide operatingtemperature rangeof -40 °C to +125 °C.The TCPT1350X01 andTCUT1350X01 can beused as position Sensorsfor encoders in high-temperatureenvironments close to motors, in addition to ignitionlocks and adaptive headlights. Both sensors can detectmotion and speed. With dual channels, the TCUT1350X01can also be used to detect direction in applications such aselectronic power steering (EPS) systems.The single-channel TCPT1350X01 includes an infraredemitter and phototransistor detector located face-tofacein a surface-mount package while the dual-channelTCUT1350X01 includes an infrared emitter and two phototransistordetectors. Both sensors have a phototransistoroutput and an aperture of 0.3 mm, and each operatesat a wavelength of 950 nm. The sensors feature compactdimensions of 5.5x4x4mm and offer typical output current of1.6mA. With a 3.0 mm gap width, the devices can be usedwith a wide variety of materials and allow for looser mechanicaltolerances than sensors with smaller gaps, making themsuitable for automotive and industrial applications.Vishay Intertechnologywww.vishay.comLED driver features internal PWM generatorto offer dimmer benefitsThe LT3955 is a DC/DC converter designed to operate as aconstant-current source and constant-voltage regulator withan internal 3.5A switch. The device’s internal PWM dimminggenerator makes it ideal for drivinghigh current LEDs, and it alsohas features suitable for chargingbatteries and supercapacitors.The LT3955’s 4.5 V to 60 V inputvoltage range suits a wide varietyof applications, including automotive,industrial and architectural lighting. The LT3955 usesan internal 3.5 A, 80 V N-channel MOSFET and can driveup to twelve 300 mA white LEDs from a nominal 12 V input,delivering in excess of 20 watts. The device incorporates ahigh-side current sense, enabling use in boost mode, buckmode, buck-boost mode or SEPIC topologies. The LT3955can deliver efficiencies of more than 94% in the boost topology,eliminating the need for external heat sinking. A frequencyadjust pin permits the user to program the frequencybetween 100 kHz and 1 MHz, optimizing efficiency whileminimizing external component size and cost. Combinedwith a 5 mm x 6 mm QFN package, the LT3955 offers acompact high power LED Driver solution. The LT3955 has aninternal PWM generator that delivers dimming ratios as highas 25:1 or it can utilize an external PWM signal, deliveringdimming ratios of up to 3,000:1.Linear Technologywww.linear.comSelf-powered DC panel mount voltmeter suitsbattery monitoringMurata’s DMR20-10-DCM “nanoMeter” is a self-powered autorangingDC voltmeter designed for mounting in an industrystandard“oiltight” 30 and 30.5mm round panel cutout. Occupyingminimal space, the roundvoltmeter has a 7.6mm fourdigitLED display and is selfpowered.Connection to the + 6to + 75 VDC supply to be monitoredis all that is required for fulloperation. No additional componentsor separate Power Supplyis required for the DMR20, making it extremely easy to add intovirtually any equipment using a DC supply or batteries. A userconfigurable jumper provides voltage display to a fixed 0.1 Vresolution (input + 6 to + 75 VDC) or to a 0.01 V resolution whenthe input is below + 51 VDC. With its low power consumption,typically less than 7mA, the DMR20 voltmeter is ideal for use ina broad range of battery-powered applications, battery chargersand renewal energy equipment. The voltmeter is packaged in arugged plastic housing that has been designed to provide protectionto IP67 / NEMA 6 specifications for water ingress. It issupplied with a EPDM rubber gasket and plastic hex nut readyto mount in the industry standard panel cutout. The voltmeter isprotected against reverse polarity to a maximum of 100 VDC. Aself-resetting internal fuse also provides long-term reliability andprotection. The DMR20 can operate from – 25 to + 60ºC.Muratawww.murata.eu42 Electronic Engineering Times Europe July/August 2013 www.electronics-eetimes.com

Quad-core PXI embedded controller comeswith dual BIOS backupThe PXI-3980 is Adlink’s first quad-core PXI embedded controllerfeaturing the high-performance Intel Core i7-2715QE2.1 GHz processor, with up to 16 GB of 1333 MHz DDR3memory, for seamless execution inmultitasking environments and reducedtest times. The PXI-3980 features dualBIOS backup, conserving maintenancecosts, multiple interfaces for connectingand controlling a wide variety ofstandalone instruments, user-friendly access design foreasy maintenance, and support for hybrid PXI-based testingsystem control. The PXI-3980’s innovative structure delivershigh availability in reliable testing systems. In the event of amain BIOS crash, the secondary BIOS can boot the systemand recover the main BIOS, reducing maintenance costs andefforts. Easy maintenance makes battery, storage device,and SODIMM modules swap-out easier than ever. In addition,solid metal case elements protect electrical componentsand enhance electromagnetic compatibility. Multiple Interfacechoices are available for connecting and controlling a widevariety of standalone instruments, including two display portssupports for VGA + DVI, dual GbE ports, GBIP, and triggerI/O for advanced PXI trigger functions. The PXI-3980 alsoincludes four USB 2.0 ports and dual hi-speed USB 3.0 portsfor connection to storage, easily accessing data from systemcontrollers with limited built-in data storage size, and securingdata with no storage damage issues.Adlink Technologywww.adlinktech.comWiFi-enabled thermocouple data loggingsensor connects to the cloudCorintech has launched the EL-WiFi-TC, a battery-poweredWiFi-enabled thermocouple data logging sensor that measuresthe temperature of the environment in which the probe is situatedand then transmits data via WiFito a PC or the company’s EasyLogCloud (to be released soon). As withother models within the company’sWiFi EasyLog range, the EL-WiFi-TCworks with any existing WiFi network.Users only need to download the free PC software applicationfrom www.corintech.com/support to configure the sensor andstart temperature monitoring. During configuration, the sensorwill search for an existing wireless network whilst physicallyconnected to the PC. It can then be placed anywhere withinrange of the network. If the sensor temporarily loses connectivitywith the network, it will log readings until it is able to communicateagain with the PC application or cloud service. Loggeddata is also retained if the battery goes flat, so all data is secureeven in unforeseen circumstances. This system allows the userto remotely view and analyse multiple sensors, immediatelygraph historic data, reconfigure settings and set alarms. Otherproduct features include a temperature measurement range of-270°C to +1300°C, maximum and minimum readings, high andlow alarms, rechargeable internal lithium battery and an auditfunction. It is supplied with a K type probe.Corintechwww.corintech.comArduino-based development kits for M2M appsinclude GSM chip and M2M SIM cardDeutsche Telekom is officially launching its M2M developmentkits for programmers looking to develop cloud-based machineto-machineapplications. The development kits consist of anArduino or a Cinterion board with aGSM chip, a SIM card, and accessto the M2M Developer Platform. Thelaunch will coincide with the relaunchof the M2M Developer Community(www.developergarden.com/m2m), aportal for developing M2M products,solutions, and services. The portal also offers a proceduralmodel illustrating steps during the development of M2M applications- from initial idea, requirements analysis and designto marketing. The M2M DevStarter developer kit bundles all thetools required to get started with machine-to-machine communication.It comes with either an Arduino board or the CinterionEGS5 kit that is designed for developing prototypes in industrialscenarios. Developers who already have the hardware requiredcan order the M2M DevFlex kit. All sets include a SIM cardcomplete with a six-month M2M data tariff and private accessto the cloud-based M2M Developer Platform. The platform issupplied by Deutsche Telekom in cooperation with cloud specialistCumulocity GmbH. Since December 2012, M2M DevFreeaccess has provided a taster of what lies ahead. On a publicand shared level, programmers can test the M2M Developerplatform free of charge, integrating up to ten devices.Deutsche Telekomhttp://m2m.telekom.com3U VPX graphics card uses AMD’s 480-coreEmbedded Radeon GPUKontron has launched a 3U VPX graphics card with AMDEmbedded Radeon E6760 GPU, designed to meet the latestdemands in avionics and military technology. With its 480computing cores, the OpenVPXcompliantVX3327 delivers a paralleldata processing performance of upto 576 GFLOPs. Equipped with thisprocessing power, board is optimizedfor compute-intense GeneralPurpose Graphics Processing Unit (GPGPU) applicationsdeployed in avionics and military technology which requiresuperior situational awareness. Size, Weight, Power andCooling (SWAP-C) critical applications benefit from theboard’s light weight construction, along with minimal powerconsumption of just 35 watts, plus conduction cooling -withstanding extreme temperatures of -40°C to +85°C. Additionally,the board supports real-time graphic data transmissionof up to three independently controlled displays,so that users can extend their field of vision across threehigh-performance screens. For the new VPX graphics card,application areas are to be found predominantly in the field ofHigh Performance Embedded Computing (HPEC). The VPXgraphics card is available either in air-cooled (0°C to +55°C)one inch (5HP) or in conduction-cooled (-40°C to +85°C) 0.8inch (4HP) variants. It supports the operating systems Linux,Windows and VxWorks.Kontronwww.kontron.comwww.electronics-eetimes.com Electronic Engineering Times Europe July/August 2013 43

3.5x3.55mm SMT side actuated switchtakes up to 100,000 cyclesThe new SMT side actuated switch series developed byC&K components increases operating life while reducingthe footprint. The PTS 840 Series switch is available withfront PIP leads that deliverstrong shear resistance andhigher reliability than othertechnologies. Combiningsmall size, an extendedlife span of up to 100,000cycles, and an optional ESDpin, the robust PTS 840Series switch is suitable forinclusion in a variety of systems where PCB space is limited,including nomad devices, remote controls, personal healthdiagnostic systems, and consumer electronics applications.The SMT side actuated switch measures a slim 3.5x3.55mmwith a travel path of 0.2mm + 0.2mm / -0.1mm. The momentaryaction of PTS 840 Series switch with J-, G-, andfront PIP-type terminals can withstand contact resistancesof under 500mohms and insulation resistances of over100mohms. Through the use of two-shot moulding, paint andlaser etch, pad printing, and plating processes, the switchesare designed to stand out. The PTS 840 Series switchesexhibit a bounce time of less than 10ms and an operatingtemperature of -40ºC to 85ºC.C&K Componentswww.ck-components.com12.7mm diameter slotless brushless DC motordelivers up to 0.0064NmThe BI-05 Series slotless brushless DC motor was designedby Pittman Motors for maximum precision and performancein a package size perfectly suited for precision equipmentsuch as surgical anddental tools. The BI-05was developed withstringent design criteriaas the focal point. Itsslotless motor designeliminates the magneticcogging typicallyfound in conventionallywound “slotted” brushlessDC motors. The stator teeth are completely eliminated byforming and encapsulating the entire stator winding along theinside surface of the back iron. The result is zero detent torque,low inductance and extremely fast response rates. The BI-05motor body has a 12.7mm diameter and is capable of no-loadspeeds of up to 60,000 RPM. The miniature motor is rated for acontinuous output torque rating of up to 0.0064Nm. The overallmotor construction is a combination of 17-4, 300, and 400series stainless steels, the 4-pole rotor is built using high-energyneodymium magnets, and an internal circuit board supports hallsensor feedback spaced at 120 electrical degrees. Other standardfeatures include shielded ball bearings and a tight rotorbalancing spec for smooth and quiet operation at high speeds.An autoclavable version of the BI-05 also is available.Pittman Motorswww.Pittman-Motors.comNFC transponder hardware simplifies Bluetoothand Wi-Fi pairingTexas Instruments’ Dynamic NFC Transponder RF430CL330Hhardware enables uncomplicated and inexpensive wireless setup. The low cost kit brings a secure, simplified pairing processfor Bluetooth and Wi-Fi connectionsto products, such as printers, speakers,headsets, and remote controls,as well as computer peripherals.Designed specifically for NFC connectionhandover and service Interfacefunctions, the kit includes hostdiagnostics and software upgrades.The company also announced itsNFCLink software firmware library,developed in partnership with Stollman E+V GmbH and KroneggerGmbH to streamlining NFC development across TI’s entireembedded processing portfolio. The Dynamic NFC TransponderRF430CL330H combines a wireless NFC Interface and wiredSPI/I2C Interface to connect the device to a host (classifiedas an NFC tag type 4 device). The data content is then shifteddynamically from the host into the RF430CL330H’s SRAM andcan then be transferred over the NFC interface. The transpondersupports data rates up to 848 KBs per second for RF datatransfer (over-the-air firmware updates). It incorporates an ISO14443B-compliant RF interface, allowing wireless access ofNDEF messages. The host wakeup capability in an RF fieldmaximizes battery life.Texas Instrumentswww.ti.comQuad-core HSPA+ processor with 5G WiFi,NFC, GPS and indoor positioningBroadcom Corporation has announced a quad-core HSPA+processor designed for high-performance, entry-level smartphones.The BCM23550 is the company’s latest smartphoneplatform optimized for the Android 4.2 Jelly Bean operatingsystem (OS). According to research firm International DataCorporation (IDC), the first quarter of 2013 marked the firsttime that smartphones comprised more than half of all phonesshipped globally. This growth is driven by mass market consumerswho demand affordable devices that deliver increasedfunctionality and a level of performance that was previouslyavailable only in higher-end superphones. The BCM23550,and its turnkey design, are powered by a quad-core processorrunning at 1.2 GHz, VideoCore multimedia and an integratedHSPA+ cellular baseband that provides enhanced, powerefficientfeatures for entry-level smartphones. The BCM23550supports “dual HD,” allowing users to simultaneously sharehigh-definition content from a small handheld screen to alarger, Miracast-enabled display. It includes leading VideoCoretechnology for fluid, responsive graphics and incorporatesPower Management techniques to optimize battery life andreduce power consumption without compromising the userexperience. The platform provides an integrated Image SignalProcessor (ISP) that supports up to 12-megapixel Sensorswith advanced imaging capabilities such as blink and smiledetection, face tracking, red eye reduction, fast shot to shot(burst capture), zero shutter lag, and best picture selection.Broadcom Corporationwww.broadcom.com44 Electronic Engineering Times Europe July/August 2013 www.electronics-eetimes.com

Industrial 3D-sensor supports shapescanning and 3D data recordsThe EyeVision image processing software by EVT now alsosupports the new 3D-sensor EyeScan VR 3D. The sensorbased on digital stripe light projection, that supplies readycalculated3D data recordsfor industrial image processing,is also equipped withthe complete command setof the EyeVision softwareand the newly developed3D-commands. Stripe projection,image recording and generation of the point cloudare performed in an integrated manner based on an intelligentcamera. The projector from Texas Instruments and theca-mera are synchronized with a frequency of 60 Hz. TheEyeScan VR 3D outputs the recorded 3D data directly as apoint cloud or a grayscale-coded range map to the evaluationcomputer and can be integrated in industrial installationsvia the Industrial Ethernet interface. Commands applicationssuch as Bin-Picking, 3D-Matching and robot guidance canbe programmed easily. The EyeScan VR 3D features a robustmetal housing with IP65 protection, screw-type standard industrialconnectors, a 24V connection, an Ethernet Interfaceas well as hardware and software triggers.Eye Vision Technologywww.evt-web.comData acquisition tool for Linux supports digitizer,waveform generator and digital I/O cardsThe sixth generation of the SBench 6 Data Acquisition softwarefrom Strategic Test is available for both Windows or Linux users.SBench continues to support all of the companies PCI Express,PCI, PXI and CompactPCIdigitizer, waveform generatorand High-Speed digitalI/O cards, some 300 variantsin total. The Base version ofSbench 6 is supplied at nocostwith each UltraFast card.In addition, a fully functionaldemo version of the Professional Version with a limited runtime is also included. The software is also able to run simulateddemo cards to allow full software test even without hardware.For applications that require more features, the SBench 6Professional version is available for 1190 Euro. Key features ofthe Professional version include fast Data Acquisition supportingRAID disk arrays, with the capability to acquire and handleGBytes of data. The tool can display analog data, digital dataand frequency spectrum. It has integrated analysis functions,an import and export filter, enhanced cursor functions, state-ofthe-artdrag-and-drop technology and a thread-based programstructure. The software is able to measure in Oscilloscope modeas well as long time transient recording mode (streaming mode).A special feature of SBench 6 is the segmented view that allowsdisplay of segment based signals together with signals of a secondtimebase (ABA mode) as well as highly precise timestamps.Besides this SBench 6 data can be exported into ASCII, Waveand MATLAB.Strategic Test Corporationwww.strategic-test.comHigh efficiency power supplies reduce partscount by 80% in automotive applicationsRohm has announced the development of compact, high efficiencyPower Supplies designed to drive DDR memory, microcontrollers,and other components in car applications.The BD905xx series integratesa phase compensation circuitand feedback resistor, reducingthe number of externalparts considerably comparedwith conventional PowerSupply ICs. This simplifiesdesign load and contributes toend-product miniaturization.These Power Supplies use synchronous rectification for high efficiencyoperation, in combination with Light Load Mode, ensuringsuperior performance with low current consumption underall load conditions. The chips come in a HTSOP-J8 package,reducing volume by approximately 80% compared with conventionalproducts, claims the manufacturer. Loss is a 10th thelevel of conventional LDO regulators, resulting in minimal heatgeneration. This simplifies thermal countermeasures, making itsuitable for Microcontrollers and DDR memory used in today’svehicles that require greater current consumption. Synchronousrectification, coupled with Light Load Mode, results in over90% efficiency under all load conditions for minimal currentconsumption. Rohm offers models in different output voltagesand currents designed for various automotive systems (1.2V forMicrocontroller cores, 1.5V and 1.8V for DDR memory).ROHM Semiconductorwww.rohm.com/euAutomotive hub controller ICs now in7x7x1.0mm 48-pin QFN packageSeiko Epson has begun shipping a new addition to itsS2R72A4 series USB hub controller ICs for automotive applications.The series, which is engineered to operate in a temperaturerange from -40to 105ºC, now includes a48-pin QFN package measuringonly 7x7x1.0mm.The convenience of USBports is making them apopular choice for automotiveequipment such ascar navigation systems.Epson’s USB hub controllersfor automotive applicationsmeet the rigorous quality required by the automotiveindustry and support stable communications even with longUSB cables. The chip has one upstream port and four downstreamports (2 High-Speed ports and 2 full-speed ports).The upstream port is locked in USB full-speed mode and canbe used as a USB full-speed hub (USB High-Speed nonsupportedhub). It can also be locked into USB full-speedeven if the destination host supports USB high-speed, whichis effective in improving EMI/EMC performance and reducingpower consumption. The device operates from LVDD: 1.8 V(internal) HVDD: 3.3 V (USB unit).Epson Europe Electronicswww.epson-electronics.dewww.electronics-eetimes.com Electronic Engineering Times Europe July/August 2013 45

ARM Cortex M3-based MCU combines 258 kB ofSRAM and 1 MByte of ROMToshiba Electronics Europe’s TMPM36BF10FG is a new ARMCortex M3-based Microcontroller that combines large capacitymemory with a rangeof serial interfaces,integrating measurementand communication systemsinto a single chip.The TMPM36BF10FGcomes equipped with258 kByte of SRAM and1 MByte of ROM and iswell suited for controllingcomplex systemsthat involve largesoftware and data sets. Featuring an optimised circuit design,the TX03 series Microcontroller consumes just two thirds of thepower of equivalent products, claims the manufacturer. TheMicrocontroller is pin-compatible with TMPM36BFYFG, whichwill have a lower memory capacity and is scheduled to startmass production in November 2013.Toshiba Electronics Europewww.toshiba-components.comClearSource LED emitters enable precisionsensing and detectionOptoelectronics technology company OMC has introduceda range of solid-state emitters that use a new die bondingtechnique to connect the LED chip electronically to the leadframe,eliminating ‘dark spots’ and improving beam precision.Standard LED optical Sensors use a top-mounting wirebond to connect the LED chip to the anode or cathode. Thebond wire obstructs the light output, giving rise to dark spotsand patches in thebeam which makesprecise sensingand detection moredifficult. In OMC’snew ClearSourceseries, the wire isbonded to the sideof the chip, leavingthe output beamunobstructed. This produces a defined light beam whichenables high-accuracy sensing and detection. For evengreater precision measurements that require near-parallellight emission, lenses can be incorporated. Additionally, thisdie-bond configuration reduces capacitive effects within thediode, enhancing switching speed and reliability. Accordingto OMC, ClearSource emitters also benefit from LED technology’sinherent high reliability and long lifetime. The deviceshave a low sensitivity to ESD, and are suitable for a widerange of applications including encoders, Linear positioning,line and edge sensing, medical equipment, fibre opticsystems, machine vision, optical switching, distance andrange finding. Devices are available with standard aperturesfor 650nm and 850nm LEDs with ball-type narrow beam, flat,dome, or drip encapsulation lensing options.OMCwww.omc-uk.comWin one of three FiND-iTkits with RFID label tagsJointly released by the RFID Journal,Microelectronics Technology (MTI) and Enso Detego, theFiND-iT is a PC and Android smartphone or tablet solutionthat enables users to associate passive ultrahigh-frequency(UHF) radio frequency identificationtags with items, as well ascreate inventory lists and findthose objects using an Androidsmartphone or tablet. This month,Enso Detego gives away threeFiND-iT kits for EETimes Europereaders to win, including one MTIRFID ME USB dongle reader,one MTI MINI ME RFID reader for Android hosts, a USB18-inch extension cable, a USB On-the-Go (OTG) Adaptercable, and 50 pre-encoded and serialized EPC Gen 2 RFIDlabel tags. When the UHF RFID tag is presented to the PCrunning the FiND-iT software and equipped with MTI’s USBdongle reader, the user can enter information about thatobject, including its name and location, along with otherattributes created by that individual. The Mini Me RFIDreader can be attached to any device capable of supportingAndroid hosts.Check the reader offer online atwww.electronics-eetimes.comReaderOfferBright LED matrix with on-board processorconnects to the Raspberry PiInternet of Things (IoT) manufacturer Ciseco has released the‘Pi-Lite’ LED display for the Raspberry Pi. The bright LED matrixhas an on-board processor, allowing Raspberry Pi users todisplay messages andgraphics by sendingsimple commands andtext strings to the serialport. The ‘Pi-Lite’ displayunit is a pre-builtplug & play module, butit can also operate instand-alone mode, andwhen combined withone of Ciseco’s radiomodules can even forma wireless display unit.The ‘Pi-Lite’ idea comes from the very popular Arduino Lots ofLEDs shield by Jimmy Rodgers and brings these capabilitiesto the Raspberry Pi user. The board features a 9x14 (126) redLED matrix (a white version will be available soon), an onboardArduino ATmega 328 processor allowing each pixel tobe individually addressed, and an on-board controller that canbe upgraded or reprogrammed using the standard OptiBootserial bootloader. The kit comes with Ciseco firmware that willscroll text, display bar graphs, VU meter, and address individualpixels.Cisecowww.ciseco.co.uk46 Electronic Engineering Times Europe July/August 2013 www.electronics-eetimes.com

All-metal front pushbutton range offersIK10 shock protection and IP67 sealingEAO has improved the Series 82 pushbutton range with a setof design upgrades to give it the edge over other metal pushbuttons.Series 82 has been re-engineered from the insideout for extra strength, versatilityand style. Featuring an all-metalfront, IK10 shock protection andIP67 sealing, it is now one of highestspecified pushbuttons on themarket. Even extreme temperaturefluctuations from -30 to +70°C and humidity up 85% will notaffect operation. Control panel designer can now get the lookand feel they desire through the wide choice of sizes, lensprofiles, illumination styles and finishes including 16, 19 and22.5mm diameter mounting-hole sizes, with dot or ring illumination,flat, raised or convex lens shapes and various finishesincluding stainless steel SUS 304 or chromed brass, goldcoloured or aluminium anodised. Series 82 is suitable forticket and vending machines, information terminals, accesscontrols and door entry systems. All component materialsadhere to RoHS and UL.EAOwww.eao.comSwitches cover DC to 6 GHZ for applicationsup to 50 through to 200 WKCB Solutions, an ITAR compliant and AS9100 certified microwavedesign and manufacturing center, has announced a suiteof SPST through SP6T switches designed to meet high powerhandlingrequirementsfrom 50 to 200 W. Theseswitches are availablein QFN-style packagesand thermally conductiveflange-mount packages.As an added feature, theyare shipped to order inyour choice of a variety offactory-configured ports.Designed and manufacturedwith PIN diode technology, they are 100 percent RF tested(small signal), have robust carrier construction, and are manufacturedwith thick deposition thin film traces. For power levelsup to 50 W, KCB offers these high power switches in surfacemount packages. They offer low-loss performance from DC to 6GHz and robust construction. To address the need for switchesthat can handle powers in excess of 50 W, KCB has developeda flanged-based package. By utilizing an AlN carrier with a CuWsub-mount, the construction of these products offers superiorheat spreading which allows for CW incident power levels up to200 W. This, coupled with larger minimum breakdown voltages,provides the designer with a switch that is ideally suited forhigher powered radios, Radar and counter IED systems. Thesemodels are available in configurations up to SP3T. KCB offersseveral off-the-shelf configurations as well as dozens of possibleconfigurations that can be quickly realized using off-theshelfcomponents. In addition, the designer can choose from amenu of diodes that provide optimal linearity for the application.KCB Solutionswww.kcbsolutions.comIsolated USB analog output modules supportup to eight continuous waveformsData Translation’s enhanced performance versions of itsDT9853 and DT9854 USB analog output modules come withfour or eight outputs with 16-bit resolution and can now alsoprovide continuous analog waveformstreaming at up to 8 kHz. ±300 Vgalvanic Isolation ensures safe operation,high signal integrity and excellentnoise performance even in harshindustrial environments. All modulesprovide voltage outputs (±10 V, 0-10V). The M versions have additional0-20 mA current outputs supportingan external excitation voltage supplyof 8-36 V. Key features include eightdigital inputs, eight digital outputs anda 32-bit counter/timer. The interrupton change function can be used onup to seven digital inputs to monitor and control critical signals.The analog output modules offer plug-and-play USB 2.0connectivity to PC. They run entirely on USB power so that noexternal Power Supply is needed. The rugged enclosure as wellas screw terminals for signal connections support industrialtesting, control loop and process control applications. A comprehensivesoftware package is included with the modules. Inaddition to Windows-compatible 32/64 bit drivers for WindowsSDK or .NET, the package also provides interfaces for LabVIEWand MATLAB.Data Translationwww.datatranslation.euTCXOs comes with stabilities to ±1 ppm incustom frequencies up to 250MHzFox Electronics now offers its XpressO TCXO with tighterstabilities in custom frequencies up to 250MHz. Availablewith ±1.5 ppm from -40 to +85°C as well as down to ±1ppm from 0°C to +70°C, theXpressO-TC HCMOS TCXOoscillators can be deliveredin ten working days or less.These new TCXOs are anexpansion to Fox’s FXTC-HE73 series that meets thehumidity, shock and vibrationrequirements of MIL-STD-202. They are suitable forapplications requiring very tight stability over temperatureand low jitter, including medical monitoring and measurement,telecommunications and networking as well as militarycommunications. Surpassing the typical 50 to 60MHzfrequency range of traditional TCXOs, the new XpressO-TCoscillators offer a significant performance advantage, sincecustom frequencies can be specified up to 250 MHz. Fox’sproprietary ASIC technology, with a 3rd order Delta SigmaModulator (DSM), enables XpressO oscillators to significantlyreduce noise to levels comparable with traditional bulk quartzand SAW oscillators. This ASIC family enables the selectionof output type, input voltages and temperature performancewithin the oscillator.Fox Electronicswww.foxonline.comwww.electronics-eetimes.com Electronic Engineering Times Europe July/August 2013 47

5W fixed-blade USB adaptertargets personal electronicsThe PSA05A introduced by Phihong is a low cost, 5W, fixedbladeUSB power Adapter for personal electronics. The USBwall plug Adapter is compliant with North American inputvoltages and has aLevel V efficiency compliantoutput of 5VDCand 1A, which is suitablefor small deviceswith touch screens,including smartphones,tablets, e-readers, GPSand media players.The Adapter is alsoavailable in EU, UK,and AU/Nz versions.The 5W USB Charger isequipped with overvoltageprotection,over-current protectionand short-circuitprotection. It has ano-load power draw of less than 0.03W. In addition to LevelV efficiency compliance, the wall plug also features a 5-Starstandby power rating, as well as safety approvals from ULand cUL.Phihongwww.phihong.comTransfer-moulded super-mini dual in-linepackage power module rated up to 35AMitsubishi Electric has announced the Ver.6 Series transfermouldedsuper-mini dual in-line package intelligent power module(DIPIPM), using a seventh-generation IGBT with a CSTBTstructure. Designed to reduce both power loss and the cost ofinverter drive systems for motors used in air conditioners andother small-capacity motor drive applications, the module isbuilt-in seventh-generation IGBT with CSTBT structure, whichreduces VCE(sat) by 15% compared with Mitsubishi Electric’sVer.5 series. The super-mini package has an extended currentrating ranging from 10A to 35A. It features bootstrap diodeswith built-in current limiting resistors. Short-circuit detectionaccuracy has been improved to +/-5%. Suitable for operation at600V, the units measure 24.0×38.0×3.5mm.Mitsubishi Electricwww.MitsubishiElectric.comHigh-precision 12-bit PCIe digitizer deliversmulti-GHz real-time processingAgilent Technologies’s U5303A is a compact dual-channel PCIedigitizer with 12-bit resolution, sampling up to 3.2 GS/s, andon-board real-time processing. The board has a DC-to-2 GHzbandwidth, features9.1 ENOB at 100MHz and a 58dBsignal-to-noiseratio together withvery high datatransferrates froman eight-lane PCIe2.0 interface. TheU5303A gives usersthe ability tointegrate advancedreal-time signalprocessing withinthe embeddedXilinx Virtex-6 fieldprogrammablegatearray. This is madepossible by the Agilent FPGA development kit for High-Speeddigitizers. This software kit provides interfaces that leverage thefull density and speed of the FPGA while ensuring the digitizer’soutstanding level of performance at multi-gigasamples persecond.Agilent Technologieswww.agilent.comVersatile RFID reader is optimisedfor a read range up to 2mThe Ha-VIS RF-R200 is the latest RFID reader in Harting’srange of auto-ID solutions, it is a mid-range unit optimisedfor read ranges up to 2m. The RF-R200 reader is availablein a number ofdifferent versionsto suit therequirements ofdiverse applications.Theseinclude a modelwith an RJ45Interface andPoE (Powerover Ethernet)capability, aunit with aUSB Interfacedesigned for office use, and a basic PCB module withouthousing for integration into machines or other products. Keyfeatures of the RF-R200 reader include 500 mW of transmitterpower, support for automatic transmission of the acquiredtransponder information to a computer, and support for anexternal antenna as well as the internal antenna with a readrange up to approximately 20 cm. The unit is sealed to IP30 requirements, and occupies a minimum footprint wheninstalled on a “top hat” rail in a switch cabinet.Hartingwww.harting.com48 Electronic Engineering Times Europe July/August 2013 www.electronics-eetimes.com

AUO 22” 1/3 cut TFT for every applicationBesides the common 4:3 format TFTs, Data Modul now offersAUO’s full product line up for wide format 16:10 displays. A new“stretch-format” also makes it possible to provide panels intonew applications where no suitable panel was available before.These new products are “cutpanels” meaning a display witha panel size of 55.9 cm (22”) iscut, creating a completely newTFT, the G190SF01 V0 whichis only a third of the originalpanel. This new TFT has aresolution of 1680 x 342 dots.A typical brightness of 300cd/m² is achieved through LED backlightsand already integrated LED drivers. The panel measures493.7x124.8x18.5mm and is suitable for all applications whereavailable space in terms of height is limited. Analog to this product,a ¼ CUT of a former 48.26 cm (19“) is available too.Data Modulwww.data-modul.comArrow to pilot expansion of e-Stewardselectronics recycling certificationArrow Electronics and the Basel Action Network (BAN) haveannounced a three-year agreement to certify all of Arrow’selectronics recycling and IT asset recovery operations worldwideto the e-Stewards standard. This will lead the programnot only across North America but also into Europe and LatinAmerica. Arrow will be the first global e-Stewards recyclertaking the program to all of its facilities in multiple continents.The certification covers nine processing facilities in the UnitedStates, six in Europe and one in Brazil. Arrow has chosento pursue e-Stewards certification as part of its global complianceprogram for value recovery that incorporates the bestpractices of today’s leading industry standards.Arrow Electronicswww.arrowvaluerecovery.comLow-cost module with single-chip LEDsComponent distributor Endrich Bauelemente Vertriebs GmbHhas started to design and build its own line of LED modules. Itsfirst product is a low-cost module with single-chip LEDs. TheE-104-MC3/6xx-F5 is available in two versions, with 3 and 6W,respectively. The new modulesare manufactured in collaborationwith manufacturing designand services company TurckDuotec GmbH. They canreplace the 3W and 6E variantsof Citizen’s LED CL-L104 sincethey have the same form factor and size. The E-104-MC3/6xx-F5 is available five color temperatures ranging from 2700K to5000K. As an example, the 3W 3000K version is supplied witha DC constant current of 350mW provides 104lm/w and 328lm.The 6W variant offers 650lm and an efficiency of 97lm/W; itrequires a current of 700mA. The Endrich module is equippedwith the Citizen CLL600, an LED for SMD installation, guaranteeinga long service life.Endrich Bauelemente Vertriebs GmbHwww.endrich.comNew kit turns Raspberry Pi boardsinto low-cost home media centresRaspberry Pi owners can now quickly and easily turn their Piinto a low-cost media centre for their home or office, with anew XBMC bundle from element14. One of a strong pipelineof Raspberry Pi solutions to belaunched this year, the XBMC bundleis available through Farnell element14in Europe. Containing all the additionalhardware and software necessaryto start using the device, the starterkit will allow users to stream content from devices on theirhome network through their Raspberry Pi, turning the screenor their TV into a media centre. The XBMC bundle includesan SD card pre-loaded with Raspbmc software, an opensource Linux distribution created by Sam Nazarko that bringsXbox Media Center (XBMC) to the Raspberry Pi.element14www.element14.com/raspberrypi“Prototype to Production”,the new Digi-Key trademarkDigi-Key has received registered trademarks for the phrases,“Prototype to Production®” and “From Prototype to Production®”in line with the company’s unique distribution model inthe electronic component industry.“Digi-Key’s leading-edge businessmodel is unique in its abilityand strength to support productfrom the design phase, throughnew product introduction runs andhigh-mix/low volume production,”said Digi-Key president, Mark Larson.The company’s “prototype to production” capabilities allowengineers to engage long-term with a go-to partner and maintaintheir engagement through production.Digi-Keywww.digikey.comRutronik24 sales conceptlaunched around the worldWith its new sales organisation “Rutronik24”, distributorRutronik Elektronische Bauelemente GmbH is now addressinga new customer base with average component requirements.Rutronik24 is based on thee-commerce-platform www.rutronik24.com. In addition, small and mediumsizedenterprises now have accessto the complete Rutronik portfolio aswell as additional services and support.Launched in Germany, Austriaand Switzerland at the beginning ofthe year, Rutronik24 activities have now been expandedto a global level. Customers across the world can now usethe Rutronik e-commerce platform www.rutronik24.com toaccess the broadliner’s product portfolio and structure theirprocurement processes more efficiently.Rutronikwww.rutronik.comwww.electronics-eetimes.com Electronic Engineering Times Europe July/August 2013 49

LAST WORDPublisherAndré Rousselot+32 27400053andre.rousselot@eetimes.beEditor-in-ChiefJulien Happich+33 153907865julien.happich@eetimes.beEDITORSNick Flaherty+44 7710236368nick.flaherty@eetimes.beChristoph Hammerschmidt+49 8944450209chammerschmidt@gmx.netCONTRIBUTING EDITORSPaul Buckley+44 1962866460paul@activewords.co.ukJean-Pierre Joosting+44 7800548133jean-pierre.joosting@eetimes.beCirculation & FinanceLuc Desimpelluc.desimpel@eetimes.beAdvertising Production &ReprintsLydia Gijsegomlydia.gijsegom@eetimes.beArt ManagerJean-Paul SpeliersAccountingRicardo Pinto FerreiraRegional AdvertisingRepresentativesContact information at:http://www.electronics-eetimes.com/en/about/sales-contacts.htmleuropeanbusiness pressEuropean Business Press SA7 Avenue Reine Astrid1310 La HulpeTel: +32 (0)2 740 00 50Fax: +32 (0)2 740 00 59www.electronics-eetimes.comVAT Registration: BE 461.357.437RPM: BrusselsCompany Number: 0461357437© 2013 E.B.P. SAELECTRONIC ENGINEERING TIMES EUROPE is published11 times in 2013 by European Business Press SA,7 Avenue Reine Astrid, 1310 La Hulpe, BelgiumTel: +32-2-740 00 50 Fax: +32-2-740 00 59email: info@eetimes.be. VAT Registration: BE 461.357.437.RPM: Nivelles. Volume 15, Issue 7 EE Times P 304128It is is free to qualified engineers and managers involved inengineering decisions – see:http://www.electronics-eetimes.com/subscribeCopyright 2013 by European Business Press SA.All rights reserved. P 304128Wearable computing:let’s get it onBy Rick MerrittI am convinced ultra-mobile wearablecomputers will be the next big thing, but itcould take a decade before the iPhone ofthis product class arrives. With Project Glass,Google is intentionally trying to leap ahead,creating a very public prototyping processthat is fascinating but by no means guaranteessuccess.Gordon Bell, an industry veteran investigatingthe field at Microsoft Research, helpedme crystalize my belief in wearables when Ichatted with him informally at a recent eventcelebrating the 40th anniversary of Ethernet.He told me facial recognition and medicalsensing are two killer apps for these products.Bell wore a mobile camera everywherehe went as part of his research program.“What I concluded is that [wearable computers]are a memory assistant,” and facialrecognition plays a key role in that job, he tolda group of us over lunch.Ironically, the Glass project manager atGoogle recently said the company currentlyhas no plans to use facial recognition. I suspectthat statement was motivated at least inpart by privacy concerns and in part by thestill nascent state of the technology.I believe tomorrow’s wearables will needto tap into highly accurate facial recognitionservices and find ways to overcome privacyconcerns about them.There’s hard technical work ahead makingfacial recognition of unconstrained populationsreally accurate - especially when thedata is gathered in the normal course of lifeusing consumer-grade cameras. Makingthe challenge even tougher, facial recognitionsystems must handle data sent overmainstream wireless networks, and thesesystems must respond in time to be useful tothe average users as they casually encounterother people.I can’t even begin to untangle themarketing and policy issues around facialrecognition. I know they are significant. LikeBell, I believe the app is killer for the productcategory. Wearables could also revolutionizehealthcare. Researchers at Belgium’sIMEC and elsewhere have been working onbody area networks for many years, makingstepwise advances. Today, Bell wears a Fitbitheart rate monitor. He also has invested inmultiple startups specializing in wearablehealth devices, including Bobo Analytics,Rick Merritt is Editor at large for EE Times -www.eetimes.comwhich makes a heart sensor worn like awristwatch.“I feel strongly you have to get healthcareout of the hands of people like cardiologists,”he told me.He and others see a future where peopleare continuously monitored. Cloud servicesanalyze and track the data, reporting andhopefully anticipating problems.Here again, there are technical and market/policyissues. For example, so-called drysensors casually worn in clothes and accessorieshave to get much better in collectingaccurate data in the midst of the noise inand around the body. And I don’t even wantto open the Pandora’s box of policy issuesaround liability and reimbursement. Theymake the debate around Obamacare soundlike chamber music. It’s fascinating to watchthe growing number of people involved withGoogle tinker more or less in the public eyewith a prototype of the next big thing. But let’sget some perspective here - they are far fromthe first pioneers in this field.I covered DARPA programs on wearablesmore than a decade ago. Many small,less visible companies are doing all sorts ofwearables today, mainly for fitness enthusiasts- a sector that doesn’t have to tackle thehealthcare policy issues.Google is clearly getting mindshare withProject Glass, but that doesn’t necessarilytranslate into marketshare. The hurdlesahead are still huge, including the limits onbattery power given what the average personwants to carry. Some day, Apple or someother company could just surprise us with aniWatch or iBelt or iShirt - or, yes, iGlasses -designed to capture the sort of thing the marketwants but hasn’t been able to articulate. Isee great potential here for a set of wearableproducts that work in concert.For many years researchers at Philips andelsewhere (especially in Europe) have beenworking on conductive yarns. Their goal hasbeen to sew wearable sensors directly intoclothes. This is really cool stuff, but it likelyrepresents a generation of wearables well beyondthe first crop of watches, glasses, andbelts. When we get to the stage of wovenelectronic computers, the technology andfashion worlds will collide in a way that makessmartphone cases look like Hello Kitty dolls.I’m guessing really useful ultra-mobilewearables won’t come for years, given themany challenges ahead. What fun it will bewatching this next big thing emerge.50 Electronic Engineering Times Europe March 2012 www.electronics-eetimes.com

WHITE PAPERSwww.electronics-eetimes.com/en/Learning-center/A leading reference resource for electronics engineers, EE Times Europe’s White Paper libraryincludes over 600 white papers, application notes, technical articles, books and case studiesthat can be downloaded free of charge. The latest featured papers are available below.Haswell - the 4th Generation Intel@ Core processor platformThis white paper discusses the implementationof Intel’s new generationCore Processor Platform in its seriesof Embedded boards available inmost popular form factors and bustechnologies. Benefits include lowerpower, higher speed, much bettergraphics, 6Gb/s SATA ports, as wellas I/O flexibility allowing to set portsto USB 2.0 or 3.0www.electronics-eetimes.com/en/Learning-center/Lighting applications –lighting the way with LEDsLEDs are being rolled out as replacementsfor incandescent lighting throughout theworld. The Chinese government has a verystrong commitment to LEDs, especially instreet lighting. In the U.S. and Canada, theLED market share of lighting is estimatedat around 7 percent. LEDs offer many advantages that are compoundedby the length of time they are used. Greg Quirk fromMouser Electronics gives an overview of this process in thedifferent countries and introduces the role of OLEDs.www.electronics-eetimes.com/en/Learning-center/Replacing the candle in the candelabraTwo compact, efficient bulb-replacementdesign ideas. By moving to abuck boost topology, PI is able toachieve a combination of performancethat has not been possible upto now. Previously if a design was requiredto deliver very high efficiency,a high output voltage was required.However, this concession to efficiency resulted in unacceptablylow power factor and total harmonic distortion that made suchsolutions unusable for worldwide lighting applications.www.electronics-eetimes.com/en/Learning-center/High voltage surge stoppers ensure reliableoperation during power surgesIn automotive, industrial and avionicapplications, high voltage power supplyspikes with durations ranging from a fewmicroseconds to hundreds of millisecondsare commonly encountered. Theelectronics within these systems mustnot only survive transient voltage spikes, but in many cases alsooperate reliably throughout the event. In systems where poweris distributed over long wires, severe transients are generatedby load steps (abrupt changes in load current).www.electronics-eetimes.com/en/Learning-center/16-Bit, 100 kSPS low power successiveapproximation ADC systemThis application note describes a 16-bit, 100 kSPS successive approximationanalog-to-digital converter (ADC)system that has a drive amplifier thatis optimized for a low system powerdissipation of 7.35 mW for input signalsup to 1 kHz and sampling ratesof 100 kSPS.This approach is highlyuseful in portable battery powered or multichannel applications,or where power dissipation is critical.www.electronics-eetimes.com/en/Learning-center/ZVS buck regulator removes barriersTo increased power throughputThe need for higher power density intoday’s electronic systems combinedwith higher overall efficiency has drivenmany changes in the Non-isolatedPoint-of-Load Regulator (niPOL). Whilethe solutions developed work well overa narrow voltage range, the efficiencyand throughput power tend to drop dramatically when they aresubjected to a wide input range. This paper looks at a new ZVSbuck regulator topology.www.electronics-eetimes.com/en/Learning-center/Supporting multicore SoCs in critical embeddedsystems for avionics, defense and transportAvionics, Defense and Transport, like allhigh-end processing application areas,are looking for ways to increase performanceand at the same time reduce theexisting form-factor and power budgets.If COTS multicore SoCs (System-on-Chip) stand as the common approach tomeet these design goals today, their use in critical embeddedsystems introduces some new paradigms when considering keygoals related to safety and certification.www.electronics-eetimes.com/en/Learning-center/Leveraging high-volume CMOS manufacturingfor MEMS-based frequency controlOver the last five years, microelectromechanicalsystems (MEMS) solutionshave steadily eroded the 100-year-oldmonopoly held by quartz crystal solutionsfor frequency control and timingproducts. MEMS technologies, originallydesigned around the promise of smallerform factors, have enabled significant additional advantagesrelated to lead time, supply stability, product reliability, devicesize, and price and performance tradeoffs.www.electronics-eetimes.com/en/Learning-center/www.electronics-eetimes.com Electronic Engineering Times Europe July/August 2013 51

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