1 - Al Kossow's Bitsavers

. Refresh CyclesOn refresh cycles the minimum precharge time occurs when ACR or ACW go high 20 ns before TMS4500AClK low. If this occurs, refresh RAS will go Iowan the subsequent rising edge of the TMS4500A ClK.The minimum precharge time for refresh cycles is. given by:wherethus,tRPtACH-CltACH-REHtCH-RRlTClCH + tACH-Cl - tACH-REH - tt(REH) + tCH-RRl *Time delay ACX high to ClK low (MIN TMS4500A-15 Spec.)Time delay, ACX to RAS starting high (MAX TMS4500A-15Spec.)Time delay, ClK high till refresh RAS starting low (MAXTMS4500A-15 Spec. *)(118 + 20 - 30 - 15 + 45) ns138 nsc. Access Grant CyclesThe pre charge time for access grant cycles is given by:wheretRPtCH-RRHtCH-RElTClCl - tCH-RRH - tt(REH) :t tCH-REl *Time delay, ClK high to refresh RAs starting high (MAXTMS4500A-15 Spec.)Time delay, ClK high to access RAS starting low (MAXTMS4500A-15 Spec. *)l>'C"2.c;'Ell...S':::Ien5'....... o3OJ...•ci':::sthus,3. ALE to elK Relationship(200 - 35 - 15 + 54) ns204 nsThe ALE low transition must not occur within 10 ns of the TMS4500A ClK low transition. This is guaranteedby the phase shift between the 8088 and TMS4500A clocks.ALE low to ClK low time is given by:wherethustAEl-CltosctOlCHtp04tp74tAEl-Cl2(toSC) - !OlCH - TCHll + tp04 + tp74OSC cycle period (8284A Spec.)'OSC low to ClK high (MAX 8284A Spec.)Propagation delay, MSI gate (MIN 74lS04 Spec.)Propagation delay, MSI gate (MIN 74S74 Spec.)[2(66) - 22 - 85 + 5 + 41 ns34 ns4. Row Address Setup and Hold TimeThe setup time to the TMS4500A is given by:wheretAV-AEltAV-AElTAVAl - tp32Time delay, address, REN1, CS valid to ALE low (MINTMS4500A-15 Spec.)9-66