Verifying a Synthesized Implementation of IEEE-754 Floating-Point ...

24 B. Akbarpour et al.The n-bit Multiplexer at the gate level is implementedas follows:⊢ def MUX_Cell_Imp a b s out =∃ s1 s2 s3.(not1 s s1) ∧(and2 s1 a s2) ∧(and2 s b s3) ∧(or2 s2 s3 out)⊢ def (MUX_Imp 0 A (B:num−> bool) s OUT =MUX_Cell_Imp (A 0) (B 0) s (OUT 0)) ∧(MUX_Imp (SUC n) A B s OUT =(MUX_Cell_Imp (A (SUC n)) (B (SUC n)) s (OUT (SUC n)) )(MUX_Imp n A (B:num−> bool) s OUT))∧The correctness of the n-bit Multiplexer block isproved in HOL as in the following theorem:Theorem: MUX_GATE_LEVEL_TO_RTL_Correct⊢ MUX_Imp n A B s OUT = MUX_Spec n A B s OUTVerification of n-bit Shifter. The n-bit Shifter in the RTLis specified as follows:⊢ def ShiftRight_Spec n M L =((BNVAL L * (2 EXP n)) + BNVAL (WSEG n 0 M) = (BNVAL M))⊢ def ShiftLeFT_Spec n M L =(BNVAL L = (2 EXP n) * BNVAL M)The n-bit Shifter at the gate level is implemented asfollows:⊢ def (ShiftLeFT_Imp 0 M L =((L 1) = (M 0)) ∧(L 0 = F) ) ∧(ShiftLeFT_Imp (SUC n) M L =(L (SUC (SUC n)) = M (SUC n)) ∧ShiftLeFT_Imp n M L)⊢ def (ShiftRight_Imp 0 M L =((L 0) = (M 1)) ∧(L 1 = F) ) ∧(ShiftRight_Imp (SUC n) M L =(L (SUC n) = M (SUC (SUC n))) ∧ShiftRight_Imp n M L)The correctness of the n-bit Shifter block is proved inHOL as in the following theorems:Theorem: SHIFT_LEFT_GATE_LEVEL_TO_RTL_THM⊢ ShiftLeFT_Imp n M L =⇒ ShiftLeFT_Spec n M LTheorem: SHIFT_RIGHT_GATE_LEVEL_TO_RTL_THM⊢ ShiftRight_Imp n M L =⇒ ShiftRight_Spec n M LThe Computer Journal, 2009