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Switch Mode Power Supply (SMPS) Topologies (Part II) - Microchip

Switch Mode Power Supply (SMPS) Topologies (Part II) - Microchip

Switch Mode Power Supply (SMPS) Topologies (Part II) - Microchip

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AN1207Q1 OFF, Q2 OFF (PERIOD TR)In this configuration, the circuit is redrawn as shown inFigure 45.FIGURE 45:PUSH-PULL CONVERTER: Q1 OFF, Q2 OFFVLD2VAVDCVDCNPVP1NPVP2NSVS1NSVS2D1LOCOROVOUTQ1Q2Input Circuit BehaviorEquation 169 shows the voltage on each switch.EQUATION 169:Output Circuit BehaviorWhen both switches are off, since the current in theinductor continues to flow in the same direction asbefore, the voltage on the two secondary windings aresuch that: Vs2 = -Vs1, and D1 and D2 are forwardbiasedand are conducting. They split the currentequally, so that each of them is conducting one half ofthe current flowing into the inductor. The resulting currentwaveforms are plotted in Figure 47(G and H) forthe two secondary windings currents.Equation 170 shows the inductor voltage.EQUATION 170:V LBased on Equation 170, the current flowing through theinductor LO is equal to Equation 171.EQUATION 171:V Q=V DC= – V OUT– V D on+,V S1where V S1 is IL times the resistance of the windings(almost zero).– V OUT– V D,onI L() t = I L() t + --------------------------------------tL ODesign Equations and ComponentSelectionINPUT/OUTPUT RELATIONSHIP AND DUTYCYCLEAt the Steady state, the increase in inductor currentduring TON must equal its decrease during TR. UsingEquation 168 and Equation 171 (neglecting the forwarddrop on the diode) and since (TON + TR) = T/2,results in Equation 172.EQUATION 172:where D =V OUTT--------- ONTConsequently, knowing there are two pulses in thePWM period, the maximum theoretical duty cycle canbe Dmax = 0.5.Starting from the input/output relationship shown inEquation 173, the feedback control loop keeps the outputvoltage VOUT constant against changes in the inputvoltage VDC, and if VDC decreases, TON will increase tocompensate.EQUATION 173:V OUT2 N S= ------ ( V DC– V Q1,on)DN P2 N S------ ( V DC– V Q1,on) T ON=---------TN PTherefore, for the system design, a maximum dutycycle (Dmax) can be defined that corresponds to theminimum input voltage (VDC, min) and if less than themaximum, theoretical is equal to Equation 174.EQUATION 174:D maxN PV OUT= ------------------------------2N SV DC,minDS01207B-page 50© 2009 <strong>Microchip</strong> Technology Inc.

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