Md Ishfaqur Raza, PhD - East West University

Md Ishfaqur Raza, PhDAssociate Professor, Dept of EEE, East West UniversityEmail: iraza@ewubd.edu (preferred mode of communication)A Short Professional HistoryI am a 10yr veteran of Intel in DuPont, US. I took leave from Intel for a year for personal reasons.During that time I dedicated myself to teaching. As I became fond of teaching I decided to stay withthis trade. Since then I have focused on teaching and expanding my research portfolio.In the last 4-5 years at Intel I worked on debug and probing. I worked on architecting and designingvalidating hooks in high speed memory controllers. In the previous 3 years I focused on the analysisof probing high speed future interconnects (proprietary Intel CPU-CPU and CPU-chipset buses). Myfocus was on high frequency design considerations and probe parasitic effects. Prior to that, I was thelead in designing power delivery solutions for Pentium 3 server microprocessor. It included PCB highspeed design considerations. I also lead a task force looking into electromagnetic compatibility (EMI)issues of server CPUs. All my contributions still find their way into most of Intel’s design today.At East West University, within a short time we have done considerable work in the area of microprocessorpower delivery, Microwave antenna analysis using statistical design techniques, RFID designoptimization, power gating of CMOS devices, and remote sensing in EM domain. I am working withseveral groups of undergraduate students, several graduate students, and lecturers.Employment9/2006-now (2.5+ years)Associate ProfessorDepartment of electrical and electronic engineering,East West University Dhaka, Bangladesh4/1997-4/2008 (10+ years) Staff EngineerIntel CorporationDuPont Campus, Washington, USA1/1992-4/1997 (5 years) Research &Teaching AssistantUniversity of Missouri-RollaRolla, Missouri, USAEducationPhD in Electrical Engineering (Feb’97), University of Missouri-Rolla, USA.“Remote Detection of Acoustical and Electromagnetic Boundary using Radiation Imaging Operators.”An approach is introduced to identify the boundaries of a non-homogeneous media using PDE.MS in Electrical Engineering (Dec’93), University of Missouri-Rolla, USA“Finite -Difference Time-Domain Analysis in Two-Dimensions.”The finite difference time domain numerical method was studied with different types of boundary conditions.BS in Electrical and Electronic Engineering (April’91),Bangladesh University of Engineering and Technology, Dhaka, Bangladesh.Research Interests1. High Speed Design: Design considerations in PCB boards and complex VLSI solutions.2. RF and Microwave: Antenna performance optimization using statistical design considerations.3. Non-Invasive Imaging: Application of Remote detection methods in electromagnetic domain.4. CMOS Performance: Innovative IC power delivery solutions for high speed CMOS designs.

Teaching Workshops:- On my own initiative, I (along with another faculty member) have conducted 2 workshops onteaching, for the faculty of science and engineering, attended by 30+ faculty members, senior(professors) and junior teachers.o Topic 1: College teaching using active learning techniques (fall 2007)o Topic 2: Understanding the meta role of a university professor (spring 2008)- I have offered several workshops for students on Matlab and Spice.Employment Details(4/1997-4/2007): Staff Engineer, Intel Corporation, DuPont, Washington, USAObservability Debug: Current & future generation memory technology probing/debug solutions.• Designed on-die debug hooks in buffer chip for a next generation memory technology (FB-DIMM2) running at greater than 4.8 GTs. The design was done to create a stand-alone trace toolfor resolving complex bugs and ultimately save on costly test and measurement instrumentation.This design will be implemented by several companies.• Defined the electrical and control architecture of logic analyzer probes for the new memorytechnology called FB-DIMM. The designs were done to make probes work with different systemconfigurations. A new protocol was defined to ensure probe and system BIOS worked seamlessly.The protocol is being made a standard via JEDEC.• Detail simulation analysis was done to measure impact of probing high speed (3.2-6 GTs)pt-pt differential buses. The result of this simulation caused a new paradigm to evolve; movingaway from direct probing to repeater based probing. The analysis modeled different signalconditioning techniques such as equalization. Parametric variations were also investigated usingDOE statistical simulation technique.• Provided technical leadership to four different companies (Agilent, FP, Nexus, andTektronix) and help design, manufacture, and validate their logic analyzer probes. The probeshave been successfully used at different Intel labs validating different systems.Signal integrity, power delivery, and EMI, Server microprocessor division.Designed the on-board power delivery and decoupling system for the Pentium IIImicroprocessors, Intel’s flagship server processor, XEON. These make the backbone of Intel’sprocessor suites in high performance server machines. This demanded new design methodologiesand state of the art simulation tools (HFSS, Hspice, Q3D, etc).Supervised a team to validate Intel Corporation’s flagship Pentium IV microprocessor powerdelivery to ensure it compliance with design specifications before the processor is cleared forrelease as a new high frequency and high performance Intel product.Mentored junior engineers and interns and guide them through projects and technicalissues. Mentored engineers and taught tools of the trade, in particular new memory technology,power delivery design, and probe architectures.Research and Investigation: Work on cutting edge technology for performance• Supervised a research investigation between Intel Corporation and several vendors to develop anew passive buried resistor technology for use in next generation high speed bus probes. Wereviewed manufacturing and design issues and worked to develop the technology.• Coordinated an inter-departmental R&D effort to develop an EMI containment strategy for nextgeneration processors as CPU speed were hitting close to 1 GHz. The investigation resulted in afaraday cage solution that was implemented on several generations Intel microprocessors.

• Architected a new the power delivery solution for a repeater probe design for new interconnectstechnology using state of the art voltage regulator solution. The power solution was based on CSPpackaging and had integrated PWM, FETs, and drivers. Guided several engineers in the design andsimulation defining the solution.Patents and select awards (select and recent)Patent Number: 6,366,472- Apr 2, 2002, Apparatus and method for inhibiting EMIPatent Number: 6,205,026- Mar 20, 2001, Heat sink retention components and systemPatent Approved, in process- Method for Logic Analyzer Observ of FB-DIMM Links.Desktop Processor Division Recognition Award: “In recognition of flawless planning andexecution in enabling Intel and industry with 2.5GTs PCI Express logic analyzer sol”Desktop Processor Division Recognition Award: “In recognition of enabling Intel and theindustry with 1 st generation Fully Buffered DIMM LA solutions”Tool skills: (select- used for research, analysis, and teaching tool)Mathematical Analysis Tools: Matlab, JMP-design of exp analysis.Simulation and Modeling tools: Ansoft Designer, High Freq Sim Software (HFSS) , ModelSim (forverilog simulation), PSpice, Hspice, Advanced Design Simulator (ADS), Silvaco device simulator, MagicVLSI simulator.Publications- Journals/Conference (select, past 5 yrs)1. Salahuddin Raju, S. M. Salahuddin, and Md Ishfaqur Raza, “Reflection Cancellation from High SpeedTransmission Line”, PIERS Proceedings 2009, 23-27 March 2009, Beijing, China.2. Arnab Roy, Sushanta Paul, A. S. M. Shamsuzzaman, and Md Ishfaqur Raza, “Design of an OptimumAntenna System for Maximum Power Transfer Using Statistical Design of ExperimentApproach”, PIERS Proceedings 2009, 23-27 March 2009, Beijing, China.3. Avijit Hira, Shaik Ashraf Hossain, and Md Ishfaqur Raza, “Interpolation Techniques to Improve RIOBoundary Detection”, PIERS Proceedings 2009, 23-27 March 2009, Beijing, China.4. Md Ishfaqur Raza, “A necessary condition for successful science and engineering programs- toolsto develop proficiency in the English language”, 2 nd International conference on democracy, the“new world order” and English studies, 12 – 13 December 2008. Dhaka, Bangladesh.5. Saad Bin Abul Kashem, Salahuddin Raju, and Md Ishfaqur Raza, “Modified Physical Configuration toCompensate Parasitic Effects in High Speed Systems”, 5th International Conference on Electrical &Computer Engineering, December 20-22, 2008, Dhaka, Bangladesh6. Laila S. Sraboni, Ophelia Mohaimen, Rezwana H. Mustazir, and S. M. Salahuddin, and Md Ishfaqur Raza,“Improved VLSI Circuit Performance using Localized Power Decoupling”, 5th InternationalConference on Electrical & Computer Engineering, December 20-22, 2008, Dhaka, Bangladesh7. Richard E dubroff and M. I. Raza, "Radiation imaging operators for acoustic boundary detection",ICONIC 2007, St. Louis, MO, USA, June 27-29, 2007.8. M. I. Raza, "Joint collaboration for the growth of engineering education in Bangladesh", NationalSymposium on Engineering and Technical Education, BUET, Dhaka, Dec 29, 2007.9. Anisul Haque, Md. Ishfaqur Raza, "Necessity of paradigm shift in the teaching of engineering inBangladesh", National Symposium on Engineering and Technical Education, BUET, Dhaka, Dec, 2007.10. Md I Raza, “Trace Tool Architecture for High Speed Memory Links Post-Silicon Validation”,Intel Design, Test, and Technology Conference, DTTC 2005, Oregon, USA11. Bram Leader and Md I Raza, “Learning from the Development of the FB-DIMM Logic AnalyzerInterface Probe”,. Intel Design Conference, DTTC 2005, Oregon, USA