Development of L-band 28V Operation GaAs FET and ... - CS Mantech

To keep the adequate BVgdo level even at 175 deg-C, whichis our targeted maximum channel temperature, the Lh isrequired to set longer than 1.4 µm. On the other hand, thegate-drain feedback capacitance (Cgd) is in proportion to theLh, and which causes gain reduction. Figure 3 shows the∆Gsmax dependence of Lh. The degradation-rate of Gsmaxis estimated 0.13 dB/µm around Lh=1.5 µm.∆Gsmax (dB)0.60.40.20-0.2-0.4-0.6-0.8The actual Lh is determined by not only designed lengthbut also the alignment accuracy of the buried gatefabrication process and the over gate fabrication process.Therefore, we control this alignment deviation within0.1 µm and set the Lh to 1.5 µm, which ensures that Lh islonger than 1.4um even in the lower limit. In addition, thegain deviation, generated by this miss alignment, is less than0.2 dB.The rate is estimated 12 V/µm. The deviation of the Lgd isoriginated from the alignment of the ohmic metalizationprocess and the gate electrode process. As no significanttrade-off exists in Lgd in the sub-micron order, theconventional alignment rule of ±0.2 µm was adopted and theLgd was set to 5.0 µm to obtain the required BVgdo level.REPEATABILITYFigure 5(a)~(c) show the distribution of on-wafer test datawith 90 W FET (Wg=133.1 mm) from multiple wafersamong multiple wafer lots in actual mass-production.N (pcs)10008006004000.9 1.2 1.5 1.8 2.1 2.4 200Lh (µm)Fig.3. Gsmax vs Lgd @2.1 GHz0100080070 72.5 75 77.5 80 82.5 85 87.5 90BVgdo (V)Fig.5. (a) The gate-to-drain breakdownvoltage (BVgdo) @Igd=-0.5 mA/mmb. the gate-to-drain distance (Lgd)The Lgd also affects the BVgdo. Figure 4 shows theBVgdo dependence of Lgd.BVgdo (V)10095908580757065603 3.5 4 4.5 5 5.5 6 6.5 7Lgd (µm)N (pcs)60040020000 0.1 0.2 0.3 0.4 0.5Vp (V)Fig.5. (b) pinch-off voltage (VP)Fig.4. BVgdo vs Lgd @Lh=1.5 µm.