High performance HBM Known Good Stack Testing

More documents

Recommendations

Info

UltraFLEX KGS Enabling Capabilities • Digital – Instrument delivers very fast signal rise times (
Power Distribution Challenges • Very high current on core supply – >4A per stack – Single power plane in the SoC device • Multiple power levels required • Power probe count may be limited – ~30 in the subject design • Up to X96 parallelism – Large number of independent DUT power supplies – Power net routing on the PCBA and in the DUTlet Marc Loranger John Oonk 11
Page 1 and 2: High performance HBM Known Good Sta
Page 3 and 4: High Bandwidth Memory (HBM) • Mar
Page 5 and 6: High Bandwidth Memory (HBM) • Sta
Page 7 and 8: HBM Stack Probing • Bottom of SoC
Page 9: UltraFLEX KGS Solution • Test cel
Page 13 and 14: PDN DUTlet Power Stack-up • The s
Page 15 and 16: PDN simulations vs. Measurements Po
Page 17 and 18: PDN voltage drop across DUT ATE pow
Page 19 and 20: Known Good Stack At Speed Test 1066

High performance HBM Known Good Stack Testing

Create successful ePaper yourself

Delete template?

Save as template?