System-on-Chip Design Flow

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Project Scheduling • External constraints – Targeted market entry – ASIC vendor • Layout generation (P&R) • Mask producing • Prototype processing • Prototype acceptance • Volume production starting delay • Design constraints – Design team experience – Design tools / flows, vendor libraries, IP provider quality – <strong>System</strong> specification iterations – Design complexity – Verification complexity – Production test complexity 26.03.2003 Jouni Tomberg / TUT 14
Differencies between SoC and SoPC design flows • SoPC is a FPGA technology based user programmable solution – P&R and programming done by the user (vs. backend flow in SoC) • No delay on prototype production • No delay on mass production start • No NRE (production start) costs – Production tests done by the IC vendor • Design resource and time savings in the design flow – Quick and cheap modifications • On the other hand certain limitations on performance, integration capacity and mass production costs exists compared to SoC 26.03.2003 Jouni Tomberg / TUT 15
Page 1 and 2: 26.03.2003 System-
Page 3 and 4: Definitions • Frontend design - D
Page 5 and 6: Need for System Le
Page 7 and 8: Design Productivity Gap 26.03.2003
Page 9 and 10: Design Flows Design Flows Source: T
Page 11 and 12: Importance of Specification 26.03.2
Page 13: Verification Importance 26.03.2003
Page 17 and 18: Platform drivers Source: B. Altizer
Page 19 and 20: IP Market Dynamics • Design dynam
Page 21: Conclusions • The main players in

System-on-Chip Design Flow

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