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Thesis (pdf) - Swinburne University of Technology

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magnetic field at the trap position we find<br />

�<br />

∂B �<br />

�<br />

∂r � = −<br />

r=r0<br />

µ0 B<br />

2π<br />

2 ⊥0<br />

I<br />

In the Gaussian cgs system this is simply<br />

�<br />

∂B �<br />

� =<br />

∂r<br />

1 B<br />

2<br />

2 ⊥0<br />

I [cgs]<br />

� r=r0, [cgs]<br />

Chapter 2: Theoretical Background<br />

(2.40)<br />

(2.41)<br />

Of course, an infinite wire is not realisable and does not allow confinement<br />

in the direction <strong>of</strong> the wire. Bent wires can create the <strong>of</strong>fset field � B0 and<br />

create the confining field. Here two major designs have been considered. In<br />

the first design the wire is bent into a U-shaped form, where the connecting<br />

parts are bent away from the ‘infinite’ part in the same direction. The overall<br />

field <strong>of</strong> this wire alone is a quadrupole field in all three dimensions, the field<br />

components <strong>of</strong> the side wires cancelling themselves at the trap centre. This<br />

trap’s centre is not directly above the wire. It is shifted slightly away from the<br />

wires in the dimension <strong>of</strong> the bent wires, see Fig. 2.4.<br />

A more symmetric arrangement is created by bending the wire in a Z-<br />

shape. This creates a harmonic trap, as the fields from the side wires add<br />

constructively at the trap’s centre. The field <strong>of</strong> this trap for a current I, from<br />

the centre <strong>of</strong> the ‘infinite’ central wire bar with length wx, perpendicular to<br />

the chip’s plane can be calculated to:<br />

⎛<br />

z ·<br />

⎜<br />

�B(z) = I · ⎜<br />

⎝<br />

2wy<br />

(w 2 x/4+z 2 ) √ w 2 x/4+z 2 +w 2 y<br />

− 1<br />

z · wx √<br />

w2 x /4+z2 0<br />

⎞<br />

⎟<br />

⎠ + � B0<br />

(2.42)<br />

In this thesis the Gaussian cgs system is used when covering magnetic fields,<br />

as for applications in atom optics it yields convenient numbers. The field is<br />

expressed in Cartesian coordinates, where the x-direction is chosen along the<br />

wire and the z-axis is perpendicular to the chip’s plane. The terms wx and wy<br />

31

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