Chapter 2 THE GENERAL INSTRUMENT CP1600 - Intellivision Brasil

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Were you to compare Figure 2-1 with an equivalent figure for a low-end microprocessor such as the SC/MP (which is described In Chapter 3 of the Osborne 4 & 8-Bit Microprocessor Handbook (Osborne/McGraw-Hill, 1980), the CP1600 might appear to offer fewer logic functions: but within the functions it does provide the CP1600 provides considerably more logic and program execution capabilities. Where low-end microprocessors choose to condense onto a single chip, simple implementations of different logic functions, high-end products such as the CP1600 choose to provide more devices greater capabilities on each device. Logic to Handle Intrrupt Rquests from External Devices Interrupt Priority Arbitration I/O Communication Serial to Parallel Interface Logic Programmable Timers Clock Logic Arithmetic and Logic Unit Instruction Register Control Unit Bus Interface Logic System Bus ROM addressing and Interface Logic Read Only Memory Accumulator Register(s) Data Counter(s) Stack Pointer Program Counter I/O Ports Interface Logic I/O Ports Figure 2-1. Logic of the CP1600 CPU and CP1680 I/O Buffer Direct Memory Access Control Logic RAM addressing and Interface Logic Read/Write Memory CP1600 CPU CP1680 I/O Buffer
CP1600 PROGRAMMABLE REGISTERS The CP1600 has eight 16-bit programmable registers, which may be illustrated as follows: The way in which the registers illustrated above are used is unusual when compared to other microcomputers described in this book. All eight 16-bit registers can be addressed as though they were general purpose registers: however, only Register R0 has no other assigned function. We may therefore look upon Register R0 as the Primary Accumulator for this CPU. Registers R1, R2, and R3 serve as general purpose registers, But may also be used as Data Counters. In addition to serving as general purpose registers, R4 and R5 may be used as auto-incrementing Data Counters. Memory reference instructions that identify Register R4 or R5 as holding the implied memory address will cause the contents of Register R4 or R5 to be incremented — after the memory reference instructions have completed execution. Registers R6 and R7, in addition to being accessible as general purpose registers, also serve as a Stack Pointer and a Program Counter, respectively. Having the Stack Pointer accessible as a general purpose register makes it quite simple to maintain more that one Stack in external memory; also, you can easily address the Stack as data memory using the Stack Pointer as a Data Counter. Having the Program Counter accessible as a general purpose register can be useful when executing various types of conditional branch logic. While having the Stack Pointer and the Program Counter accessible as though they were general purpose registers may appear strange, this is a feature of the PDP-11 minicomputer — and is a very powerful programming tool. CP1600 MEMORY ADDRESSING MODE The CP1600 addresses memory and I/O devices within a single address space. When referencing external memory, you can use direct addressing, implied addressing, or implied addressing with auto-increment. Direct addressing instructions are all two or more words long, where the second or last word of the instruction object code provides a I6-bit direct address. CP1600 DIRECT ADDRESSING CP1600 direct addressing instructions are complicated by the fact that CP1600 program memony is frequently only 10 bits wide. That is to say, even though the CP1600 is a 16-bit microprocessor, its instruction object codes are only 10 bits wide. If program memory is only 10 bits wide, then direct addresses will only be 10 bits wide. A 10-bit direct address will access the first 1024 words of memory only. R0 R1 R2 R3 R4 R5 R6 R7 Data Counters Data Counters with auto-increment Stack Pointer Program Counter General Purpose registers
Page 1: Chapter 2 THE GENERAL INSTRUMENT CP
Page 5 and 6: If Registers R4 or R5 provides the
Page 7 and 8: Figure 2-2 CP1600 CPU Signals and P
Page 9 and 10: Figure 2-3. CP1600 Machine Cycles a
Page 11 and 12: Figure 2-6 CP1600 Timing for Memory
Page 13 and 14: The PCIT signal as an input inhibit
Page 15 and 16: THE CP1600 INTERRUPT LOGIC Figure 2
Page 17 and 18: SW The Status Word, whose bits corr
Page 19 and 20: TYPE IMMEDIATE IMMEDIATE OPERATE JU
Page 21 and 22: TYPE REGISTER OPERATE (CONTINUED) M
Page 23 and 24: The following notation is used in T
Page 25 and 26: OBJECT MACHINE INSTRUCTION CODE WOR
Page 27 and 28: SUPPORT DEVICES THAT MAY BE USED WI

Chapter 2 THE GENERAL INSTRUMENT CP1600 - Intellivision Brasil

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