Uboot中start.S源码的指令级的详尽解析

Function Rd Instruction
Invalidate TLB(s) SBZ MCR p15,0,Rd,c8,c7,0
/*
* disable MMU stuff and caches
*/
mrc p15, 0, r0, c1, c0, 0
此处,对应的值为:
rd为r0=0
CRn为C1
CRm为C0
opcode_2为0,
即,此行代码是将r0的值,即0,写入到CP15的寄存器1中。
寄存器1的相关的定义为:
http://www.heyrick.co.uk/assembler/coprocmnd.html
“StrongARM SA110
Register 1 - Control (read/write)
All values set to 0 at power-up.
o Bit 0 - On-chip MMU turned off (0) or on (1)
o Bit 1 - Address alignment fault disabled (0) or enabled
(1)
o Bit 2 - Data cache turned off (0) or on (1)
o Bit 3 - Write buffer turned off (0) or on (1)
o Bit 7 - Little-endian operation if 0, big-endian if 1
o Bit 8 - System bit - controls the MMU permission system
o Bit 9 - ROM bit - controls the MMU permission system
o Bit 12 - Instruction cache turned off (0) or on (1)”
所以,对应内容就是,向bit[CRm]中写入opcode_2,即向bit[0]写入0,对应的作用为
“On-chip MMU turned off”,即关闭MMU。
bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
orr r0, r0, #0x00000002 @ set bit 2 (A) Align
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
mcr p15, 0, r0, c1, c0, 0
上面几行代码,注释中写的也很清楚了,就是去清楚对应的位和设置对应的位,具体位域的含义,
见下:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0184b/
Chdifbjc.html
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