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Example: Modulo-4 Counter

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A-63<br />

RESET<br />

r(t)<br />

0<br />

0<br />

0<br />

0<br />

1<br />

1<br />

1<br />

1<br />

Appendix A: Digital Logic<br />

Truth Table for Mod-4 <strong>Counter</strong><br />

s 1(t) s 0(t)<br />

0<br />

0<br />

1<br />

1<br />

0<br />

0<br />

1<br />

1<br />

0<br />

1<br />

0<br />

1<br />

0<br />

1<br />

0<br />

1<br />

s 1s 0(t+1)<br />

01<br />

10<br />

11<br />

00<br />

00<br />

00<br />

00<br />

00<br />

q 1q 0(t+1)<br />

01<br />

10<br />

11<br />

00<br />

00<br />

00<br />

00<br />

00<br />

s 0(t+1) = r(t)s 1(t)s 0(t) + r(t)s 1(t)s 0(t)<br />

s 1(t+1) = r(t)s 1(t)s 0(t) + r(t)s 1(t)s 0(t)<br />

q 0(t+1) = r(t)s 1(t)s 0(t) + r(t)s 1(t)s 0(t)<br />

q 1(t+1) = r(t)s 1(t)s 0(t) + r(t)s 1(t)s 0(t)<br />

Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

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