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Trace Configuration Table 2.8 Data Address Compare Options Option Suboption Description Compare Mode Select the type of data address comparison to be made. Exact DAC 1 debug conditions occur only if the address of the instruction fetch is in the range specified in the DAC 1 Address and Range fields. DAC 2 debug conditions occur only if the address of the instruction fetch is in the range specified in the DAC 2 Address and Range fields. BitMatch DAC 1 debug conditions occur only if the address of the instruction fetch, ANDed with the DAC 2 Address setting is equal to the DAC 1 Address setting, also ANDed with the DAC 2 Address setting. DAC 2 debug conditions do not occur. Inclusive Range Exclusive Range DAC 1 debug conditions can occur only if the address of the instruction fetch is greater than or equal to the value specified in DAC 1 and less than the value specified in DAC 2. DAC 2 debug conditions do not occur. DAC 1 debug conditions occur only if the address of the instruction fetch is less than the value specified in DAC 1 or is greater than or equal to the value specified in DAC 2. DAC 2 debug conditions do not occur. 34 Tracing and Analysis Tools User Guide
Table 2.8 Data Address Compare Options (continued) Option Suboption Description DAC 1 Check to enable DAC 1. Tracing and Analysis Tools User Guide Address Enter the address to set the value of data address comparator 1. Exact Range Select the range of addresses to match in Exact mode. Access Type Select an option to let a data store or data load trigger the data address 1 comparator. NOTE: For e500 core, only Stores are traced. There is no trace if you select Loads. Privilege Specify the privilege level to enable the DAC 1 debug condition. Address Space Specify the memory address space to enable the DAC 1 debug condition. Link to IAC 1 Check to link DAC 1 with IAC 1. When linked to IAC 1, the DAC 1 debug event is qualified based on whether the instruction also generated an IAC 1 debug condition. DAC 2 Check to enable data address comparator 2. Address Enter the address to set the value of data address comparator 2. Range Select the range of addresses to match in Exact mode. Access Type Select an option to let a data store or data load trigger the data address 2 comparator. Privilege Specify the privilege level to enable the DAC 2 debug condition. Address Space Specify the memory address space to enable the DAC 2 debug condition. Link to IAC 2 When linked to IAC 2, the DAC 2 debug event is qualified based on whether the instruction also generated an IAC 2 debug condition. Trace Configuration 35
Page 1 and 2: CodeWarrior Development Studio for
Page 3 and 4: Table of Contents 1 Introduction 7
Page 5 and 6: Table of Contents 5.6 Viewing Resul
Page 7 and 8: Introduction Tracing and Analysis T
Page 9 and 10: 1.3 Accompanying Documentation Trac
Page 11 and 12: Trace Tracing and Analysis Tools Us
Page 13 and 14: Figure 2.2 Processor Page 8. Expand
Page 15 and 16: Tracing and Analysis Tools User Gui
Page 17 and 18: Figure 2.5 Configurations Page 15.
Page 23 and 24: Table 2.3 Trace Collection Options
Page 27 and 28: Table 2.4 DDR Buffer Options Option
Page 29 and 30: Table 2.5 Program Trace Options Opt
Page 31 and 32: Figure 2.17 Trace Configurations Di
Page 33: Figure 2.19 Data Address Compare Se
Page 37 and 38: . Click Apply to apply the settings
Page 39 and 40: Figure 2.23 EPU Events Settings Tab
Page 41 and 42: Table 2.12 SCU Configuration Option
Page 43 and 44: d. Configure the Ocean options. Tab
Page 45 and 46: Figure 2.29 Comparator A Settings T
Page 47 and 48: Table 2.17 Comparator C Options (co
Page 49 and 50: Figure 2.33 Trace and Profile Tab f
Page 53 and 54: 2.1.2.2.1 Customizing Trace Scenari
Page 59 and 60: Table 2.19 Trace Controls (continue
Page 61 and 62: Table 2.20 Software Analysis — To
Page 63 and 64: Table 2.22 Trace Events View Fields
Page 65 and 66: Figure 2.44 Column Chooser Tracing
Page 67 and 68: Table 2.23 Critical Code Tab — De
Page 69 and 70: Table 2.25 Buttons Available in Sta
Page 71 and 72: Figure 2.49 Performance Viewer Trac
Page 73 and 74: Table 2.28 Field Description of Cal
Page 75 and 76: 2.3.1.5 Nexus Messages Tracing and
Page 77 and 78: Figure 2.53 Find and Filter Dialog
Page 79 and 80: 2.3.3 Exporting Trace Data Tracing
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Tracing and Analysis Tools User Gui
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Figure 2.60 Import Trace Page Traci
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Figure 2.62 Import Trace Configurat
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Tracepoints Tracing and Analysis To
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19. Click Suspend to suspend the ap
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Figure 3.12 Address Analysispoint S
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Table 3.1 describes the Select Core
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Performance Analysis for QorIQ P Se
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4.1.2 Running Helper Programs Traci
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Figure 4.3 Project References Page
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Figure 4.5 New Wizard Tracing and A
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Figure 4.7 Folder Selection Dialog
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To configure specific counters: Tra
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Table 4.3 lists the options in the
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Figure 4.13 Events Selector — Sho
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Figure 4.15 Configured Event Counte
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Table 4.6 Performance Analysis Char
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Figure 4.19 Performance Analysis Co
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Table 4.8 Modes to Configure and Co
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1. Expand the Logic Analyzer Mode g
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Viewing Analysis Results Opening Ch
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Figure 4.28 Performance Analysis Ev
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Figure 4.33 Save Performance Analys
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Figure 4.34 Import Wizard 2. Select
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Figure 4.36 Import Projects Page
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Figure 4.40 Properties View Tracing
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Figure 4.49 Disassembled elf File T
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Figure 4.58 Pfu Configuration Group
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Figure 4.60 Adding Access Line Trac
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Figure 4.74 Scenarios Editor — Ap
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Figure 4.78 Scenarios Editor — Ex
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Figure 4.81 New Folder Dialog Box N
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8. Click Next. The Pfs Performance
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13. In the Properties view, enter s
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Performance Analysis for B4 and T4
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Figure 5.2 Configuration View The C
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5.1.2.2 Scenarios Pane Tracing and
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Table 5.3 Options Available in Samp
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Performance Analysis for B4 and T4
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Figure 5.12 New Configuration Scree
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Figure 5.14 Search Connections Wind
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Figure 5.17 Connection Added Tracin
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Figure 5.23 Measurement Results 5.6
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Delete — Deletes the selected res
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Nexus Tracing of User Space Applica
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Figure 6.2 Add Operating System Inf
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Index A Add a Stock Scenario 207, 2
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configuration editor window 131 con
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