Bluespec-6 Simple Pipelined Processor Instruction set - MIT
Bluespec-6 Simple Pipelined Processor Instruction set - MIT
Bluespec-6 Simple Pipelined Processor Instruction set - MIT
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Outline<br />
• Microacritectures√<br />
• Unpipelined processor √<br />
• Two-stage pipeline ⇐<br />
• Bypass FIFO<br />
January 15, 2003 http://www.csg.lcs.mit.edu/IAPBlue<br />
Two-stage Pipeline<br />
pc CPU Reg file<br />
fetch &<br />
decode<br />
imem dmem<br />
mkCPU2 :: Imem -> Dmem -> Module CPUinterface<br />
mkCPU2 iMem dMem =<br />
module<br />
pc :: Reg Iaddress < - mkReg 0<br />
rf :: Array RName (Bit 32)
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