AMD SB700/710/750 Register Programming Requirements

9. wait HostBusy bit to be 0
10.wait one SMBUS clock period.
11. wait HostBusy bit to 0.
2.34 Software Clock Throttle Period
ASIC Rev Register Settings Function/Comment
All Revs SB7x0
PMIO 0x68[7:6] = 10
SATA USB SMBUS PATA AC97 HD AUDIO LPC PCI
RTC ACPI PM_REG A-LINK I/O REG XIOAPIC
X
2.35 Unconditional Shutdown
Set AcpiThrotPeriod field in MiscEnable68 to 244 µS
(Hardware default is set to 15 µS)
ASIC Rev Register Settings Function/Comment
SB7x0 A15
Smbus_PCI_config 0x38 [12]=1
SATA USB SMBUS PATA AC97 HD AUDIO LPC PCI
x
RTC ACPI PM_REG A-LINK I/O REG XIOAPIC
2.36 Watchdog Timer Resolution
For register details, refer to
the sections check-marked
in the SB700/710/750
Register Reference Guide.
Enable the enhancement for unconditional shutdown
Set sm cfg 43 bit 3 to 1 first before programming this bit
then set 43h bit 3 back to 0 after programming.
ASIC Rev Register Settings Function/Comment
The following register should be programmed by SW before the WDT is programmed.
SB7x0
PMIO 0x69[0] = 0
PMIO 0x69[2:1] = 01
For register details, refer to
the sections check-marked
in the SB700/710/750
Register Reference Guide.
Enable WDT function (0: enable; 1: disable)
00: Set resolution for 32us
01: Set resolution for 10ms
10: Set resolution for 100ms
11: Set resolution for 1s
10ms resolution is recommended.
SATA USB SMBUS PATA AC97 HD AUDIO LPC PCI
RTC ACPI PM_REG A-LINK I/O REG XIOAPIC
x
For register details, refer to
the sections check-marked
in the SB700/710/750
Register Reference Guide.
© 2009 Advanced Micro Devices, Inc. ACPI/SMBUS Controller (bus-0, dev-20, fun-0)
AMD SB700/710/750 Register Programming Requirements Page 30