AMD SB700/710/750 Register Programming Requirements

9 IDE Controller (bus-0, dev-20, fun-01) ..............................................................65
9.1 Disabling IDE MSI Capability....................................................................................................65
9.2 Enabling IDE Data Bus DD7 Pull-Down Resistor......................................................................65
10 Embedded Controller (EC)....................................................................................66
10.1 Enable Using SAEN in Keyboard Controller..............................................................................66
10.2 GA20 Polarity .............................................................................................................................66
10.3 Re-alignment of EC 33Mhz Clock..............................................................................................66
10.4 Monitoring PwrGood on Sleep Detection ...................................................................................67
10.5 Clearing start_carrier in IR after Learning Mode is Complete....................................................67
10.6 Enabling Power Saving on LPC Clock in S5 ..............................................................................67
10.7 Supporting Open Drain on pad ps2_dat ......................................................................................68
10.8 Enabling Edge-triggering of CIR Interrupt to ACPI ...................................................................68
10.9 Disabling Pull-ups and Pull-downs in Pads EcGpio4/5 ..............................................................68
10.10 Disabling Pull-ups and Pull-downs in Pads EcGpio6/7 ........................................................69
10.11 Disabling Pull-ups and Pull-downs in Pads EcGpio0/1 ........................................................69
10.12 EC Enhanced Mode - PMIO .................................................................................................69
10.13 EC Enhanced Mode - SM PCI ..............................................................................................70
10.14 EC Enhanced Mode - LPC....................................................................................................71
11 HD Audio (bus-0, dev-20, fun-02) ........................................................................72
11.1 Enabling/Disabling HD Audio ....................................................................................................72
11.2 HD Audio Interrupt Routing Table .............................................................................................72
11.3 Audio Port Configuration............................................................................................................72
Appendix A: Sample Codes for BIOS Workarounds...........................................74
A1. Sample Code for SB7x0 Erratum #11: “Enabling EHCI Dynamic Clock Gating May
Cause Bug Code 0xFE System Error”...........................................................................................74
A2. Sample Code for SB7x0 Erratum #23: “USB Wake on Connect/Disconnect with Low
Speed Devices”.................................................................................................................................77
Appendix B: Revision History...................................................................................79
© 2009 Advanced Micro Devices, Inc. TOC
AMD SB700/710/750 Register Programming Requirements Page 6