uPSD3434EB40U6

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Hardware description uPSD34xx 18/293 Figure 5. Functional modules XTAL Clock Unit 8-Bit/16-Bit Die-to-Die Bus uPSD34xx Port 3 - UART0, Intr, Timers Port 3 Dual UARTs Interrupt Turbo 8032 Core Dedicated Memory Interface Prefetch, Branch Cache 10-bit ADC Enhanced MCU Interface PSD Page Register Decode PLD Main Flash Secondary Flash SRAM JTAG ISP Port 1 3 Timer / Counters 256 Byte SRAM Port C JTAG and GPIO Port 1 - Timer, ADC, SPI JTAG DEBUG 8032 Internal Bus PSD Internal Bus SPI Internal Reset CPLD - 16 MACROCELLS Port A,B,C PLD I/O and GPIO Port 4 - PCA, PWM, UART1 PCA PWM Counters Port D GPIO Port 3 I 2 C I 2 C Unit LVD Reset Logic WDT PSD Reset USB pins USB and Transceiver MCU Module Reset Input PSD Module V CC Pins 3.3V Ext. Bus Reset Pin V DD Pins 3.3V or 5V AI10409
uPSD34xx Memory organization 4 Memory organization The 8032 MCU core views memory on the MCU module as “internal” memory and it views memory on the PSD module as “external” memory, see Figure 6 Internal memory on the MCU Module consists of DATA, IDATA, and SFRs. These standard 8032 memories reside in 384 bytes of SRAM located at a fixed address space starting at address 0x0000. External memory on the PSD Module consists of four types: main Flash (64K, 128K, or 256K bytes), a smaller secondary Flash (32K), SRAM (4K, 8K or 32Kbytes), and a block of PSD Module control registers called csiop (256 bytes). These external memories reside at programmable address ranges, specified using the software tool PSDsoft Express. See the PSD Module section of this document for more details on these memories. External memory is accessed by the 8032 in two separate 64K byte address spaces. One address space is for program memory and the other address space is for data memory. Program memory is accessed using the 8032 signal, PSEN. Data memory is accessed using the 8032 signals, RD and WR. If the 8032 needs to access more than 64K bytes of external program or data memory, it must use paging (or banking) techniques provided by the Page Register in the PSD Module. Note: When referencing program and data memory spaces, it has nothing to do with 8032 internal SRAM areas of DATA, IDATA, and SFR on the MCU Module. Program and data memory spaces only relate to the external memories on the PSD Module. External memory on the PSD Module can overlap the internal SRAM memory on the MCU Module in the same physical address range (starting at 0x0000) without interference because the 8032 core does not assert the RD or WR signals when accessing internal SRAM. Figure 6. uPSD34xx memories Fixed Addresses FF Internal SRAM on MCU Module 384 Bytes SRAM IDATA SFR 80 7F 128 Bytes Direct Addressing 128 Bytes 0 Indirect Addressing DATA Direct or Indirect Addressing 128 Bytes Main Flash 64KB or 128KB or 256KB External Memory on PSD Module External memories may be placed at virtually any address using software tool PSDsoft Express. The SRAM and Flash memories may be placed in 8032 Program Space or Data Space using PSDsoft Express. Any memory in 8032 Data Space is XDATA. Secondary Flash 32KB SRAM 4KB or 8KB or 32KB AI10410b 19/293
Page 1 and 2: Features summary uPSD34xx Turbo Plu
Page 3 and 4: uPSD34xx Contents Contents 1 Summar
Page 5 and 6: uPSD34xx Contents 18.3 Connecting e
Page 7 and 8: uPSD34xx Contents 27.5 Timer mode .
Page 9 and 10: uPSD34xx Summary description 1 Summ
Page 11 and 12: uPSD34xx Pin descriptions 2 Pin des
Page 13 and 14: uPSD34xx Pin descriptions Table 2.
Page 15 and 16: uPSD34xx Pin descriptions Table 2.
Page 17: uPSD34xx Hardware description 3 Har
Page 21 and 22: uPSD34xx Memory organization 4.2.1
Page 23 and 24: uPSD34xx 8032 MCU core performance
Page 25 and 26: uPSD34xx 8032 MCU core performance
Page 27 and 28: uPSD34xx MCU module description 6 M
Page 29 and 30: uPSD34xx 8032 MCU registers the B R
Page 31 and 32: uPSD34xx Special function registers
Page 39 and 40: uPSD34xx 8032 addressing modes 9.4
Page 41 and 42: uPSD34xx 8032 addressing modes addr
Page 43 and 44: uPSD34xx uPSD34xx instruction set s
Page 45 and 46: uPSD34xx uPSD34xx instruction set s
Page 47 and 48: uPSD34xx Dual data pointers 11 Dual
Page 49 and 50: uPSD34xx Dual data pointers LOOP: M
Page 51 and 52: uPSD34xx Debug unit up to VCC as de
Page 53 and 54: uPSD34xx Interrupt system If an int
Page 55 and 56: uPSD34xx Interrupt system 13.1 Indi
Page 57 and 58: uPSD34xx Interrupt system Table 18.
Page 59 and 60: uPSD34xx MCU clock generation 14 MC
Page 61 and 62: uPSD34xx MCU clock generation Figur
Page 63 and 64: uPSD34xx Power saving modes 15 Powe
Page 65 and 66: uPSD34xx Power saving modes Table 2
Page 67 and 68: uPSD34xx Oscillator and external co
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uPSD34xx I/O ports of mcu module 17
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uPSD34xx I/O ports of mcu module CP
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uPSD34xx I/O ports of mcu module Ta
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uPSD34xx I/O ports of mcu module ou
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uPSD34xx I/O ports of mcu module Ta
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uPSD34xx MCU bus interface A[10:8]
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uPSD34xx MCU bus interface Table 37
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uPSD34xx Supervisory functions 19 S
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uPSD34xx Supervisory functions To p
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uPSD34xx Standard 8032 timer/counte
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uPSD34xx Serial UART interfaces 21
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uPSD34xx Serial UART interfaces SM2
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uPSD34xx Serial UART interfaces 21.
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uPSD34xx Serial UART interfaces Fig
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uPSD34xx IrDA interface 22 IrDA int
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uPSD34xx IrDA interface Table 51. B
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uPSD34xx I 2 C interface 23 I 2 C i
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uPSD34xx I 2 C interface A few thin
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uPSD34xx I 2 C interface 23.6 Gener
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uPSD34xx I 2 C interface 23.8 I 2 C
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uPSD34xx I 2 C interface Table 56.
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uPSD34xx I 2 C interface 23.12 I 2
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uPSD34xx I 2 C interface Table 62.
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uPSD34xx I 2 C interface Set global
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uPSD34xx I 2 C interface Else If mo
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uPSD34xx I 2 C interface Does statu
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uPSD34xx SPI (synchronous periphera
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uPSD34xx USB interface 25 USB inter
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uPSD34xx USB interface 25.1.2 Endpo
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uPSD34xx USB interface 25.2 Types o
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uPSD34xx USB interface Figure 53. C
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uPSD34xx USB interface Figure 54. F
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uPSD34xx USB interface Command Valu
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uPSD34xx USB interface Table 70. US
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uPSD34xx USB interface ● USB IN F
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uPSD34xx USB interface ● USB Glob
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uPSD34xx USB interface ● USB OUT
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uPSD34xx USB interface ● USB Cont
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uPSD34xx USB interface ● USB Endp
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uPSD34xx USB interface Bit Symbol R
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uPSD34xx USB interface ● USB Setu
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uPSD34xx Analog-to-digital converto
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uPSD34xx Analog-to-digital converto
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uPSD34xx Programmable counter array
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uPSD34xx PSD module 28 PSD module T
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uPSD34xx PSD module 28.1.5 SRAM pro
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uPSD34xx PSD module 28.1.11 OMCs sm
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uPSD34xx PSD module 28.1.16 Power m
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uPSD34xx PSD module Table 103. HDL
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uPSD34xx PSD module Figure 67. Mapp
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uPSD34xx PSD module 28.2.7 The VM r
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uPSD34xx PSD module Note: x = NA Th
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uPSD34xx PSD module Register Name P
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uPSD34xx PSD module Table 107. Flas
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uPSD34xx PSD module 28.5.7 Toggle f
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uPSD34xx PSD module attempted to pr
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uPSD34xx PSD module indicate when a
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uPSD34xx PSD module If a Suspend Se
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uPSD34xx PSD module The DPLD perfor
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uPSD34xx PSD module Figure 74. DPLD
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uPSD34xx PSD module Figure 75. DPLD
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uPSD34xx PSD module 28.5.28 Output
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uPSD34xx PSD module Native product
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uPSD34xx PSD module 28.5.32 OMC mas
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uPSD34xx PSD module 28.5.34 I/O por
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uPSD34xx PSD module Port Operating
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uPSD34xx PSD module Table 126. MCU
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uPSD34xx PSD module After PSDsoft E
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uPSD34xx PSD module Table 135. Latc
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uPSD34xx PSD module mode, making th
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uPSD34xx PSD module See Figure 85 f
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uPSD34xx PSD module if they are use
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uPSD34xx PSD module Figure 88. Port
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uPSD34xx PSD module register to “
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uPSD34xx PSD module 28.5.52 Automat
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uPSD34xx PSD module Figure 89. Auto
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uPSD34xx PSD module of PLD input tr
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uPSD34xx PSD module In PLD I/O mode
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uPSD34xx PSD module Figure 91. JTAG
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uPSD34xx PSD module TSTAT and TERR
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uPSD34xx PSD module Figure 95. Exam
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uPSD34xx AC/DC parameters 29 AC/DC
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uPSD34xx AC/DC parameters I CC (MCU
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uPSD34xx DC and AC parameters 31 DC
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uPSD34xx DC and AC parameters Idle
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uPSD34xx DC and AC parameters Table
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uPSD34xx DC and AC parameters Figur
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uPSD34xx DC and AC parameters Note:
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uPSD34xx DC and AC parameters Symbo
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uPSD34xx DC and AC parameters Symbo
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uPSD34xx Package mechanical informa
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uPSD34xx Important notes 34 Importa
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uPSD34xx Important notes implemente
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uPSD34xx Important notes 34.12 Inco
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uPSD34xx Please Read Carefully: Inf
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