CARLETON UNIVERSITY Laboratory 2.0 - Department of ...

Carleton University
FIGURE 4 Making an adder into a combination add-subtract unit.t
The gate in the box, inverts “x i” when the control signal Sub(H)/Add(L) is High (1),
and passes “x i” with no change when Sub(H)/Add(L) is Low (0).
This is a fairly common logic gate. Can you give this gate’s name?
Detecting Overflow
SUB(H)/ADD(L)
SWITCH
The switch inverts x i when high, “1”
and does not invert when low, “0”.
When it is high, it also injects
a “1” into “c 0”.
In 3-bit two’s complement operations, overflow will occur when more than 3 bits are needed to represent
the result. This is equivalent to saying that overflow will occur when the sum or difference is over
+3 or under -4.
In hardware, one can detect overflow by checking the carries in and out of the most significant bit, that
is carries C2 and C3 . IfC2 ≠ C3 then an overflow has occurred. This is too hard to prove here. 1
What kind of a gate can check for inequality?
FIGURE 6 A controlled inverter circuit..
c 3
1. One can start by noting there can be no overflow unless the numbers have the same sign. Adding a positive and a
negative number gives a sum with a smaller magnitude than either input.
Lab2-4 SWITCHING CIRCUITS © J.Knight, January 23, 2002
y 2
FULL
ADDER
s 2
x 2
INVERT
CNTRL
c 2
y 1
FULL
ADDER
s 1
x 1
INVERT
CNTRL
c 1
y 0
FULL
ADDER
s 0
x 0
INVERT
CNTRL
A Controlled Inverter
To build a combination adder/subtracter, one needs a way to invert or not invert on command
FIGURE 5 A controlled inverter circuit..
Sub(H)/Add(L) Xi Zi 1 0 1
1 1 0
0 0 0
0 1 1
c2 c3 Ovf
1 0 1
1 1 0
0 0 0
0 1 1
X i
Sub(H)/Add(L) gate Z i = X i IF Sub(H)/Add(L) = 0
X i IF Sub(H)/Add(L) = 1
c 2
c 3
gate
Ovf
c 0