DeMorgan's Theorem - Department of Electronics at Carleton ...

DeMorgan’s Theorem DeMorgan’s Theorems, Simple Forms 

DeMorgan’s Theorem 

DeMorgan’s Theorems, Simple Forms 

DeMorgan 

A + B = A·B 

A B A B A+B 

0 

0 

1 

1 

0 

1 

0 

1 

1 1 

1 0 

0 1 

0 0 

1 

1 

1 

0 

A 

B 

A 

B 

A + B = A·B 

(DeM1) D + E = D·E (DeM2) 

Inverse The dual inverse 

AB AB 

0 1 

0 1 

0 1 

1 0 

Equivalent graphical forms: 

A·B = K = A + B 

NAND 

K 

A 

B 

NAND 

K 

A·B = C = A + B 

AND 

C 

A 

B AND 

AND 

C 

The dual DeMorgan 

D E 

0 0 

0 1 

1 0 

1 1 

D·E = D + E 

D+E D E 

1 

0 

0 

0 

1 1 

1 0 

0 1 

0 0 

Printed; 22/12/05 Department of Electronics, Carleton University 

Slide 29 

Modified; December 22, 2005 © John Knight Digital Circuits p. 56 

D 

E 

D·E 

1 

0 

0 

0 

D + E = G = D·E 

NOR 

G 

D 

E 

NOR 

D 

E 

G 

D + E = F = D·E 

OR 

F 

D 

E 

OR 

DeMorgan’s Theorem DeMorgan’s Theorems 

DeMorgan’s Theorems 

A theorem relating NANDs and NORs. 

• An OR gate with inverted inputs is equivalent to an AND gate with an inverted output. 

• An AND gate with inverted inputs is equivalent to an OR gate with an inverted output. 

• Inverting inputs and outputs of an OR makes it an AND. 

• Inverting inputs and outputs of an AND makes it an OR. 

EXAMPLE 

Convert (a + b)(a + c) to an expression with 3 letters and inversion bars only over single letters. 

(a + b)(a + c) = (a + b) + (a + c) (DeM1) 

41.• PROBLEM 

Reduce (a+b) + a·b to four letters with inversion bars over single letters only. 


Reduce d(de) + (de)e to four letters with inversion bars over single letters only. 

Changing everything into NOT and AND gates 

It turns out that any logic circuit can be made from AND and NOT gates. DeMorgan’s law can be used to 

transform the circuits. 


= (a·b) + (a·c) (DeM2) 

= a·b + a·c 

= a(b + c) 

(Clear brackets) 

(D1) xy + xz = x(y+z) 

Convert ((rw + t)u + r)t into a function with only AND and NOT operations. 


Comment on Slide 29 


F

DeMorgan’s Theorem Real CMOS Digital Gates 

Real CMOS Digital Gates 

Transistor NOT 

JOLT Small FREE Jolt JOLT Small FREE Jolt 

+V DD 

A 

Q 1 

Transistor NAND 

F 

E 

NAND 

VDD 

EF 

Two switches 

linked together 

F 

+ 

+V DD 

A=1 => Q 1 closed => F=0 

E and F=1 

=>Output 

Grounded 

Output 

Inverted 

A 

B 

A 

Transistor NOR 

NOR 

VDD 

A+B 


Comment Slide 30 on Slide 1 


Q 1 

+5 V 

X X 

F 

B or A=1 

=>Output 

Grounded 

Output 

Inverted 

PMOS transistor acts like: 

closed switch when A is “0” 

open switch when A is “1” 

NMOS transistor acts like: 

open switch when A is “0” 

closed switch when A is “1” 

• One cannot make AND 

or OR gates directly. 

• All CMOS Gates Invert 

• Real Gates are 

NAND, NOR and NOT 


Constructing CMOS gates from transistors 


CMOS stands for Complementary Symmetry Metal-Oxide-Semiconductor gates. They always have 

complementary transistors, which means PMOS (turn off with a one input) above the output, and NMOS (turn 

on with a one input) below the output. 

The correct one inputs turn the lower NMOS transistors on, which 

pulls the output down to zero thus inverting the output. 

The Easily Constructed CMOS Gates 

NANDs with 2, 3 or 4 inputs, NORs with 2, 3 or 4 inputs, and NOTs. 

Gates constructed from other gates 

To avoid all the extra inverters (NOTs) real circuits are designed to use 

NANDs and NORs instead of ANDs and ORs. 

Thinking 

• Thinking in NAND-NOR logic is difficult. Just look at any industrial schematic used extensively for 

maintenance. The margin will be full of “1”s and “0”s pencilled in by users. 

• Converting AND-OR into NAND-NOR is a straightforward mechanical process. 

• Much less error prone than doing logic with inverted signals 1 and NAND-NOR logic. 

These Notes 

• If the logic is important ANDs and ORs will be used. 

• If the gate design is important, as when we talk about CMOS gates, NANDs and NORs will be used. 

1. If “flash” is a signal name, “flash” is an inverted signal. 

How an OR 

is made 




a 

b 

How an AND 

is made 

One way of making an XOR 

See problem 41. 

a⊕b

DeMorgan’s Theorem Real CMOS Digital Gates 

Using DeMorgan’s Theorem 

AND 

AND 

Equivalent Gate Symbols 

NAND 

NAND 

Real Gates are NAND and NOR Easy to Understand Gates 

are AND and OR 

NAND 

AND 

NOR 

One cannot make AND and 

OR gates directly. 

a 

b 

c 

d 

NAND 

NAND 

NAND 

Which one is easier for you to understand? 


Slide 31 


NOR 

AND OR 

Circuit with real gates Circuit with simple gates 

F = (ab) • (cd) 

F 

NOR 

a 

b 

c 

d 

AND 

AND 

F = ab + cd 



The two expressions for the circuit with real gates and the circuit with simple gates, are equivalent 

Use High-True And-Or Signals for Thinking 

Thinking 

• Thinking in nand-nor logic is difficult. Just look at any industrial schematic used extensively for 

maintenance. The margin will be full of “1”s and “0”s pencilled in by users. 

• Converting between and-or and nand-nor is a straightforward mechanical process. 

• Much less error prone than doing logic with asserted low signals and nand-nor logic. 

These Notes 

ab + cd = F = (ab) • (cd) 

• If the logic is important ANDs and ORs will be used. 

• If the gate design is important, as when we talk about CMOS gates, NANDs and NORs will be used. 


Prove, using DeMorgan’s Theroem(s), that 

ab + cd = (ab) • (cd) 




OR 

F 

OR 

OR

DeMorgan’s Theorem Circuits Using NANDs and NORS are 

Circuits Using NANDs and NORS are Hard to Follow 

Example 

Don’t do thinking with NANDs and NORs. 

Confusing multiple logic inversions. 

Does water stop or start the train? 

Is SW1 a start or stop switch? 

SW1 

PWR 

AIR 

DOOROPN1 

DOOROPN2 

WATER 

U1.1 

U1.2 

U1.3 

Do Thinking Part of Design with AND/OR; 

Convert After Thinking is Done 

SW1·PWR + AIR·(DOOROPN1·DOOROPN2) + WATER 

The same circuit made with ANDs and ORs. 

The final equation can be written from inspection. (Is there a logic error?) 

SW1 

PWR 

AIR 

DOOROPN1 

DOOROPN2 

WATER 


Slide 32 


U3.1 

Start_O-Train 

Start_O-Train 

SW1·PWR·AIR·(DOOROPN1 + DOOROPN2)·WATER 

DeMorgan’s Theorem Starting The O-Train 

Starting The O-Train 1 

The AND-OR logic is much clearer. It takes air, power, water to start the train. Also two doors must not be 

open. However it takes 4 gates and 6 inverters to implement the AND-OR circuit made by adding inverters to 

NANDs and NORs. The less clear NAND-NOR circuit does the same logic, with 4 gates and 1 inverter. 

NAND-NOR Logic is Confusing to Humans 

Multiple negatives are confusing 

If your teacher said, “Never will I not, not give you a A in Digital Circuits,” it would take you some careful 

reading to determine your mark. 

Diagrams with real gates 

This is the kind of diagram one would use to build a circuit. 

It has easily manufacturable gates, i.e. NOT, NAND and NOR. 

The numbers U1.1 etc. are gate numbers that would physically identify the gate on a layout diagram showing 

where each part was. 

Easy to read diagrams 

You should be able to spot the logic error. 

DOOROPN1 + DOOROPN2 

Should you be able to start the train with one door open? 

1. The O-Train is an Ottawa interurban train, which stops right outside the Engineering Building at Carleton University. 



Modified; December 22, 2005 © John Knight Digital Circuits p. 63

DeMorgan’s Theorem DeMorgan Transfers Real Gates Into 

DeMorgan Transfers Real Gates Into Simple Gates 

Circuit with real gates Circuit with simple gates 

a 

b 

c 

d 

NAND 

NAND 

NAND 

F = (ab) • (cd) 

• Circuits meant for understanding the logic use ANDs and ORs. 

- Draw your circuits with ANDs and ORs. 

• Circuits for construction are drawn with NANDs and NORs. 

Draw construction diagrams by: 

F 

NAND 

NAND 

NAND 

Use DeMorgan’s NAND 

gate symbol at output 

- transforming the understandable circuit into the real circuit 

- using the DeMorgan alternate symbols. 

NAND 

NAND 

• Thus Compromise drawings have NANDS and NORs 

with the circles are arranged to cancel each other. 

NAND 

Inverting circles 

cancel each other 


Slide 33 


a 

b 

c 

d 

NAND 

NAND 

AND 

AND 

OR 

F = ab + cd 

NAND 

alternate 

NAND 

symbol 

DeMorgan’s Theorem Transforming NAND-NOR Diagrams into 

Transforming NAND-NOR Diagrams into AND-OR Diagrams 

• Diagrams in this course will be drawn with ANDs and ORs as much as possible. 

• Diagrams for construction or maintainance, that want to show exactly what gates were used, will be 

drawn with NANDs and NORs. This is particularly true of older diagrams. 

• A compromise method, which is almost as easy to follow, but shows 

the real gates as used, is to make alternate gates with the alternate 

symbols, the ones with the inverting circles on the inputs. 

NOR NAND 

NOTE: 

One output circle cancels all the input circles it feeds. 


Transform this circuit into simple gates. 

a) 




F

Don’t do initial design in NANDs and DeMorgan Transfers Real Gates Into 

Rational 

Don’t do initial design in NANDs and NORs. 

Design in AND/OR; 

Convert After Thinking is Done 

• People think best with AND and OR. 

• Multiple inversions are very confusing 

• There is seldom a logical reason to invert except at circuit inputs. 

• Conversion AND/OR ⇒ NAND/NOR is easy using DeMorgan’s form of gates. 

Do it after the thinking is done. 

Some people still seem to prefer designing with NANDs and NORs 

but not in this class 


Slide 34 


Don’t do initial design in NANDs and Design With Conceptually Easy Logic 

Design With Conceptually Easy Logic 

In the post 2000 era, people usually think about the logic. The details of construction are done automatically. 

This means you will normally do AND-OR type logic. 

Think with AND-OR 

Build with NAND-NOR 

DeMorgan’s Law Transforms Real Gates to Simple Gates 


Transform this circuit into simple gates. 




Don’t do initial design in NANDs and AND/OR to NAND/NOR Conversion 

AND/OR to NAND/NOR Conversion 

Example using graphical form 

1. Start with AND/OR circuit 

F = (a + c)(b + c) + cd 

2. Select alternate connection layers. 

(Every second layer of connecting wires 

between layers of gates.) 

One end of wires may be inputs or outputs. 

3. Put back-to-back inverting circles on both 

ends of the leads. 

Add NOT gates when necessary ((a), (b) 

and (c)) 

4. Moving inverters, or inverting bubbles may 

make logic simpler. 

• Sometimes inverters on two (or more) input 

leads should be moved to the output. 

(See next example) 


Slide 35 


Don’t do initial design in NANDs and Converting AND/OR Designs to NAND/ 

Converting AND/OR Designs to NAND/NOR 

input 

b 

c 

a 

d 

skip 

1. Start with an AND-OR circuit. If you are starting with an equation. draw the circuit. 

• The original formula will usually have inversions only on inputs. However there may be inversions anywhere. 

2. The circuit is drawn with a layer of connections which feeds a 

layer of gates, feeding a layer of connections (green), which 

feeds another layer of gates, which feeds another layer of 

connections (green). Some circuits may have more or fewer 

layers. Select alternate connection layers. 

• Some circuits are nicely layered with the first layer 

feeding a second layer which feeds a third layer etc. However this step is not exact. There are often 

several legitimate ways to define layers. Note some wires, like (a) and (b) may pass through a gate 

level (green) without a gate. 

3. Put back-to-back inverting circles at both ends of wires going through a connection layer. On leads like (a) 

and (b), you will have to add an inverter, since there is no gate on which to place the second circle. 

4. This step is less automatic. Look for leads where two inverters can be replaced by one. When doing this be 

careful not to invert a other connections on the same input, like (h). When moving inverting circles make 

sure that the number of circles between the signal input and all the gate inputs it goes to, are the same before 

and after moving. 

1 

BEFORE AFTER 

2 

3) 

Number of inversions 

from input to this gate input 




1 

(h) 

2 

(a) 

(h) 

4) 

(b) 

(b) 

(a) 

skip 

Number of inversions 

from input to this gate input 

3) 

4) 

2) 

1) 

F 

(c)

Don’t do initial design in NANDs and AND/OR to NAND/NOR Conversion 

AND/OR to NAND/NOR Conversion 

4. Copy of step 4 on last slide: 

It has back-to-back bubbles 

and consolidated inverters 

5. Select the unconventional gates. 

The ones with input bubbles. 

This is a compromise solution which is: 

• fairly readable 

• represents real gates 

6. Use DeMorgan laws on the 

unconventional gates. 

• Hard to understand the logic 

• but good for construction. 


Slide 36 


b 

c 

a 

d 

NOR 

NAND 

NAND 

Don’t do initial design in NANDs and Converting AND/OR Designs to NAND/ 

On previous slide 

• You must always add two inverting circles to a lead, or none. Never add just one circle, not even if one 

exists already. 

On this slide 

5. Look at the gates. Conventional ones have circles on their outputs and are NANDs, NORs or NOTs. 

The unconventional ones have circles on their inputs but are still NANDs, NORs or NOTs. 

• This step gives a circuit which is fairly easy to read because one can mentally cancel the back-to-back 

circles. However it still represents a circuit you can build easily because it does not contain ANDs and 

ORs. 

6. If desired, one can replace the DeMorgan forms of NOR and NAND, the 

ones with circles on the inputs, with the more standard forms with a circle 

on the output. 

• Since NAND-NOR diagrams represent real gates, do not place a single circle on the input of a gate, as 

was done in the theoretical AND-OR diagram. 

47.• PROBLEM:. 

For the circuit on the right, find the NAND-NOR circuit when 

the connection on the levels shown are selected. 

A 

B 

C 

D 

E 

H 

G 

F 





NOR 

Find an AND-OR equivalent for the circuit on the left. 

This requires working backwards. 

4) 

5) 

6) 

F 

F 

G

Don’t do initial design in NANDs and 2nd Example of AND/OR to NAND/NOR 

2nd Example of AND/OR to NAND/NOR 

b 

c 

a 

d 

1) AND/OR circuit; F = (a + c)(b + c) + cd 

3) Add cancelling back-to-back inverting circles 

add inverters where necessary. 

5) Select the unconventional gates. 

F 

2) Select every other connection levels 

4) Input inverters pairs may become single 

inverters if moved to the gate output 

F 

b 

c 

a 

F 

6) DeMorgan conventional gates (optional). 

Compromise Answer Conventional (Dinosaur) Answer 


Slide 37 


Don’t do initial design in NANDs and AND/OR NAND/NOR Conversion 

AND/OR ⇐⇒ NAND/NOR Conversion (cont) 

This is the same circuit as the previous example. 

The difference between the examples starts at step 2 




d 

SKIP 

2. the alternate blocks of leads where the inverters are added are that ones marked SKIP in the first example. 

Compare step 2 here with step 2 on Slide 35. 

3. In this step, the two inverters feeding the OR with inverting inputs looks too complex. 

Throwing out the double circles leaves us with an OR gate. This is not allowed. 

Go to the output of the OR and add back-to-back inversions there. This gives a NOR gate which is allowed. 

Both the lower gates on the right are 

equivalent to an OR gate, but one is 

simpler to implement as real gates. 

Equivalent gates 

6. Changing the NORs and NANDs with circles on their inputs, to NORs and NANDs with circles on their 

outputs, is the final step. Do it if you like such drawings better, or if the drawing standards your company 

uses require it, or if your boss says to. 

• Compare the results with those in steps 5 and 6 of the previous example. This circuit is marginally 

simpler than the previous result. One NOT gate is saved. 

F

DeMorgan’s Theorems, General Form 2nd Example of AND/OR to NAND/NOR 

DeMorgan’s Theorems, General Form 

Abstract Form 

F(A,B,C, . . . +, ·,) = F(A,B,C, . . . ,·, +,) 

Action Example I 

a) Take a Boolean expression 

b) Bracket all groups of ANDs 

Take dual 

c) Change AND → OR and OR → AND 

d) Clean brackets 

Change dual into inverse 

e) Invert all variables 

F = A·B·C 

F = {A·B·C} 

F dual = {A + B + C} 

F dual = A + B + C 

F = {A + B + C} 


Slide 38 


DeMorgan’s Theorems, General Form General Form of DeMorgan’s Theorem 

General Form of DeMorgan’s Theorem 

The slide shows a simplified version 

The true generalized DeMorgan 

F(A,B,C, . . . +, ·,0,1) = F(A,B,C, . . . ,·, +,1,0) 

F(A,B,C, . . . +, ·,0,1) = F(A,B,C, . . . ,·, +,1,0) 

The interchange of 0 and 1 was left out on the slide, since designers practically never have 0 or 1 in the 

expressions they operate on with DeMorgan’s law. 

DeMorgan’ general law is very similar to Duality 

The obvious difference is the inverting bars. 

Another important difference is the application. 

• DeMorgan transforms an expression into its inverse. 

• Duality takes a valid identity and generates another valid identity. 


Find an expression for F that has inverting bars only over single letters, 

F = (a + c)(b + c) + cd 




Examples: Generalized DeMorgan’s 2nd Example of AND/OR to NAND/NOR 

Example II 

Examples: Generalized DeMorgan’s Theorems 


F(A,B,C, . . . +, ·,) = F(A,B,C, . . . ,·, +,) 

a) Take a Boolean expression F = A·B·C + A·B 

Take dual 


e) Clean brackets 

Change dual into inverse 


Example III 

a) Take any Boolean expression 


c) Change AND →OR and OR →AND 

Ignore any existing overbars 

d) Clean brackets 


{A·B·C} + {A·B } 

F dual = {A+B+C}·{A+B } 

F dual = (A+B+C)·(A+B ) 

F = (A+B+C)·(A+B ) 

F = [A·B·C + D·(A·B + C)]·A 

F = {[ {A·B·C } + {D·( {A·B} + C)} ]·A} 

F dual = {[{A + B + C}·{D + ({A + B}·C)}] + A} 

F dual = {A + B + C}·{D + {A + B}·C} + A 

F = {A + B + C}·{D + {A + B}·C} + A 


Slide 39 


Examples: Generalized DeMorgan’s Examples using the Generalized 

Examples using the Generalized DeMorgan’s Law 

Be sure to put brackets around the ANDs 

When you do algebra, you automatically do the ANDs before the ORs. The notation is designed that way. 

Putting brackets around an OR shows that the OR should be done before the AND. 

When you use DeMorgan’s law, and you transform 

ab + cd into (a+b)(c+d), 

the brackets make sure that the variables in the transformed expression are operated on in the same order. That 

is you don’t try to do a(b + c)d. 

By placing the brackets around the ANDs first, you do not get confused during the transformations. 


(a) Convert (a + b)(a + c) to an expression with 3 letters and inversion bars only over single letters, using the 

Generalized DeMorgan’s law. 

(b) Compare this method with that of the Example on Comment on Slide 29 and see if the algebra is shorter. 




Examples: Generalized DeMorgan’s Examples: Generalized DeMorgan’s 

Examples: Generalized DeMorgan’s Theorems 

Note: 

Example IV 

a) Take a Boolean expression F = A·B·C + A·B 



Ignore existing overbars 

d) Clean brackets if convenient 


Ignore any inverting overbars except over single letters 

{A·B·C} + {A·B } 

F dual = {A+B+C}·{A+B } 

F dual = (A+B+C)·(A+B ) 

F = (A+B+C)·(A+B) 

F = A·B·(C + A·B) F dual = {A·B}·(C+ { A·B }) F = {A+B}+(C·{ A+B }) 


Slide 40 


Examples: Generalized DeMorgan’s Examples using the Generalized 

Examples using the Generalized DeMorgan’s Law 

Common Worry, Intermediate Overbars 

When applying the generalized law, do not cosider any overbars except those on top of single letters. If the 

overbar is over two or more letters, just carry it through without change. 


Use DeMorgan’s general law to remove all but one of the inverting bars from the dinosaur circuit on Slide 37. 

The expression is 

f = (b+c)·a·c·(c·d) 




Canonical Forms Sum of Products 

Standard templates 

Canonical Forms 

• Every logical expression can be converted to either of these forms. 

Sum of Products 

S of Π, OR of ANDs 

• Variables ANDed together into terms. 

• These terms are ORed together. 

• Inversions are only over individual variables. 

• No brackets. 

Product of Sums. 

P of S, AND of ORs 

• Single variables ORed together into terms. 

• These terms are ANDed together. 

• Inversions are only over individual variables. 

• Brackets only around variables in OR terms 

Questions 

Is ab + cd + b(d+e) S of Π ? 

Is (a +bc)(d+e) P of S ? 

abc + cde + ad + f + db 

(a+b+c)(c+d+e)(a+d)(f)(d+b) 


Slide 41 


Canonical Forms Canonical Forms 

Canonical Forms 1 

Definition of a Boolean Function 

A function is a way of getting the output from the inputs. 

A function can be defined in many ways. 

• The truth table is a very basic definition 

• A Σ of Π expression. → ab + ab 

• A Π of Σ expression. → (a + b)(a + b) (factored form) 

Other forms that will be introduced shortly. 

• Karnaugh maps 

• Binary decision diagrams 

Why we say S of P for Sum of Product 

n 

Σ is used for a repetitive addition, as in ∑ x 

i 

= x 

0 

+ x 

1 

+ x 

2 

+ …x , 

n 

i = 0 

Π is used for a repetitive product, as in 

n 

∏ x 

i 

= x 

0 

x 

1 

x 

2 

…x 

n 

i = 0 

1. Canonical means according to the rule or law, particularly the church law. 

a b a⊕b 

0 0 0 

0 1 1 

1 0 1 

1 1 0 




Karnaugh Maps Product of Sums. 

abc F abc F 

000 

001 

011 

010 

100 

101 

111 

110 

Karnaugh Maps 

A truth table, order is important Redraw the truth table 

abc F abc F 


Slide 42 


000 

001 

011 

010 

Label abc on 

the sides 

a 

bc 0 1 

00 

Another way 

of labelling 

a a 

b·c 

Abbreviated 

labelling 

a 

01 

11 

10 

b·c 

b·c 

b·c 

b 

c 

100 

101 

111 

110 

Put the input labels on the sides; leave the empty boxes for F. 

Arrange the rows so that only one input bit changes at a time. 

00 

0 1 

01 

11 

10 

a 

Combined labeling 

bc 

b 

c 

Karnaugh Maps Karnaugh Maps 

Karnaugh Maps 

The map is like a truth table 

Each square on the map represents a different input combination. 

All possible input combinations are represented on the map. 

The inputs are labelled around the edges of the map. Not inside the squares as shown on the right. 

Arrangement of the squares 

As one steps from one square to the next, either up, down, left or right, only one bit should 

change in a single step. If one goes to the nearest diagonal neighbor, two bits will change. 




one bit change 

one bit change 

abc abc 

000 

001 

011 

010 

100 

101 

111 

110


Karnaugh Maps 

b 

Different Functions using AND 

bc 

00 

01 

11 

10 

a 

bc 

00 

01 

11 

10 

0 1 a 

0 1 

1 

F=abc 

1 

1 1 1 

F=b 

c 

b 

a 

bc 

00 

01 

11 

10 

0 1 

1 

c 

F=abc (010) 


Slide 43 


b 

a 

bc 

00 

01 

11 

10 

All the squares where a=0, b=1. 

All the squares where b=1. 

b 

bc 

00 

01 

11 

10 

0 1 a 

1 

1 

1 

1 

F=? 

c 

All the squares 

where 

Wrap 

around 

0 1 

F=ab 

c 

a 

bc 

00 

01 

11 

10 

0 1 

1 1 1 

1 

b 1 1 

b 

bc 

00 

01 

11 

10 

0 1 a 

1 

1 

F=? 

F=b 

c 

b 

c 

a 

1 1 1 

1 

1 1 

1 1 

Karnaugh Maps Representing AND Terms 

Representing AND Terms 

Any single square 

(Top row, first two maps) 

On these maps, any single square represents specific values for three variables, this is the same as a three term 

AND like abc 

Any two adjacent squares 

We made the maps so that only one variable changes at a time if one moves vertically or horizontally. 

(This is not true for diagonal movements). Thus two adjacent squares always have one common variable. 

In the top row, third map, the squares abc and abc are 1. We can say abc + abc = ab(c + c) = ab 

This shows that any two adjacent squares can be represented by a two term AND. 

Any three adjacent squares 

You can only circle if the number of squares is a power of 2. 

Any four adjacent squares 

(Top row, fourth map) 

There are two ways to look at this. One is that all the squares where b=1 have a “1” in them, hence one can 

describe them as b. 

Alternately one can note that squares that are “1” are abc + abc + abc + abc = b( a·c + a·c + a·c + a·c) = b. 

(bottom row, first two maps) 

These represent b and c respectively. 

Any eight adjacent squares 

If all the squares on a map are “1”, the function is F=1. 




F=? 

c


Karnaugh Maps 

Joining AND terms with ORs 

a 

bc 

00 

01 

11 

10 

0 1 

1 

F 1=abc 

The terms can overlap. 

bc 

00 

01 

11 

10 

0 1 

1 

1 

F 4=bc 

a 

bc 0 1 

a 

bc 0 1 

+ 

b 

00 

01 

11 

10 

c + 

b 

00 

01 

11 

10 

1 

1 

c = 

b 

bc 

00 

01 

11 

10 

1 

F 2=abc 

0 1 

1 

1 

F 5=ab 

c 

F 3=ac 

OR together the terms, and place them on one map. 

+ 

+ 


Slide 44 


bc 

00 

01 

11 

10 

0 1 

F 6=ac 

b 

bc 

00 

01 

11 

10 

Using the larger terms (F4, F5, and F6) gives a smaller expression for F. 

Bigger circles give smaller gates. 

b 

1 

1 

c 

= 

b 

0 1 a 

1 

1 1 

1 

c 

F = abc + abc + ac 

bc 

00 

01 

11 

10 

0 1 a 

1 

1 

1 

1 

c 

F = bc + ab + ac 

Karnaugh Maps Karnaugh Maps, Joining AND terms with 

Karnaugh Maps, Joining AND terms with ORs 

Circling maps in different ways 

Take the truth table for a Boolean function F, written as a map. 

One can circle it in several ways. 

First one can circle individual “1”s. This gives a long 

expression for F. 

Another way is to break it up as F 1 , F 2 and F 3 as shown on the 

top line on the slide. 

A third way is to break it into F 4 , F 5 , and F 6 , as shown on the 

bottom line in the slide. This gives a smaller equation. 

a 

bc 0 1 




b 

b 

00 

01 

11 

10 

1 

1 

1 

1 

c 

F 

F=abc + abc + abc + abc 

a 

bc 0 1 

00 

01 

11 

10 

1 

1 

1 

1 

c 

F= F 4 + F 5 + F 6 

= ab + ab + ac 

b 

a 

bc 0 1 

00 

01 

11 

10 

1 

1 

1 

F= F 1 + F 2 + F 3 

= abc + abc + ac 

b 

a 

bc 0 1 

00 

01 

11 

10 

1 

1 

1 

1 

1 

c 

c

Karnaugh Maps Karnaugh Maps Properties 

Karnaugh Maps Properties 

Maps for different numbers of input variables 

a 

0 

1 

One 

a 

0 

1 

b 

Two 

0 1 

Three 

a 

bc 

00 

01 

11 

10 

0 1 

Simplifying Logic 

Circle adjacent squares 

Must circle 1,2,4,8,16 ... squares (ones) 

1 

Diagonal squares 

not adjacent 

1 

1 1 1 

1 1 

1 

1 

1 1 

1 

1 

1 

1 

1 

1 

1 

1 

1 

1 

1 1 

cd 

ab 00 

00 

01 

11 

10 

Four 

d 

01 11 10 

c 


Slide 45 


1 

6 squares 

Circling with wrap around 

1 

1 1 

1 

b 

1 1 1 

Karnaugh Maps Karnaugh Map Properties 

Karnaugh Map Properties 

Maps may have any number of variables, but- 

• Most have 2, 3, 4, or 5 variable. One variable is simple, (2 squares). 

• five veriables has two 4x4 maps, one for when e=1, and one for when e=0. 

• Six variables have 64 squares and were used in pre-computer days. 

• Seven variables is past the limit of sanity. You will have 8 blocks of 16 squares each. 

Rules for circling “1”s 

• Ones on the maps can be circled to simplify logic. 

• Only adjacent squares can be circled. 

Diagonally adjacent squares are not considered adjacent. 

• Circles must surround 1, 2, 4, 8, 16 ... squares. Not 3, 5,6,7,9, ... 

• The maps wrap around. 

A square on an edge are adjacent to the square on the opposite edge in the same column (row). 

Larger circles give simpler logic, but- 

• One must obey the above rules. 

• There are exceptions, particularly with multi-output maps. 

51A.•PROBLEM 

circle the “1”s on the two maps shown. 




1 

1 

1 

1 

Five 

Six 

e 

e 

1 1 

1 

1 

1 

1

Karnaugh Maps Simplification With Karnaugh Maps 

Simplification With Karnaugh Maps 

Simplify ab + bc + ca 

b 

a 

bc 

00 

01 

11 

10 

0 1 

F = ab + bc + ca 

b 

bc 

00 

01 

11 

10 

1 

1 

1 

1 

0 1 a 

1 

1 

1 

1 1 

1 

ca 

F = a·b + bc + abc + ab 

c 

c 

The bc 

term is 

redundant 

OR together the terms, and place them on one map. 

Simplify a·b + bc + abc + ab 

a·b 

bc 

Use a 

bigger 

circle 

in the 

middle 

Using the larger terms (circles) gives a smaller expression for F. 

b 


Slide 46 


a 

bc 

00 

01 

11 

10 

0 1 

1 

1 

1 

1 

F = ab + ca 

a·b 

b 

bc 

00 

01 

11 

10 

ca 

c 

0 1 a 

1 

1 

1 

1 

1 

1 

F = a·b + c + ab 

ab + bc + ca 

The Consensus 

Theorem 

ab + bc + ca 

= ab + ca 

Karnaugh Maps Simplification of Boolean Function 

Simplification of Boolean Function 

A Boolean function can be defined in many ways 

• A truth table 

• A Karnaugh map without circles 

• A circled Karnaugh map. 

• A Σ of Π expression. 

• A Π of Σ expression. 

• etc. 

Any function has only one truth table and only one uncircled map. 

There are usually several ways of circling the map or writing the algebraic expression for the same function. 

One tries to find the best definition for some objective. 

Possible Objectives 

Smaller circuitry. 

Lower powered circuitry. 

Faster circuitry. 

Making the circuit smaller is usually a good start toward making the circuit faster and lower powered. 




c

Karnaugh Maps Simplification With 4-Input Maps 

Simplification With 4-Input Maps 

Simplify the function 

defined by this map 

cd 

ab 00 

00 

d 

01 11 10 

01 1 1 1 

a 

11 

10 

1 

1 

1 1 

c 



cd 

ab 00 

00 

d 

01 11 

1 

10 

01 1 1 

a 

11 

10 

1 1 1 

c 

b 

b 

John’s Solution Tom’s Solution 

cd 

ab 00 

00 

01 

11 

a 

10 

d 

01 11 

1 1 

1 1 

1 

10 

1 

1 

b 

cd 

ab 00 

00 

01 

11 

a 

10 

d 

01 11 

1 1 

1 1 

1 

10 

1 

1 

b 

c 

F=ac·d + a·bd + bc 

c 

F= ac·d + bd + bc 


cd 

ab 00 

00 

d 

01 11 

1 

10 

01 1 1 

a 

11 

10 

1 1 1 

c 

F=abd + a·cd + abd + abc 


Slide 47 


b 

a 

Usually bigger is better 

cd 

ab 00 

00 

d 

01 11 

1 

10 

01 1 1 

11 

10 

1 1 1 

c 

F= a·cd + bcd + abd 

Karnaugh Maps Simplification 

Simplification 

Some Things to Do 

Use the largest Circle possible 

John used abd when he should have used bd. 

Try to avoid unnecessary overlap 

John has two overlapping circles. Tom avoided both. 

51B.•PROBLEM 

Find the simplest S of P expression for the logic function F defined by the Karnaugh 

map on the right. 

Get F with 9 letters. If it takes more, do Prob 51A. 

cd 

ab 00 

00 1 

d 

01 11 

1 

10 

01 1 1 

a 

11 

10 1 

1 

1 

1 

1 

1 

c 

Map of F 




b 

b

Karnaugh Maps Simplification With 4-Input Maps 

Simplification With 4-Input Maps 




cd 

ab 00 

00 1 

01 

11 

a 

10 1 

d 

01 11 

1 1 

10 

1 

1 

1 

b 

cd 

ab 00 

00 1 

01 

11 

a 

10 1 

d 

01 11 

1 1 

10 

1 

1 

1 

b 

cd 

ab 00 

00 1 

01 

11 

a 

10 1 

d 

01 11 

1 1 

10 

1 

1 

1 

c 

c 

c 

F=a·b + acd + a·b·d F= ab + acd + b·d 

Don’t forget 4 corners 



John’s Solution Your Solution 

cd 

ab 00 

00 

01 1 

11 

a 

10 1 

d 

01 11 

1 1 

1 1 

1 

10 

1 

1 

b 

cd 

ab 00 

00 

01 1 

11 

a 

10 1 

d 

01 11 

1 1 

1 1 

1 

10 

1 

1 

b 

a 

cd 

ab 00 

00 

01 1 

11 

10 1 

d 

01 11 

1 1 

1 1 

1 

10 

1 

1 

c 

c 

essential 

c 

F=a·b·d + a·b·c + bcd+ ad +abc F= a·b·d + 


Slide 48 


Karnaugh Maps Simplification 

Simplification 

Essential Terms 1 

A term (circle) is essential if it contains at least one “1” that cannot be 

circled by any other circle, of the same or larger size.y 

“Your solution,” 

The term a·b·d, is essential in that no other circle (except smaller 

ones) will cover the square abcd=1000. 

a·b·c, is essential in that no other circle (except smaller ones) will 

cover abcd=0100. 

ad, is essential in that no other circle (except smaller ones) will 

cover abcd=0001 and 0011. 

One must have the circles for these essential terms. 

Squares Not Covered by Essential Terms 

All the “1” squares except 1111 and 1110 are covered by the essential 

terms. One must look for terms to cover these squares. This is the only 

place there is a choice. 

There are three terms that cover one or both of these squares. 

Choose the ones to give the simplest expressions. 


Find the simplest Σ of Π expression for the map d) on the right. 

1. This is often called an essential prime implicant. 

a·b·c 

cd 

ab 00 

00 

d 

01 11 

1 1 

10 

01 1 1 1 

a 

11 

10 1 

1 1 

1 

a·b·d 

c 

cd 

ab 00 

00 

d 

01 11 

1 1 

10 

01 1 1 1 

a 

11 

10 1 

1 1 

1 

c 




b 

b 

ad 

b 

b 

a) 

b) 

1111 

d 

1 1 

1110 

a 

1 

1 

1 1 

1 1 

1 

b 

c) 

c 

cd 

ab 00 

00 1 

d 

01 11 

1 

10 

1 

01 1 1 1 1 

a 

11 

10 1 1 

1 

1 

c 

b 

d)

Don’t Cares in Karnaugh Maps Simplification With 4-Input Maps 

decimal 

digit 

0 

1 

2 

3 

4 

Binary 

representation 

abcd 

0000 

0001 

0010 

0011 

0100 

Representing a 3-digit number 

with 12 bits. 

Digit 2 

a b c d 

0 1 1 1 

7 

Digit 1 

a b c d 

1 0 0 1 

9 

Don’t Cares in Karnaugh Maps 

Digit 0 

a b c d 

0 0 1 1 

3 

Binary Coded Decimals (BCD) 

decimal 

digit 

5 

6 

7 

8 

9 

Binary 


0101 

0110 

0111 

1000 

1001 


Slide 49 


abcd 

Map showing the values 

of abcd for each square 

cd 

ab 00 01 11 10 

00 0000 0001 0011 0010 

01 0100 0101 0111 0110 

11 1100 1101 1111 1110 

10 1000 1001 1011 1010 

not 

used 

x 

x 

x 

x 

x 

x 

Binary 


abcd 

1010 

1011 

1100 

1101 

1110 

1111 

Map showing the 

decimal equivalent 

of the input bits 

cd 

ab 00 

00 0 

d 

01 11 

1 3 

10 

2 

01 4 5 7 6 

a 

11 

10 

x 

8 

x 

9 

x 

x 

x 

x 

c 

Don’t Cares in Karnaugh Maps Binary-Coded Decimals 

Binary-Coded Decimals 

These are used mainly for sending numbers to displays which people have to read. 

Many years ago they were used to do commercial arithmetic. The story was that converting decimal fractions to 

binary caused small errors which could accumulate and throw off your bank account. 

For example $0.70 (decimal) = $0.1110,0110,0110,... (binary) 

Binary-coded decimal digits use 4 bits. 

The table shows that four of the sixteen 4-bit combinations are unused. 

If one has a circuit which has binary-coded decimal inputs there will be four input combinations which never 

happen. 

If they never happen, then one does not have to worry about the circuits output for these input combinations. 

These combinations are called don’t care inputs and can be used to simplify the circuit. 

52A.• PROBLEM 

Write the year in binary coded decimal. In 2003, you should have 16 bits. 




b

Don’t Cares in Karnaugh Maps Rounding BCD numbers 

Rounding BCD numbers 

Round 3-digit BCD numbers to 2-digit. 

783 round to 780 


785 round to 790 (arbitrary choice) 


Part (1) of Problem 

Detect if a BCD digit ≥ 5 

cd 

ab 00 

00 0 

01 

1 

11 

3 

10 

2 

01 4 5 7 6 

11 x x x x 

10 8 9 x x 

Map locations of 

BCD digits 

cd 

ab 00 

00 0 

01 

0 

11 

0 

10 

0 

01 0 1 1 1 

11 x x x x 

10 1 1 x x 

F=digit ‡ 5 

F 

Digit 

a b c d 

‡ 5 

Circuit 

red “1”s show 

digits ≥ 5 

(1) Least sig digit < 5 

- Send increment sig to next dig 

7 8 6 

0 1 1 1 1 0 0 0 0 1 1 0 

Incrm 

0 1 1 1 

7 

(2) If incrementing makes any digit >9 

- Clear digit to 0 

- Send increment sig to next dig 

7 

0 1 1 1 

Incrm 

1 0 0 0 

8 

0 1 

Incrm 

1 0 0 1 

9 

1 0 0 1 

1 1 

Incrm 

0 0 0 0 

6 

1 0 1 0 


Slide 50 


Don’t Cares in Karnaugh Maps Rounding BCD numbers. 

Rounding BCD numbers. 


Design the part (2) of the rounding circuit. A circuit that will check if: 

- the present digit is 9 AND 

- there is a carry in from the previous digit. 

If so, it will send a carry out to the digit on its left. 

Minimize the logic using don’t cares. 




9 

0 

‡ 5 

9 

0 

‡ 5 

1 0 0 1 

0 

1 1 

Incrm 

0 0 0 0 

0

Don’t Cares in Karnaugh Maps Don’t Cares In Karnaugh Maps 

Don’t Cares In Karnaugh Maps 

Detect if a BCD digit is 5 or more. 

Use of “Don’t Cares”. 

The BCD digits > 9 never happen 

We don’t care about output for them. 

Make these outputs “d” on the map. 

“d” may be circled or not as desired. 

Circle to minimize logic 

Here we circled 4 out of 6 “d”s 

This makes 

F= ac + bd + bc 

cd 

ab 00 

00 0 

d 

01 11 

0 0 

10 

0 

01 0 1 1 1 

a 

11 

10 

1 

1 

1 

1 

1 

0 

1 

0 

c 

b 

cd 

ab 00 

00 0 

01 

1 

11 

3 

10 

2 

01 4 5 7 6 

11 x x x x 

10 8 9 x x 

Map locations of 

BCD digits 

cd 

ab 00 

00 0 

01 

0 

11 

0 

10 

0 

01 0 1 1 1 

11 d d d d 

10 1 1 d d 

cd 

ab 00 

00 0 

01 

0 

11 

0 

10 

0 

01 0 1 1 1 

11 x x x x 

10 1 1 x x 

F= digit ‡ 5 

Inputs to cause the 6 “d” outputs never happens, 

but if they did: 

- the 4 circled outputs would now be “1”, and 

- the 2 uncircled ones would now be “0”. 

Digit 

a b c d 

‡ 5 

Circuit 

What’s with this? 


Slide 51 



Don’t Cares In Karnaugh Maps 

If one has input combinations that never happen, one does not care what outputs they generate because those 

outputs can never happen. 

We put don’t cares on the map squares for input combinations that never happen. 

One can circle these don’t cares or not as convenient. 

There is a common error on the slide. 

The circle ac could be extended to include all of a. 

This would give the final equation as 

F= a + bd + bc 


Take the hex digits 0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F. 

Plot their location on a Karnaugh map in the same way the BCD digits were plotted. 

Then design a logic circuit which will use four bits w,x,y,z (defining a hex digit as input, and give a high 

output if the digit is divisable by 3, i.e. it is 3, 6, 9, C or F. 


Design a circuit which will use four bits a,b,c,d defining a BCD digit as input, and gives a high output if the 

digit is divisable by 3. Utilize the inputs that cannot happen, to give don’t care outputs, and hence simplify the 

logic. 




F


Simplification With Don’t Cares 



cd 

ab 00 

00 1 

01 d 

11 

a 

10 1 

d 

01 11 10 

1 

1 

1 d 1 

c 

b 

cd 

ab 00 

00 1 

01 d 

11 

a 

10 1 

d 

01 11 10 

1 

1 

d 

1 d 1 

c 

b 

cd 

ab 00 

00 1 

01 d 

11 

a 

10 1 

d 

01 11 10 

1 

1 

d 

1 d 1 

c 

b 

F= ab + acd + b·d 

F=a·b + a·d 

Don’t have to circle all the “d”. 4 corners not so good 



cd 

ab 00 

00 d 

d 

01 11 

d 

10 

1 

a 

01 

11 

10 

1 

1 

1 

1 

d 

d 

d 

d 

d 

1 

b 

c 



cd 

ab 00 

00 d 

d 

01 11 

d 

10 

1 

a 

01 

11 

10 

1 

1 

1 

1 

d 

d 

d 

d 

d 

1 

b 

c 

F= ab + bcd +b·d + ab 

cd 

ab 00 

00 d 

d 

01 11 

d 

10 

1 

01 1 1 d d 

a 

11 

10 1 

1 

d d 

d 

1 

c 

F=ab + cd + a·d 


Slide 52 



56.• PROBLEM. 

In the lab you designed one block of a comparator for two 

binary numbers X=x 2 x 1 x 0 and Y=y 2 y 1 y 0 . The block compared 

x i with y i and also utilized input A i+1 , B i+1, from the 

comparison done for higher order bits, to give outputs A i and B i 

A typical block is shown. We drop the cumbersome subscripts 

and write A - , B - to tell the A, B inputs from the outputs. 

The “- -” in the 5th line of the truth table inputs means that if 

A,B = 1,0 then, no matter what x and y are, the output is 

A - ,B - = 10. 

Do not confuse these with the don’t cares in the outputs, “d”, 

which are the result of input combinations that never happen. 

Complete the Karnaugh map for A - including the don’t cares. 

Then deduce the expression for A - which should have 4 letters. 

A 3=0 

B 3=0 




A 

B 

x y 

x 2 y 2 

A - 

B - 

A 2 

B 2 

A B x y A - B - 

0 0 0 0 

0 0 0 1 

0 0 1 0 

0 0 1 1 

1 0 - - 

0 1 - - 

1 1 - - 

0 0 

0 1 

1 0 

0 0 

1 0 

0 1 

d d 

x 1 y 1 

A 1 

B 1 

x 0 y 0 

A 0 

B 0 

b 

A - =1 if x>y or AB=10 

B - =1 if x

Don’t Cares in Karnaugh Maps Don’t Cares 

Don’t Cares 

Common mistakes 

1. Circling don’t cares when there is no need. 

Remember you circle them only if convenient. 

2. Over circling 

3. Forgetting wrap-around. 

4. Not enclosing don’t cares which would make the 

circle larger. 

cd 

ab 00 

00 1 

d 

01 11 

1 

10 

1 

01 d d 

a 

11 

10 1 d 1 

cd 

ab 00 

00 d 

d 

01 11 

1 

c 

10 

1 

01 1 d 

a 

11 

10 

d 

1 1 d 1 

c 

cd 

ab 00 

00 1 

d 

01 11 10 

1 

01 d 1 

a 

11 

10 1 1 

d 

d 1 

c 


Slide 53 


Don’t Cares in Karnaugh Maps Common Mistakes 

Common Mistakes 

Top: The four corners would be better. There is no need to include the upper two “d”s. 

Middle: The four corners are done twice. Also the top a·bc oval could be doubled with wrap around. 

Bottom: The red oval acd could be wrapped around and doubled. 




b 

b 

b

DeMorgan's Theorem - Department of Electronics at Carleton ...

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