Wireless High Frequency Transceiver Module (RF GFSK)

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INT_RET: BC 0XF, 0 ;TIMER FLAG DJZ TIMER_REG JMP INT_RET BS FLAG, 0 ;INTERRUPT FLAG RETI Demo Program (use C8051F330 MCU): /* -------------------------------------------------------------------- Features: headers load area --------------------------------------------------------------------*/ #include #include "Public_variable.h" /* -------------------------------------------------------------------- Function: IO defined area -------------------------------------------------------------------- */ sbit TRW_24G_CLK = P1^1; sbit TRW_24G_DATA = P1^6; sbit TRW_24G_CS = P1^2; sbit TRW_24G_CE = P1^3; sbit TRW_24G_DR1 = P1^4; /* -------------------------------------------------------------------- Features: TRW-24G is written a BYTE (includes write the word with configuration information sent a BYTE) ------------------------------------------------------------------ */ void Write_TRW_24G_BYTE(x) { char i; for(i=0;i
} /* -------------------------------------------------------------------- Features: Reading a BYTE information from TRW-24G ----------------------------------------------------------------------*/ char Read_TRW_24G_BYTE(void) { char i,x; for(i=0;i
Page 1 and 2: TRW-24G WENSHING®© V1.04 Wireless
Page 3 and 4: Specification : Conditions: VDD=+3V
Page 5 and 6: http://www.wenshing.com.tw ; http:/
Page 7 and 8: ShockBurst TM principle: When the T
Page 9 and 10: RF front end is powered up. RF pac
Page 11 and 12: Figure 4 Simultaneous 2 channel rec
Page 13 and 14: Configuration word overview: Table
Page 15 and 16: The MSB bit should be loaded first
Page 17 and 18: NOTE: An 8 bit CRC will increase th
Page 19 and 20: The data packet for both ShockBurst
Page 21 and 22: Example: ShockBurth in the receive
Page 27 and 28: 0 0 0 1 0 1 0 0 Example: In direct
Page 29 and 30: Example: In direct receive mode, it
Page 31 and 32: Example: In direct receive mode, it
Page 33 and 34: Figure 9 VDD off to active mode Not
Page 35 and 36: ShockBurst TM RX: Figure 12 Timing
Page 37 and 38: DLY_REG EQU 0X1C KEY_REG EQU 0X1B T
Page 39 and 40: IOW 0XD MOV A, @0X08 ; P5, 0- LED P
Page 41 and 42: CALL DELAY1MS MOV A, P6 AND A, @0X0
Page 43 and 44: AND A, @0X07 MOV BYTE, A JBC P5, 3
Page 45 and 46: R_RET: MOV A, @0X10 MOV 0X13, A CAL
Page 47 and 48: ;===== RF CONFIG SUBROUTINE ======
Page 49 and 50: DJZ 0X10 JMP RF_S_ADD_BYTE MOV A, @
Page 51: ;==================================
Page 55 and 56: = 1 , Modules work is in the ShockB
Page 57: } } } } RF_Buffer[17] &= 0xFE; Conf

Wireless High Frequency Transceiver Module (RF GFSK)

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