vector - Department of Computer Science

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Recent Multimedia Extensions for PCs • Very short vectors added to existing ISAs for micros • Usually 64-bit registers split into 2x32b or 4x16b or 8x8b • Newer designs have 128-bit registers (Altivec, SSE2) • Limited instruction set: – no vector length control – no strided load/store or scatter/gather – Pentium 4 SSE2: Streaming SIMD Extensions 2 – unit-stride loads must be aligned to 64/128-bit boundary • Limited vector register length: – requires superscalar dispatch to keep multiply/add/load units busy – loop unrolling to hide latencies increases register pressure • Trend towards fuller vector support in microprocessors 3/22-24/11 CSE502-S11, Lec 14+15-Vector 32
Outline • Vector Processing Overview • Vector Metrics, Terms • Greater Efficiency than SuperScalar Processors • Examples – CRAY-1 (1976, 1979) 1st vector-register supercomputer – Multimedia extensions to high-performance PC processors – Modern multi-vector-processor supercomputer – NEC ESS • Design Features of Vector Supercomputers • Conclusions • Next Reading Assignment: Chapter 4 MultiProcessors 3/22-24/11 CSE502-S11, Lec 14+15-Vector 33
Page 1 and 2: CSE 502 Graduate Computer Architect
Page 3 and 4: Scalar Registers r15 r0 Vector Prog
Page 5 and 6: Vector Arithmetic Execution • Use
Page 7 and 8: Properties of Vector Processors •
Page 9 and 10: Common Vector Metrics • R ∞ : M
Page 11 and 12: Memory operations • Load/store op
Page 13 and 14: How Get Full Bandwidth if Unit Stri
Page 15 and 16: Single-issue Scalar Vectors Lower P
Page 17 and 18: Outline • Vector Processing Overv
Page 19 and 20: Supercomputers “Definitions” of
Page 21 and 22: Single Ported Memory 16 banks of 64
Page 23 and 24: Vector Memory-Memory versus Vector
Page 25 and 26: Vector Memory-Memory vs. Vector Reg
Page 27 and 28: Modern Vector Supercomputer: NEC SX
Page 29 and 30: NEC ESS - Earth Simulator System (n
Page 31: ESS - complete system installed 4/1
Page 35 and 36: Vector Registers Lane Vector Unit S
Page 37 and 38: Vector Stripmining Problem: Vector
Page 39 and 40: Vector Chaining • Vector version
Page 41 and 42: Vector Startup Two components of ve
Page 43 and 44: Vector Scatter/Gather Want to vecto
Page 45 and 46: Scatter example: Vector Scatter/Gat
Page 47 and 48: Masked Vector Instruction Implement
Page 49 and 50: Vector Reductions (vector values =>
Page 51: And in Conclusion [Vector Processin

vector - Department of Computer Science

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