vector - Department of Computer Science

More documents

Recommendations

Info

Vector Summary • Vector is alternative model for exploiting ILP • If code is vectorizable, then simpler hardware, more energy efficient, and better real-time model than outof-order machines • Design issues include number of lanes, number of functional units, number of vector registers, length of vector registers, exception handling, conditional operations • Fundamental design issue is memory bandwidth – Especially with virtual address translation and caching • Will multimedia popularity revive vector architectures? 3/22-24/11 CSE502-S11, Lec 14+15-Vector 50
And in Conclusion [Vector Processing] • One instruction operates on vectors of data • Vector loads get data from memory into big register files, operate, and then vector store • Have indexed load, store for sparse matrices • Easy to add vectors to commodity instruction sets – E.g., Morph SIMD into vector processing • Vector is a very efficient architecture for vectorizable codes, including multimedia and many scientific matrix applications 3/22-24/11 CSE502-S11, Lec 14+15-Vector 51
Page 1 and 2: CSE 502 Graduate Computer Architect
Page 3 and 4: Scalar Registers r15 r0 Vector Prog
Page 5 and 6: Vector Arithmetic Execution • Use
Page 7 and 8: Properties of Vector Processors •
Page 9 and 10: Common Vector Metrics • R ∞ : M
Page 11 and 12: Memory operations • Load/store op
Page 13 and 14: How Get Full Bandwidth if Unit Stri
Page 15 and 16: Single-issue Scalar Vectors Lower P
Page 17 and 18: Outline • Vector Processing Overv
Page 19 and 20: Supercomputers “Definitions” of
Page 21 and 22: Single Ported Memory 16 banks of 64
Page 23 and 24: Vector Memory-Memory versus Vector
Page 25 and 26: Vector Memory-Memory vs. Vector Reg
Page 27 and 28: Modern Vector Supercomputer: NEC SX
Page 29 and 30: NEC ESS - Earth Simulator System (n
Page 31 and 32: ESS - complete system installed 4/1
Page 33 and 34: Outline • Vector Processing Overv
Page 35 and 36: Vector Registers Lane Vector Unit S
Page 37 and 38: Vector Stripmining Problem: Vector
Page 39 and 40: Vector Chaining • Vector version
Page 41 and 42: Vector Startup Two components of ve
Page 43 and 44: Vector Scatter/Gather Want to vecto
Page 45 and 46: Scatter example: Vector Scatter/Gat
Page 47 and 48: Masked Vector Instruction Implement
Page 49: Vector Reductions (vector values =>

vector - Department of Computer Science

You also want an ePaper? Increase the reach of your titles

Delete template?

Save as template?