Fully Integrated 5GHz CMOS VCOs with On Chip Low Frequency ...

Fully Integrated 5GHz CMOS VCOs with On Chip Low Frequency Feedback
Circuit for 1/f Induced Phase Noise Suppression
Yi Lin, K.H. To*, J. S. Hamel, W. M. Huang *
Department of Electrical & Computer Engineering, University of Waterloo
Waterloo, Ontario, Canada
* RF/IF Division, Digital DNA Lab. SPS, Motorola Inc., Mesa, Arizona 85202
Email: ylin@vlsi.uwaterloo.ca Phone: (519)725-3264 Fax: (519)746-3077
Abstract
Fully integrated RF CMOS VCOs with on chip low
frequency feedback circuit for 1/f induced phase noise
suppression are presented. Both Colpitts and
differential type VCO circuits are implemented at 5-
6GHz in 0.18 µm CMOS process. The measured
Colpitts VCO is working at 5.4-5.75GHz with 1.8V
power supply. The core VCO consumes 15mW DC
power. The phase noise is –63.3dB/Hz at 10kHz and -
94.5dBc/Hz at 100kHz respectively for the Colpitts
oscillator without low frequency feedback, while it is –
69.8dBc/Hz and –98.8dBc/Hz for the oscillator with
feedback.
1. Introduction
The fast emerging wireless technology, such as 5GHz
Wireless LAN (WLAN) in US, or High Performance
Radio LAN (HIPERLAN) in Europe demands low cost
integrated RF transceiver. As an alternative to
traditional high cost GaAs, BJT RF technologies,
CMOS technology has been proven to be suitable for RF
application when the MOS device is scaled down to submicron
regime. The benefit of using standard CMOS
process is its potential possibility of integrating the
whole RF transceiver on a single chip at lower cost. In
order to achieve a single chip radio on bulk CMOS, we
may face lots of design challenges. One of the
challenges is to design an integrated CMOS VCO at
microwave frequency with low phase noise.
The phase noise of a VCO is a very critical
specification for many wireless communication systems.
However, different modulation schemes have different
phase noise requirements. For 5GHz WLAN, OFDM
(Orthogonal Frequency Division Multiplexing) is
expected to be the modulation scheme. Since OFDM
system performance is very sensitive to phase error [1],
as a result, the phase noise requirement of this system is
very stringent even at low offset frequency, such as
10kHz and 100kHz.
Close in carrier phase noise of CMOS VCO is
usually dominated by two components. One is
thermally induced phase noise, which is originated
from thermal noise sources inside a VCO and has 1/f 2
characteristics; the other is 1/f induced phase noise,
which is due to 1/f noise up-conversion and has 1/f 3
characteristics. When deep sub-micron MOS devices are
used for high frequency VCO, 1/f induced phase noise
could be very significant at 10kHz and 100kHz.
In recent years, low phase noise LC type integrated
CMOS VCO is a very active research topic. Since phase
noise is inversely proportional to Q 2 , where Q is the
loaded Q of an LC tank, thus, increasing Q is the main
focus of current research. However, due to the substrate
loss of bulk CMOS, the Q factor of on chip inductor and
varactor has limited room to improve at microwave
frequency. Therefore, further phase noise improvement,
particularly the 1/f induced phase noise needs some
alternative methods. In this paper, a low frequency
feedback concept originated from discrete microwave
community [2] was first applied and implemented in
high frequency integrated LC CMOS VCOs for 1/f
induced phase noise suppression.
2. Circuit configuration
2.1. Low frequency feedback concept
Figure 1. Conceptual diagram of low frequency
feedback
The low frequency feedback concept is depicted in
Fig. 1. As we can see, a resistor Rs first samples the 1/f
noise in DC current. Following this resistor, a low pass
filter constructed by a resistor Rp and a capacitor Cp is
used to filter out the high frequency components
appeared across the sample resistor Rs. Then, being fed
into an amplifier, the low frequency noise voltage
sampled by Rs will be inverted and amplified. After
designing a proper loading at the output of the
amplifier, we will introduce a feedback low frequency

noise voltage in series with the equivalent 1/f noise
voltage source Vn. If the feedback low frequency noise
voltage has the same amplitude and 180 degree out of
phase to Vn, the low frequency noise voltage across the
input of active device can be canceled. Another function
of the low frequency feedback is to control the DC bias
of the oscillator so that the oscillator works in a more
linear region, and 1/f up-conversion is reduced.
2.2. CMOS VCO with low frequency feedback
Figure 2 (a), (b) illustrate a Colpitts and differential
CMOS VCO using a low frequency feedback. In Fig.
2(a), transistor M1 and capacitor C1-C2 form a positive
feedback loop to provide the negative impedance.
(b)
Figure 2. (a) CMOS Colpitts VCO with low
frequency feedback (b) CMOS differential VCO
with low frequency feedback
The LC tank consists of inductor L3 and varactor C5-
C6. L1 is a RF blocking inductor which will provide a
high impedance at source of M1. Transistor M2 and
inductor L2 are the components of a buffer amplifier.
Resistor R5 is used to sample the low frequency
noise. R4, C3 form a low pass filter followed by a
single transistor amplifier M3. Resistor R1-R3 are parts
of DC bias. In Fig. 2(b), cross coupled transistor M5,
M6 provide the negative impedance to an LC tank
which is constructed by inductor L3, L4 , capacitor C2,
C5, and varactor C3, C4. R2 and R3 are RF blocking
resistors. R10 and R11 are the sampling resistors,
capacitor C9, C11, resistor R8, R9, and transistor M7,
M8 form the low frequency feedback circuits. The
current source bias circuit consists of transistor M1, M2
(a)
and resistor R1. C1, C6, C10 are the de-coupling
capacitors.
3. Circuit design
3.1. Passive and active device RF model
As shown in Fig. 2(a) (b), the integrated CMOS VCO
circuits consist of many passive and active components.
RF design and simulation demand accurate models of
those components. For our designs, Motorola internal
libraries and models were used. However, the on chip
spiral inductor models were directly extracted from on
wafer S-parameter measurements. As for phase noise
simulation, an accurate 1/f noise model extracted from
measurement [11] is also important.
3.2. LC tank optimization
The LC tank is the key element of LC type VCO.
The oscillation frequency is determined by the product
of L and C, while the oscillation amplitude and power
consumption are related to the L/C ratio. Therefore,
increasing L and reducing C could increase oscillation
amplitude with low power consumption. However, low
phase noise requires high Q LC tank which is usually
determined by its inductor. For standard CMOS
technology, high Q large inductor at microwave
frequency is usually very difficult to obtain. Thus, an
optimized L/C is needed not only for high efficiency
oscillation, but also for high Q inductor and varactor so
as to achieve low phase noise. Moreover, proper choice
of varactor value could also lead to a better tradeoff
between oscillation frequency and tuning range.
3.3. Phase noise consideration
As an important specification, phase noise of a VCO
is usually determined by linear and nonlinear
mechanisms. Linear mechanism limited phase noise can
be simply described by the Leeson’s model [3], which
shows that the phase noise can be improved by
increasing the loaded Q of the LC tank and the SNR
(signal to noise ratio) of the oscillator. However,
nonlinear mechanism limited phase noise is due to the
inherent nonlinear properties of the oscillator. Because
of these properties, the thermal noise at harmonic
frequencies is down-converted to the carrier side band,
while the 1/f noise source at base band is up-converted
to the carrier side band. So, according to its physical
source, phase noise can also be classified as thermally
induced phase noise (1/f 2 slope, due to both linear and
nonlinear mechanism), and 1/f induced phase noise
(1/f 3 slope, only due to nonlinear mechanism). For an
integrated microwave CMOS VCO, the Q improvement
of on chip LC tank is limited by the lossy substrate. This
will impede further phase noise improvement especially
at low frequency offset, where 1/f induced phase noise is
dominant because of larger 1/f noise source in deep submicron
MOS devices. A carefully designed low

frequency feedback circuit described in Section 2.1 is
expected to be a solution to this problem.
3.4. Colpitts VCO
In Fig.2 (a), the frequency of a Colpitts oscillator is
determined by inductor L3, varactor C5-C6, positive
feedback capacitor C1-C2 and capacitive components
inside transistor M1. With positive feedback, the active
device will provide a negative resistance which will
compensate the loss of LC tank and start oscillation.
This resistance is given by
R
n
g
= −
(1)
ϖ
m
2
C 1C
2
For microwave oscillation, large gm and small feedback
capacitor C1, C2 are usually required. Large gm requires
a large transistor size which could result in large power
consumption. Also, according to [4], as the phase noise
of oscillator is inversely proportional to C2, increasing
C2 will improve phase noise. Therefore, in order to
obtain a tradeoff among oscillation frequency, power
consumption, and phase noise, optimal sizing of
transistor M1 and positive feedback capacitor C1 and
C2 is required. Following Section 3.2, a 2nH inductor
L3 and 2 parallel MOS accumulation mode varactor C5-
C6 were chosen for 5GHz band design. Each varactor
has a tuning range from 0.65pF-1.4pF when a 2V
voltage variation is applied to the varactor. All these
varactors are placed in n-wells. They have the similar
layout structures as MOS devices, but the doping type
of their source and drain regions are same as that of nwells.
The 2nH inductor is formed by a patterned
electroplated copper layer. This layer is above the top
layer Cu metallization and passivation. The Q of this
inductor at 5GHz is around 10. For transistor M1, M2
and varactor C5-C6, multi-finger layout structure was
adopted so as to reduce the thermal noise contribution
from the gate resistance. In our design, transistor M1 is
an NMOS device with 50 fingers, each finger size is
2µm x 0.18µm. As an active device of the output buffer,
transistor M2 will have loading effect on oscillator
output. Therefore, the size of M2 will have impact on
oscillation frequency, output power, and phase noise of
the oscillator. Because of low 1/f noise consideration, a
PMOS device is used for M2. In our design, M2 has 20
fingers, each finger size is 2.5µmx0.18µm. For varactor
C5-C6, each has 3 cell, each cell has 12 fingers, the
finger size is 1.1µm x 9µm. In terms of low frequency
feedback, the voltage gain of M3 and low pass filter
bandwidth should be chosen properly. Also, low Vt
MOS device for M3 is applied so that a low sampling
resistor R5 can be used to ease the DC voltage drop
problem.
3.5. Differential VCO
Although a Colpitts oscillator is widely used in
wireless communication systems, a differential VCO is
more suitable for integrated implementation,
particularly when power supply noise and substrate
noise coupling are major concerns. As shown in Fig.
2(b), low frequency feedback circuits are also used in a
differential VCO. Because of the space limitation, we
will not describe the detail design procedure here.
4. Implementation and measurement results
The Colpitts and differential VCO have been
implemented in a 0.18µm RFCMOS process, which is
an option of a 0.18µm SiGe:C BiCMOS technology[10].
So far, only 5GHz band Colpitts VCOs have been
fabricated. Chip microphotographs of the Colpitts
VCOs are shown in Fig. 4(a), (b). The buffer and part of
the output matching circuit are integrated on chip. The
size of each chip area is 1.6mm x 1.5mm. The power
consumption of the Colpitts VCO with a low frequency
feedback is 15mW at 1.8V voltage supply. Both wafer
and board level RF testing were conducted using a HP
spectrum analyzer. Fig. 5 shows the output spectrum of
this VCO. By comparing with some recent CMOS
VCOs, we summarize the VCO performances in Table1.
Table 1. Comparison of 4-5GHz CMOS VCOs
Tech. Freq. Tuning Phase noise Ref.
(GH) Range (dBc/Hz)
0.35µm
CMOS
0.25µm
CMOS
0.24µm
SiGe
BiCMOS
0.18µm
RFCMOS
4.7 4.3% -62 @10kHz
-90 @100kHz
5.05 18% -62.5@10kHz
-94 @100kHz
5.67 14.9% -63 @10kHz
-96 @100kHz
5.74 6.1% -69 @10kHz
-98 @100kHz
(6)
(8)
(9)
This
work
(a) (b)
Figure 4. Microphotograph of the CMOS Colpitts
VCO (a) without low frequency feedback (b) with
low frequency feedback
With regards to the phase noise, first, an HB
(Harmonic Balance) phase noise simulator is used to
simulate the effectiveness of this low frequency feedback
phase noise reduction technique. Then, it is verified by

the measurement data. Fig. 6 shows the simulation and
measurement results of the Colpitts VCOs with and
without feedback. As we can see, the feedback method
results in a noticeable phase noise reduction(4-6dB) at
low offset frequency(10kHz-100kHz) where 1/f upconversion
is significant.
Figure 5. Output spectrum of the 5GHz band CMOS
Colpitts VCO with low frequency feedback
Phase Noise(dBc/Hz)
Phase Noise(dBc/Hz)
-60
-80
-100
-120
-60
-80
-100
-120
10 4
10 4
(b)
Figure 6. Phase noise results of CMOS Colpitts
VCOs at 5.74GHz (a) simulation (b) measurement
5. Conclusions
10 5
Offset Frequency (Hz)
(a)
With Feedback
No Feedback
With Feedback
No Feedback
10 5
Offset Frequency (Hz)
Compared with other wireless systems, a OFDM
WLAN system has more stringent phase noise
requirements for its local oscillator [1]. In particular,
the phase noise specs at low offset frequencies, where
1/f induced phase noise could be dominant, are expected
to be the bottlenecks for integrated 5GHz LC VCO
implementation using deep sub-micron bulk CMOS
technology. The Q improvement of LC tank in bulk
CMOS has a physical limit, this limit will make further
phase noise reduction, especially the 1/f induced phase
noise reduction very difficult. In this paper, an
10 6
10 6
alternative low frequency feedback technique was
applied to reduce the 1/f induced phase noise in fully
integrated 5GHz CMOS VCOs. The simulation results
and measurement data of two different Colpitts VCOs
have proved the effectiveness of this technique for phase
noise reduction at offset frequency smaller than 200kHz.
The advantage of this technique is its simple, low cost,
and compatibility with any other phase noise reduction
techniques. This technique can also be applied for
VCOs fabricated in different technologies and will not
be limited by operating frequency and technology
scaling.
6. Acknowledgements
The authors wish to greatly acknowledge Motorola
Inc. for CAD support and VCO fabrication. They also
wish to thank Joe Street in SiDiC Group of University
of Waterloo for his technical assistance in chip bonding.
7. References
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