Reduction of THD in Diode Clamped Multilevel Inverter ... - Ijsrp.org

International Journal of Scientific and Research Publications, Volume 3, Issue 6, June 2013 4
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any multilevel inverter configurations and we can generalize this
method to any higher order inverters.
REFERENCES
Fig. 5.4 The reference (cosine) and carrier waves (triangular) for a five-level
NPCMLI with SPWM.
Fig. 5.5 The reference (cosine) and carrier waves (triangular) for a five-level
NPCMLI with SPWM.
[1] J. Rodriguez, J. S. Lai, and F. Z. Peng, “Multilevel inverters: A survey of
topologies, controls, and applications,” IEEE Trans. Ind. Electron., vol. 49, no.
4, pp. 724–738, Aug. 2002.
[2] T.Ohnishi and H.Okitsu, “A novel PWM technique for three-phase
inverter/converter,” International Power Electronics Conference, 1983, pp.384-
395.
[3] A. Nabae, I. Takahashi, and H. Akagi, “A new neutral-point clamped PWM
inverter,” IEEE Trans. Ind. Applicat., vol. IA-17, pp. 518–523, Sept./Oct. 1981.
[4] N. Celanovic and D. Boroyevic, “A fast space vector modulation algorithm
for multilevel three-phase converters,” in Conf. Rec. IEEE-IAS Annu. Meeting,
Phoenix, AZ, Oct. 1999, pp. 1173–1177.
[5] J. Rodríguez, P. Correa, and L. Morán, “A vector control technique for
medium voltage multilevel inverters,” in Proc. IEEE APEC, Anaheim, CA, Mar.
2001, pp. 173–178.
[6] P. Hammond, “A new approach to enhance power quality for medium voltage
ac drives,” IEEE Trans. Ind. Applicat., vol. 33, pp. 202–208, Jan./Feb. 1997.
[7] L. Tolbert and T. G. Habetler, “Novel multilevel inverter carrier-based PWM
method,” IEEE Trans. Ind. Applicat., vol. 35, pp. 1098–1107, Sept./Oct. 1999.
[8] B. N. Mwinyiwiwa, Z.Wolanski, and B. T. Ooi, “Microprocessor
implemented SPWM for multiconverters with phase-shifted triangle carriers,” in
Conf. Rec. IEEE-IAS Annu. Meeting, NewOrleans, LA, Oct. 1997, pp. 1542–
1549.
[9] V. G. Agelidis and M. Calais, “Application specific harmonic performance
evaluation of multicarrier PWM techniques,” in Proc. IEEE PESC’98, Fukuoka,
Japan, May 1998, pp. 172–178.
[10] W. A. Hill and C. D. Harbourt, “Performance of medium voltage multilevel
inverters,” in Conf. Rec. IEEE-IAS Annu. Meeting, Pheonix, AZ, Oct. 1999, pp.
1186–1192.
[11] Carrara, G.,Gardella, S.G., Archesoni,M., Salutari, R., and Sciutto,
G.: ‘A new multi-level PWM method: A theoretical analysis’, IEEE Trans.
Power Electron., 1992, 7, (3), pp. 497–505
[12] McGrath, B.P.; Holmes, D.G.; "Multicarrier PWM strategies for multilevel
inverters," Industrial Electronics, IEEE Transactions on, vol.49, no.4, pp. 858-
867, Aug 2002 doi: 10.1109/TIE.2002.801073
Fig. 5.6 THD spectrum for a three-level NPCMLI with SPWM
TABLE II. REDUCTION OF THD BY VARYING INVERTER LEVEL
Output Voltage level
of NPCI
THD
Fundamental
Component
Three Level 34.51% 84.45
Five Level 16.82% 347
VII. CONCLUSION
A classical SPWM technique is proposed for three-level
and five-level NPC inverter. The main feature of the modulation
scheme lies in its ability to eliminate the harmonics in the
inverter output voltages. To assist the analysis and design of the
classical scheme, the mechanism of the THD reduction with
increase in level of inverter employing SPWM technique is
discussed.
The harmonic content and THD of the inverter output voltage
produced by the three and five levels are compared and it
seamless for five level neutral point clamped inverter compared
to three level NPCI. The proposed technique can be applied to
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