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5.5. Interface engineering III: SiO x passivation of the EuO/Si interface 117
interface
Si oxide
(nm)
1.0
0.8
0.6
0.4
0.2
II.
1 ML Eu
2 ML Eu
3 ML Eu
I. minimize silicides
EuO / pure Si
EuO / H-Si
II. minimize Si oxide
EuO / Eu Si
III. combined
optimization
EuO / Eu H-Si
300
350
400
temperature of synthesis (°C)
450
I.
500
550
1.0
0.8
0.6
0
0.2
0.4
interface
silicide
(nm)
Figure 5.26.: Summary of EuO/Si interface optimization including silicides, SiO x, and the combination
of them. The aim of the optimization is to reduce interface contaminants into the greenshaded
slot of silicide and SiO x thicknesses.
(I) Silicide minimization is accomplished by the tuning of the synthesis temperature and the surface
hydrogen termination of Si (001). (II) Silicon oxides are diminished by protective monolayers
of Eu on Si (001). (III) Finally, optimum parameters including H-Si and a protective Eu
monolayer are checked against synthesis temperature to yield a combined optimization accounting
for both the silicides and SiO x.
for the synthesis of EuO on passivated Si (001) heterostructures:
H-passivated Si (001), 2 ML protective Eu, a medium T S = 450 ◦ C.
During all three studies, EuO on Si (001) could be observed to grow heteroepitaxially on Si
(001) by RHEED. The sharpest EuO diffraction pattern are observed in the combined passivation
series – this is due to the net contamination (EuSi 2 + SiO x ) being smallest only in this
combined interface optimization series.
5.5. Interface engineering III: SiO x passivation of the EuO/Si interface
The challenge to prevent metallic contaminations at the EuO/Si interface involves two major
aspects: the avoidance of (i) silicides due to Eu–Si reactions, and (ii) excess Eu from a
seed layer for EuO synthesis in order to initialize the Eu distillation growth. We address
these issues by an alternative passivation method, the in situ application of ultrathin SiO x in