CAEN 2012 Products Catalog - Quantech Works
CAEN 2012 Products Catalog - Quantech Works
CAEN 2012 Products Catalog - Quantech Works
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Digitizers<br />
The <strong>CAEN</strong> Digitizers available in NIM form factor are listed here below.<br />
<strong>CAEN</strong> Digitizers are platform independent instruments housing high speed (up to 5 GS/s) multichannel ADC, with local memory and<br />
FPGA for real‐time data processing. Available in different form factors: VME, NIM and Desktop. For more complete information see<br />
pages 18-28. General Digitizer Reference Table: T9/p. 97.<br />
NIM<br />
N6720 - N6720A - N6720B - N6720C 4/2 Channel 12 bit 250 MS/s Digitizers<br />
• Input range: 2 Vpp with digitally programmable offset<br />
• Bandwidth: 125 MHz.<br />
• Interface: USB 2.0, Optical Link<br />
• Runs Digital Pulse Processing for the Charge Integration (DPP-CI) firmware<br />
• Runs Digital Pulse Processing for Pulse Shape Discrimination (DPP-PSD) firmware<br />
Ordering Information<br />
For more complete information on<br />
<strong>CAEN</strong> Digitizers, see pp. 18-28<br />
Reference Table T9/p. 97<br />
Code | Description | Input Type | SRAM Memory Sample/ch | AMC FPGA<br />
WN6720XAAAAA N6720 - 4 Ch. 12 bit 250 MS/s Digitizer: 1.25MS/ch, C4, SE Single ended 1.25 M EP1C4<br />
WN6720AXAAAA N6720A - 2 Ch. 12 bit 250 MS/s Digitizer: 1.25MS/c h, C4, SE Single ended 1.25 M EP1C4<br />
WN6720BXAAAA N6720B - 4 Ch. 12 bit 250 MS/s Digitizer: 1.25MS/c h, C20, SE Single ended 1.25 M EP1C20<br />
WN6720CXAAAA N6720C - 2 Ch. 12 bit 250 MS/s Digitizer: 1.25MS/c h, C20, SE Single ended 1.25 M EP1C20<br />
DPP<br />
CI<br />
DPP<br />
PSD<br />
N6724 - N6724A<br />
4/2 Channel 14 bit 100 MS/s Digitizers<br />
For more complete information on<br />
<strong>CAEN</strong> Digitizers, see pp. 18-28<br />
• Input range: 2.25 Vpp (10 Vpp and 500 mVpp on request) with digitally programmable offset<br />
Reference Table T9/p. 97<br />
• Bandwidth: 40 MHz<br />
DPP<br />
• Interface: USB 2.0, Optical Link<br />
PHA<br />
• Runs Digital Pulse Processing for Pulse Height Analysis (DPP-PHA) firmware<br />
Ordering Information<br />
Code | Description | Input Type | SRAM Memory Sample/ch | AMC FPGA<br />
WN6724XAAAAA N6724 - 4 Ch. 14 bit 100 MS/s Digitizer: 512kS/ch, C4, SE Single ended 512 k EP1C4<br />
WN6724AXAAAA N6724A - 2 Ch. 14 bit 100 MS/s Digitizer: 512kS/ch, C4, SE Single ended 512 k EP1C4<br />
N6730 - N6730A<br />
4/2 Channel 12 bit 500 MS/s Digitizer<br />
• Input range: 2 Vpp with digitally programmable offset<br />
• Bandwidth: 250 MHz<br />
• Runs Digital Pulse Processing for Pulse Shape Discrimination (DPP-PSD) firmware<br />
DPP<br />
PSD<br />
COMING SOON<br />
N6740 - N6740C 32 Channel 12 bit 62.5 MS/s Digitizers<br />
• Input range: 2 Vpp/10 Vpp with digitally programmable offset<br />
• Bandwidth: 30 MHz<br />
• Interface: USB 2.0, Optical Link<br />
Ordering Information<br />
Code | Description | Input Type | SRAM Memory Sample/ch | AMC FPGA<br />
WN6740XAAAAA N6740 - 32 Ch. 12 bit 62.5 MS/s Digitizer: 192kS/ch, EP3C16, SE Single ended 192 k EP3C16<br />
WN6740CXAAAA N6740C - 10Vpp 32 Ch. 12 bit 62.5 MS/s Digitizer: 192kS/ch, EP3C16, SE Single ended 192 k EP3C16<br />
N6742 - N6742B<br />
16+1 Channel 12 bit 5 GS/s Switched Capacitor Digitizers<br />
For more complete information on<br />
<strong>CAEN</strong> Digitizers, see pp. 18-28<br />
• Based on DRS4 chip Switched capacitor ADC<br />
Reference Table T9/p. 97<br />
• Input range: 1 Vpp with digitally programmable offset<br />
• Bandwidth: 600 MHz<br />
• Interface: USB 2.0, Optical Link<br />
Ordering Information<br />
Code | Description | Input Type | SRAM Memory Sample/ch | AMC FPGA<br />
WN6742XAAAAA N6742 - 16+1 Ch. 12 bit 5 GS/s Switched-Capacitor Digitizer: 128 events/ch (1kS/event), EP3C16, SE Single ended 128 events/ch (1kS/event) EP3C16<br />
WN6742BXAAAA N6742B - 16+1 Ch. 12 bit 5 GS/s Switched-Capacitor Digitizer: 1024 events/ch (1kS/event), EP3C16, SE Single ended 1024 events/ch (1kS/event), EP3C16<br />
N6751<br />
For more complete information on<br />
<strong>CAEN</strong> Digitizers, see pp. 18-28<br />
Reference Table T9/p. 97<br />
2/4 Channel 10 bit 2/1 GS/s Digitizer<br />
For more complete information on<br />
<strong>CAEN</strong> Digitizers, see pp. 18-28<br />
• Input range: 1 Vpp with digitally programmable offset<br />
Reference Table T9/p. 97<br />
• Bandwidth: 500 MHz<br />
DPP<br />
• Interface: USB 2.0, Optical Link<br />
PSD<br />
• Runs Digital Pulse Processing for Pulse Shape Discrimination (DPP-PSD) firmware<br />
Ordering Information<br />
Code | Description | Input Type | SRAM Memory Sample/ch | AMC FPGA<br />
WN6751XAAAAA N6751 - 2/4 Ch. 10 bit 2/1 GS/s Digitizer: 1.8/3.6 MS/ch, EP3C16, SE Single ended 1.8/3.6 M EP3C16<br />
N6761 1 Channel 10 bit 4 GS/s Digitizer<br />
• Input range: 1 Vpp with digitally programmable offset<br />
NEW<br />
For more complete information on<br />
• Bandwidth: 800 MHz<br />
<strong>CAEN</strong> Digitizers, see pp. 18-28<br />
Reference Table T9/p. 97<br />
• Interface: USB 2.0, Optical Link<br />
Ordering Information<br />
Code | Description | Input Type | SRAM Memory Sample/ch | AMC FPGA<br />
WN6761XAAAAA N6761 - 1 Ch. 10 bit 4 GS/s Digitizer: 7.2Ms/ch, EP3C16, SE Single ended 7.2 M EP3C16<br />
Short Form <strong>Catalog</strong> <strong>2012</strong><br />
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