HW1_VT13 - KTH

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Page 4 of 6 Homework Assigment 1 EL2450 Figure 3: Model of digital control system. connector of all discrete blocks. Hence no explicit sampler is needed when simulating the system with a discrete controller. 7. When implementing the controller digitally, what sampling time should be used to keep the control performance? (Hint: Use the cross over frequency of the open loop system). Enter the value in pid_design.m. [2p] 8. Open the Simulink model. Disconnect the process from the rest of the system to simulate it in open loop. Sample the system by connecting a zero order hold block on the input and the output connector of the process (remember to change its sample time). Use the calculated sample time for the blocks. Plot the output from the sampled open loop system when the input is a step. What are the differences compared to the continues case? [5p] 9. Now simulate the system in closed loop again. Discretize the continuous controller into state space form and remove the zero-order hold block on the output connector of the process. Compare the simulation result with the previous case when the continuous controller was used. Are there any differences in control performance? [5p] 10. How long is the sampling interval possible without affecting control performance? Compare with the calculated sampling time in Question 7 and comment on the possible differences. [3p] Discrete control design Now suppose that the sampling time is T s = 4. 11. Edit the file pid_design.m. Change the parameter T s to 4 and simulate the system with the discretized controller. How is the control performance affected? [1p] We will now try a different approach. We will derive a sampled model of the process for which we design a controller. The sampled model should be on the form: G d (z) = a 1z + a 2 z 2 + b 1 z + b2 4
Page 5 of 6 Homework Assigment 1 EL2450 The closed loop system should have the same performance as the continuoustime closed loop, i.e., the systems should have the same poles. The discretetime system poles are located at z i = e Tsp i , where p i are the poles of the continuous-time system. The controller to be designed is on the form: F d (z) = c oz 2 + c 1 z + c 2 (z − 1)(z + r) 12. Sample the system G, with the sampling time T s = 4, using the Matlab function c2d, with the zero-order hold method. Edit the file pid_design.m and save the sampled system in the parameter Gd. What are the coefficients a i and b i ? [3p] 13. Where should the poles of a discrete time system be located for it to be stable? [1p] 14. Convert the poles for the continuous closed loop system to discretetime poles. What are the corresponding poles for the discrete-time closed loop system? Also calculate the corresponding pole polynomial z 4 + d 0 z 3 + d 1 z 2 + d 2 z + d 3 . (Hint: Use the Matlab functions poly and minreal.) [3p] 15. Now determine the controller parameters so that the closed loop system gets the desired poles. Calculate the pole polynomial of the closed loop system (1+F d G d ) −1 F d G d , set it equal to the desired discrete pole polynomial and identify the coefficients. Show that this leads to the following linear equations: [3p] ⎡ ⎢ ⎣ ⎤ 1 a 1 0 0 b 1 − 1 a 2 a 1 0 ⎥ b 2 − b 1 0 a 2 a 1 ⎦ −b 2 0 0 a 2 ⎡ ⎤ ⎡ r ⎢ c 0 ⎥ ⎣ c 1 ⎦ = ⎢ ⎣ c 2 d 0 − b 1 + 1 d 1 − b 2 + b 1 d 2 + b 2 d 3 16. Solve the above equations and save the discrete controller in the variable F d . Verify that the poles of the discrete-time closed loop system are located where they should be. [2p] 17. Open the Simulink model and change to the discrete designed controller. Simulate the system again and compare the coutcome with previous cases. Conclusions? [2p] Quantization We will next investigate the effect of quantization. In a digital control system quantization appears in three different parts. When the signal is converted from analog to digital (A/D) the signal is quantized. The quantization level depends on the number of bits of the converter. In the control algorithm the output signal is computed. Here the size of the memory, used to store the signal value, contributes to the quantization. The less memory used the greater quantization. The conversion of the signal back to analog (D/A) gives the same effect. ⎤ ⎥ ⎦ . 5
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HW1_VT13 - KTH

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