24AA65/24LC65/24C65 64K I2C™ Smart Serial ... - Microchip

24AA65/24LC65/24C65
FIGURE 8-1:
CONTROL SEQUENCE BIT ASSIGNMENTS
Control Byte
Address Byte 1
Address Byte 0
Configuration Byte
1
0
1
0
A A
2 1
A
0
R/W
S
0
0
A A A A A
12 11 10 9 8
A A
7
• • • • • • 0
R X X
B B B B
3 2 1 0
Slave
Address Device
Select
Bits
S/HE
Block
Count
Security Read
S
tart
Acknowledges from Device
R
A
A
A
1 0 1 0
A A A
0 1 X X X X X X X C X X X X X X X X C 1 1 X X X X X X
2 1 0
K
K
Acknowledge
No
from
ACK
Master
S
top
Data from Device Data from Device
A
A
C 1 1 1 1 B B B B C 1 1 1 1 N N N N
K 3 2 1 0 K
3 2 1 0
C
K
A
S/HE
Starting Block
Number
Number of
Blocks to
Protect
Security Write
S
tart
Acknowledges from Device
R
A A
1 0 1 0
A A A
0 C 1 X X B B B B X CK X X X X X X X X CK 1 0 X X
2 1 0 K 3 2 1 0
N N N N
3 2 1 0
S
top
A
C
K
Starting Block
Number
S/HE
Number of
Blocks to
Protect
High Endurance Block Read
S
t
a
r
t
Acknowledges from Device
A A A A A
A
1 0 1 0 0 CK 1 X X X X X X X C X X X X X X X X C 2 1 0 K
K
R
0 1 X X X X X X
S/HE
No
ACK
S
t
Data from Device o
p
A
C 1 1 1 1 B B B B
K 3 2 1 0
High Endurance
Block Number
High Endurance Block Write
S
tart
Acknowledges from Device
R
A A A A
1 0 1 0
CK 1 X X B B B B A
A
0 X C X X X X X X X X C 0 0 X X 0 0 0 0
2 1 0 3 2 1 0 K
K
S
top
A
C
K
High Endurance
Block Number
S/HE
DS21073J-page 12
© 2003 Microchip Technology Inc.