Sirius 800 with AHP Technical Datasheet - Snell

More documents

Recommendations

Info

Innovation in the Multi-Screen World Module Specifications - AES Output Modules (4925 and 4929) Module / Order Code <strong>AHP</strong> Function 4925 Audio processing (Gain/Invert, Left/Right swap, Left to both, Right to both, Mono-mix) 4929 Audio processing (Gain/Invert, delay, Left/Right swap, Left to both, Right to both, Mono-mix) S8A-SRC Audio Output Sample Rate Conversion for 4929 modules (all audio channels on one module) 4925 modules do not support sample rate conversion or delay. AES Outputs – Functional Signal Standard Output Sample Rate Format AES Outputs – Interface Number and type Connector Output AES3-2009 Free running (asynchronous to any reference) the signal input sample rate is re-generated at the output. 20 bit or 24 bit, as per input format 4925 or 4929 <strong>with</strong> 1298 D Type Rear Panel 120 AES pairs per card, balanced 62 way high density D type Amplitude >2V pk-pk into 110ohms Output Impedance 110ohm +/-10% Output Rise and Fall Time
Audio Processing Block Diagram Audio Processing: Audio is routed from the audio crosspoint as mono signals. Individual mono channels (or stereo pairs as appropriate) can be processed as described in the table below. Gain/Invert Left/Right Swap Left to Both Right to Both Mono Mix Processing on AES Inputs Gain Phase Invert Left/right swap Mono mix Silence or -72 to +30dB in 0.1dB steps (A + B)/2 Delay (4949 only) 0-1.35s in 0.25ms steps Processing per AES Pair Sample Rate Conversion Block Diagram (S8A-SRC) Sample Rate Conversion (blocks of 16 mono channels, converted as AES pairs) 1 - 16 17 - 32 33 - 48 1 - 16 17 - 32 33 - 48 224 - 240 224 - 240 Reference Selection Derived Video Reference 1 - 4 AES Reference With No Sample Rate Conversion: Synchronous and asynchronous audio is passed transparently (including VU & C bits). Parity is re-calculated at the output If two mono signals making up an AES pair are not synchronous, the left channel clock is used to generate the pair. Right channel samples are re-timed by drop/repeat The AES clock rate is re-generated from the incoming audio (nominally 48kHz) VU & C flags are regenerated to default values when re-aligning audio With Sample Rate Conversion enabled: 16 mono / 8 AES are grouped together in each Sample Rate Conversion block A reference clock is selected for each SRC block (any one of the video references, or the AES reference) AES pairs are processed together through the SRC block. VU & C bits are re-generated to default values If two mono signals making up an AES pair are not synchronous, the left channel clock is used to generate the pair. Right channel samples are re-timed by drop/repeat before sample rate conversion Dolby E is detected and automatically bypasses sample rate conversion 19
Page 1 and 2: Innovation in the Multi-Screen Worl
Page 3 and 4: Monitoring Monitoring Outputs Input
Page 5 and 6: Standard and Custom dual channel SF
Page 7 and 8: Sirius 800 - System Specification P
Page 9 and 10: Module Specifications - Standard Vi
Page 11 and 12: Module 6 - Video AHP Input (continu
Page 13 and 14: Module Specifications - Video AHP O
Page 15 and 16: Sirius 800 AHP - Frame Synchronizer
Page 17: Module Specifications - MADI Input
Page 21 and 22: Audio Processing Block Diagram Gain
Page 23 and 24: Audio Outputs 4925 Sirius 800 AES /

Sirius 800 with AHP Technical Datasheet - Snell

Create successful ePaper yourself

Delete template?

Save as template?