Vertically Integrated Test/Calibration and Reliability Enhancement ...

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<strong>Calibration</strong> in the Context of Complex Systems • System is made up of many blocks, compensation effects need to be taken into account Block X Block Y G Y_min = 9dB G Y_max =11dB G X_min = 9dB G X_max =11dB G min =18dB G max =22dB G Y =7dB G X =11dB G=18dB • Local calibration may not always produce optimum results G Y =7dB G X=10dB G=17dB G Y =8dB G X =10dB G=18dB G Y =7dB G X =11dB G=18dB 6
Digital Processing • With millions of transistors available, digital processing capability increases • Digital compensation becomes more affordable • Examples of digital compensation exist – e.g. pipelined ADCs – e.g. Compensation of IQ mismatch in transceivers • Well, it is not free! – Processing capability is there but it most certainly has other uses • Computational overhead of compensation – Digital circuits are slow • Latency of compensation – Any additional operation adds power consumption • Yet another power/performance trade-off 7
Page 1 and 2: Vertically Integrated Test/Calibrat
Page 3 and 4: Trends • Integration of digital,
Page 5: Post-production Calibration • Ana
Page 9 and 10: Increasing Defectivity • Use of h
Page 11 and 12: How do defects affect the test proc
Page 13 and 14: Reliability • Not much attention
Page 15 and 16: Analog/RF Reliability • Wearout m
Page 17 and 18: Re-calibrating for Reliability Enha
Page 19: Vision • Research is needed at mu

Vertically Integrated Test/Calibration and Reliability Enhancement ...

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